MODULAR STURUCTURED MULTILEVEL INVERTER AS A THREE-PHASE
SHUNT ACTIVE POWER FILTER WITH UNIFIED CONSTANT FREQUENCY
INTEGRATION CONTROL
ALI IBRAHIM ISMAAIL
A project report submitted in partial fulfillment of the
requirements for the award of the degree of
Master of Engineering (Electrical – Mechatronics & Automatic Control)
Faculty of Electrical Engineering
Universiti Teknologi Malaysia
MAY 2007
MODULAR STURUCTURED MULTILEVEL INVERTER AS A
THREE-PHASE SHUNT ACTIVE POWER FILTER WITH
UNIFIED CONSTANT FREQUENCY INTEGRATION CONTROL
2006/2007-II
ALI IBRAHIM ISMAAIL
√
Ezdoo Aljanobeia
Zliten – Libya.
MAY 2007
DR. NAZIHA BT. AHMAD AZLI
MAY 2007
“I hereby declare that I have read this project report and in
my opinion this project report is sufficient in terms of scope and
quality for the award of the degree of Master of Engineering (ElectricalMechatronics & Automatic Control)”
Signature
Name of Supervisor
Date
ii
I declare that this project report entitled “Modular Structured Multilevel Inverter as a
Three-phase shunt Active Power Filter with Unified Constant Frequency Integration
Control “is the result of my own research except as cited in the references. The
project report has not been accepted for any degree and is not concurrently submitted
in candidature of any other degree.
Signature
Name
Date
iii
Specially Dedicated To
My Beloved Mother, Father, Brothers and Sisters
iv
ACKNOWLEDGMENT
In the name of Allah, Most Gracious, and Most Merciful
Praise be to Almighty Allah (Subhanahu Wa Ta’ala) who gave me the
courage and patience to carry out this work. Pease and blessing of Allah be upon his
last prophet Mohammed (Sallulaho-Alaihe Wassalam) and all his companions
(Sahaba), (Razi-Allaho-Anhum) who devoted their lives towards the prosperity and
spread of Islam.
My deep appreciation and heartfelt gratitude goes to my supervisor, Dr.
Naziha Bte Ahmad Azli, for her kindness, constant endeavor, and guidance and the
numerous moments of attention she devoted through out this work.
Also, thanks to the members of my family, especially my wife, for being very
supportive throughout the development of this project.
Finally, I would like to ask my colleagues and friends whom I have been
associated to accept my sincere thanks within the process of completing the project.
v
ABSTRACT
In recent years, the usage of power electronics equipments continues to
increase, due to the increased usage of nonlinear loads and distributed power sources.
These nonlinear loads generate harmonics and reactive currents, which lead to low
power factor, low energy efficiency, low power capacity, and harmful disturbance to
other appliances. These reactive currents will distort the voltage at the point of
common coupling, reducing the quality of power delivered to other consumers on the
network. Nowadays shunt active power filters (APFs), due to their flexibility and
reliability are one of the most versatile and efficient solutions in the compensation of
the load power factor and current harmonics. APFs provide only the harmonic and
reactive power to cancel the one generated by the nonlinear loads or sources. This
project presents a Modular Structured Multilevel Inverter (MSMI) as a three-phase
shunt active power filter with Unified Constant Frequency Integration (UCI) control.
Using MSMI APF with a unified constant-frequency integration controller, a unity
power factor and low total harmonic distortion can be realized in all three phases.
The proposed control approach employs one integrator with reset, along with several
logic and linear components such as flip-flops, comparators, and clock. There are
several important features of this implementation, it does not require three-phase
load current and phase voltage sensing, also the nontrivial task of calculating
harmonics and reactive current component is not required, and finally, it does not use
any multipliers. These features make the proposed control approach simple, robust
and reliable. The proposed three-phase MSMI APF with UCI control was simulated
using MATLAB/Simulink. Simulation results have demonstrated a good
suppression in harmonic distortion and improvement in the power factor of the
power system.
vi
ABSTRAK
Dalam beberapa tahun kebelakangan ini, penggunaan peralatan elektronik
kuasa semakin meninggkat disebabkan oleh peningkatan penggunaan beban tidak
lurus dan pengagihan sumber kuasa. Beban tidak lurus mengeluarkan harmonik dan
arus re-aktif yang akan mengurangkan faktor kuasa, kecekapan kuasa, kapasiti kuasa
dan gangguan berbahaya kepada alatan yang lain. Arus re-aktif akan mengganggu
voltan pada titik penyambungan biasa yang mana akan mengurangkan kualiti kuasa
yang dihantar kepada pengguna di talian. Sekarang ini, ‘shunt active power filter
(APFs)’ banyak digunakan kerana fleksibiliti dan keboleharapan yang sungguh serba
boleh dan penyelesain yang cekap dalam menimbal-balik faktor kuasa beban dan
harmonik arus. APFs menyediakan harmonik dan kuasa re-aktif untuk membatalkan
harmonik dan kuasa re-aktif yang dihasilkan oleh beban tidak lurus atau sumber.
Projek ini mempersembahkan ‘Modular Structured Multilevel Inverter (MSMI)’
sebagai tiga fasa ‘shunt active power filter (APFs)’ bersama dengan ‘Unified
Constant Frequency Integration (UCI) control’. Dengan menggunakan MSMI APF
bersama ‘Unified Control Frequency Integration Control’, faktor kuasa sepadu dan
jumlah gangguan harmonik yang rendah boleh direalisasikan pada semua sistem tiga
fasa. Kawalan yang telah dicadangkan menggunakan satu pengamilan bersama reset,
beberapa logik serta komponen lurus seperti flip-flop, pembanding dan jam. Ada
beberapa keutamaan dalam perlaksanaan projek ini, di mana ia tidak menggunakan
arus beban tiga fasa dan pengesan voltan fasa. Ia juga tidak menggunakan tugas yang
tidak remeh untuk mengira harmonik dan arus re-aktif. Akhir sekali ia juga tidak
menggunakan pendarab. Keutamaan ini menghasilkan cadangan kawalan yang
mudah, tahan lasak dan boleh diharap. Cadangan menggunakan tiga fasa MSMI APF
bersama kawalan UCI telah disimulasi menggunakan MATLAB/Simulink.
Keputusan simulasi telah menunjukkan penumpasan gangguan harmonik yang baik
dan membaikkan faktor kuasa dalam sistem kuasa.
vii
TABLE OF CONTENTS
CHAPTER
TITLE
2
ii
DECLARATION
DEDICATION
iii
ACKNOWLEDGEMENT
iv
ABSTRACT
v
ABSTRAK
TABLE OF CONTENT
vi
vii
LIST OF TABLES
ix
LIST OF FIGURES
x
LIST OF APPENDIX
1
PAGE
xiii
INTRODUCTION
1
1.1
Project overview
4
1.2
Objective
7
1.3
Scope of Project
7
1.4
Thesis outline
8
THREE-PHASE ACTIVE POWER FILTER
AND THE CONTROL SCHEME
9
2.1
Introduction
9
2.2
Full bridge inverter
9
2.3
vvvv
2.4
2.5
Three-phase MSMI circuit topology and
operation
A five-level Three-phase MSMI
Proposed control for three-phase MSMI
2.5.1
One cycle control theory
12
2.5.2
Proposed UCI APF control
aaaaaaaaaaaaa method
13
14
16
19
viii
3
DESIGN THE SIMULATION BLOCKS
22
3.1
Introduction
22
3.2
Setting simulation parameters
24
3.3
Single-phase MSMI system
3.3.1
Single-phase nonlinear load
3.3.2 Schematics of single-phase
aaaaaaaaaaaaaaaMSMI APF
3.3.3 Schematics of the controller of
sssssssssssssssss single-phase MSMI
3.4
Three-phase MSMI system
3.4.1 Three-phase nonlinear load
3.4.2 Schematics of three-phase MSMI
aaaaaaaaaaaaa.aAPF
3.4.3 Schematics of the controller for
aaaaaaaaaaaaa three-phase MSMI
4
25
26
27
29
29
30
31
SIMULATION RESULTS AND ANALYSIS
34
4.1
Introduction
34
4.2
Generation of switching signal
34
4.3
Single-phase MSMI system
39
4.3.1 The single-phase nonlinear load
4.3.2 Compensation with single-phase
aaaaaaaaaaaaaaMSMI APF
4.4
Three-phase MSMI system
4.4.1 The three-phase nonlinear load
4.4.2
Compensation with three-phase
aaaaaaaaaaaaaa MSMI APF
4.5
Load changes
4.6
Discussion
5
25
CONCLUSION
39
40
42
42
44
48
49
51
5.1
Conclusion
51
5.2
Future work
52
REFERENCES
53
Appendices A - B
56-78
ix
LIST OF TABLES
TABLE NO.
TITLE
PAGE
2.1
Operation of the switches
11
2.2
Functions of R-S flip flop
15
3.1
Value of the simulation parameters
24
x
LIST OF FIGURES
FIGURE NO.
TITLE
PAGE
1.1
Shunt APF connected to the nonlinear load
3
1.2
2.1
Three-phase wye connection of n level
cascade inverter
Full bridge inverter
2.2
Bipolar mode
10
2.3
Unipolar mode
11
2.4
Output phase voltage
13
2.5
5-level three-phase wye connected MSMI
14
2.6
2.7
Block diagram of control 5-level three-phase
MSMI
One cycle control
2.8
The switch function
16
3.1
Project sequence
23
3.2
3.3
Non linear load full bridge diode rectifier
with R-C load
Single-phase MSMI APF
26
3.4
UCI controller for single-phase MSMI
27
3.5
Single-phase MSMI APF system
28
3.6
Three-phase nonlinear load
29
3.7
Three-phase MSMI APF
30
3.8
UCI controller for three-phase MSMI system
32
3.9
Three-phase MSMI APF system
33
4.1
4.2
A small section of the carrier signal and
35
reference signals
Input signal to R port of the flip-flop for leg A 35
4.3
Input signal to S port of the flip-flop for leg A 36
4.4
Control signal for switch S1
36
4.5
Control signal for switch S2
36
4.6
Input signal to R port of the flip-flop for leg B 37
4.7
Input signal to S port of the flip-flop for leg B
6
10
15
16
25
37
xi
4.8
Control signal for switch S3
38
4.9
Control signal for switch S4
38
4.10
4.11
Wave form of source current caused by diode
rectifier with RC load
Source current harmonic component
4.12
Source current waveform after compensation
4.13
Harmonic spectrum of source current after
compensation
Source current wave form before
compensation for Phase A
Harmonic spectrum of source current before
compensation for phase A
Source current wave form before
compensation for Phase B
Harmonic spectrum of source current before
compensation for phase B
Source current wave form before
compensation for Phase C
Harmonic spectrum of source current before
compensation for phase C
Compensation current produced by three
phase MSMI APF for phase A
Compensation current produced by three
phase MSMI APF for phase B
Compensation current produced by three
phase MSMI APF for phase C
Waveform of source current after
compensation for phase A
Harmonic spectrum of source current after
compensation for phase A
Waveform of source current after
compensation for phase B
Harmonic spectrum of source current after
compensation for phase B
Waveform of source current after
compensation for phase C
Harmonic spectrum of source current after
compensation for phase C
Input supply current in phase with input
supply voltage at AC main after
compensation of MSMI APF for phase A
4.14-a
4.14-b
4.15-a
4.15-b
4.16-a
4.16-b
4.17-a
4.17-b
4.17-c
4.18-a
4.18-b
4.19-a
4.19-b
4.20-a
4.20-b
4.21-a
39
40
40
41
42
42
43
43
43
44
44
45
45
45
46
46
46
47
47
47
xii
4.21-b
4.21-c
4.22
4.23
Input supply current in phase with input
supply voltage at AC main after
compensation of MSMI APF for phase B
Input supply current in phase with input
supply voltage at AC main after
compensation of MSMI APF for phase C
Compensation current to the load changing
Source current drawn from the AC input with
change in load
48
48
49
49
xiii
LIST OF APPENDICES
APENDIX
TITLE
PAGE
A
Table of Current Distortion Limits In IEEE Std 519
56
B
MATLAB Documentations for Simulation Model
57
CHAPTER 1
INTRODUCTION
The increasing use of power electronic devices to provide more precise
control of electrical power has brought about an increase in the distortion of voltage
and current waveforms. Modern electrical distribution systems typically supply a
high percentage of nonlinear loads. Due to the increased use of nonlinear industrial
loads and power electronics, the currents and voltages present on the system can no
longer be deemed as pure sinusoidal. These nonlinear loads generate poor power
quality. However, the power quality problem has become a great concern due to the
rapidly increasing use of nonlinear loads and power electronic equipment. Harmonic
distortion is a key phrase used today when talking about power quality. Harmonic
distortion is the production of harmonic frequencies by an electronic system when a
signal is applied at the input, and it is measured in terms of percent total harmonic
distortion of the fundamental frequency [24]. Additional losses in the electrical
distribution systems are caused by the harmonic currents. The losses lead to low
power factor which yields as overheating in apparatus, higher air-conditioning costs
and higher power costs. Furthermore, harmonic will lead to lower reliability.
In the present era of utility deregulation and competition, many utility and
industrial customers are concerned about reliability of electrical supply and quality of
power. They are also anxious over the truth that harmonic can lead to computer
network failure, humming in telecommunication lines and transformer overheating.
The effects of harmonic distortion are hard to measure while the end results are easy
to understand in terms of higher operating costs and lower reliability.
2
The total harmonic distortion problem are well understood and directly
related to the proliferation of loads consuming non-sinusoidal current, referred to as
"nonlinear loads". These types of loads are used for the conversion, variation and
regulation of electric power in commercial, industrial and residential installations.
There are many equipment (loads) with feed power from AC power supply such as
computers, printers, power equipment, television sets, microwave ovens, fluorescent
lightings and motors, as well as heating and air-conditioning equipment. These
represent a mixture of linear and non-linear loads, all powered from the same AC
source. If the content of non-linear loads becomes too large, it could reason
significant distortion to the AC voltage. When this distortion is taken to extremes, it
can result in malfunction or damage to other equipment sharing that source.
Nowadays, a variety of approaches are used to minimize and control
harmonic distortion, but all present disadvantages. All solutions demonstrate higher
utility costs because of continued poor power factors. However, to reduce harmonic
contamination in the power lines, active power filters (APF) are viable solutions to
eliminate the harmonics and improve the power factor. There are many
configurations of active filters, such as the series active filter, shunt active filter, and
combination of shunt and series active filter. Shunt APF is considered to be the most
basic configuration for active power filter. An APF is a device that is connected in
parallel with the AC line as shown in Figure 1.1. It needs to be sized only for the
harmonic current drawn by the non-linear loads and function as a current source to
cancel the reactive and harmonic currents generated from a group of nonlinear loads,
so that the resulting total current drawn from the AC main is sinusoidal [8]. The
performance of an APF largely depends on the inverter topologies and the pulse
width modulation (PWM) control method.
3
Source Current
Load Current
IS
IL
Filter Current
Power Distribution
Equivalent Circuit
IF
Nonlinear
Load
Shunt Active
Power Filter
Figure 1.1: Shunt APF connected to the nonlinear load.
Active power filters are becoming a viable alternative to passive filters and
are gaining market share speedily as their cost becomes competitive with the passive
variety [8]. Also APF has some advantages such as the size of APF depend on the
harmonic current drawn by the nonlinear loads and that need to be compensated,
simplicity, reliability, efficiency, respond to changing load and harmonic conditions.
However, passive power filter have many disadvantages, such as large size,
resonance, and fixed in their harmonic response.
Numerous types of shunt active power filters have been proposed in many
papers. Most of these papers discuss the standard and function for controlling
different topologies of APFs. Meanwhile, little of them talk about the voltage range
application of APFs. This project is concerned on a new topology of three-phase
APF based on Modular Structure Multilevel Inverter (MSMI), which is generally for
high voltage/high power applications. The MSMI has many distinct features in terms
of its structure, which is simple, modular and also requires the least number of
components. These features provide the flexibility in extending the MSMI to higher
number of levels without undue increase in circuit complexity as well as facilitate
packaging [7].
4
1.1 Project overview
The issue of active filters started in 1971. Shunt APF has been explored by
many researchers. The shunt APF is considered to be the most basic configuration
for APF [12]. In order to control the produced current that is equal in amplitude and
opposite in direction of the reactive current of the nonlinear load, different control
strategies have been presented to improve the dynamic and steady-state performance
of the APF (such as proportional-integral (PI), variable-structure control, fuzzy logic,
and neural nets) [1]. Most of these control approaches need to sense the three-phase
line voltage, three-phase load current and then calculate its harmonics and reactive
components in order to generate the reference for controlling the current of a bridge
converter. Those control methods require fast and real-time calculation; therefore, a
high-speed digital microprocessor and high-performance A/D converters are
necessary, which yields complexity, high cost and low stability [3].
Another simple method of control scheme for three-phase APF is known as
Unified Constant-Frequency Integration Control (UCI) based on one cycle control
was introduced by Dr. Smedly from California Institute of Technology in 1991 [9].
The controller is designed to vary the duty cycle of the inverter switches such that
compensation of the harmonics can be done in cycle. This control method eliminates
the need of calculating the current reference as well as the use of multipliers and
voltage sensors in the control loop [3].
UCI control becomes a focus control strategy and the development of the
control techniques applied to APFs meet a new high tide in the last years [5]. UCI
control method employs an integrator to control the pulse width of an AC-DC
converter so its current draw is precisely opposite to the reactive and harmonic
current draw of the nonlinear loads. The control method features are carrier free,
constant switching frequency operation, minimum reactive and harmonic current
generation and simple analog circuitry. It provides a low cost and high performance
5
solution for power quality control. This control method is generalized to control a
family of converters that are suitable for APF applications.
Due to the widespread use of modern electronic equipment and the natural
limitation to the appliance of active filters at high power levels, it is difficult to
realize high power rated filters with the required bandwidth for compensating the
typical harmonic currents. The inverter topology that seems to be gaining interest
lately is the multilevel inverter. Multilevel inverter was initiated by A. Nabae in
1981 who introduced a basic three level inverter, also known as the Neutral Point
Clamped (NPC) inverter [15]. The main feature of a multilevel inverter is its ability
to reduce the voltage stress on each power device due to the utilization of multiple
levels on the DC bus.
This project suggests a three-phase MSMI APF for high power application
that utilizes the UCI control scheme. Three-phase MSMI APF consists of cascade of
full-bridge inverters with separate DC sources (SDCS) and this cascade full-bridge
inverter can be connected in star connection as shown in Figure 1.2. The output
phase voltage is the sum of inverter units’ output [10]. A UCI control method is
based on one-cycle control that employs an integrator with reset as its core
component along with a few logic and linear components to control the pulse width
of a three-phase rectifier APF, so that all three phase currents drawn form or the
current output to the utility line is sinusoidal. With one-cycle control, the multipliers
and three-phase load current sensors in the control loop are eliminated and the
control circuitry is simple and robust. The overall circuitry is reduced. Active power
filters with UCI controller provide a cost effective and flexible solution for power
quality control.
6
n
n
-1
Figure 1.2: Three-phase Wye connection of n level cascade inverter
The proposed configuration of a three-phase MSMI APF with UCI control
obtains low total harmonic distortion (THD) and enforces the three-phase load
current to follow the three-phase line voltage, which results in a three-phase unity
power factor. The MSMI APF is suitable for high power application and has the
ability to reduce the voltage stress on the semiconductor components.
This project is an extension to a previous project which has been completed
for a single-phase MSMI APF with UCI. A three-phase simulation of an MSMI APF
system is presented for the purpose of demonstration in this project and acceptable
result has been obtained from the simulation.
7
1.2 Objective
The objectives of this project can be summarized as follows:
- To extend the use of a single-phase MSMI in an APF system with UCI control, to
three-phase application.
- To achieve low supply current total harmonic distortion (THD) in the power
system.
- To achieve three-phase unity power factor on the supply side.
1.3 Scope of project
This project introduces three phase MSMI shunt APFs with UCI control. The
scope of the project can be summarized as follows:
- Represent the nonlinear load with a diode rectifier with RC load, and analysis as the
distorted source current waveform drawn by the nonlinear load.
- A simulation study on the operation and performance of a three-phase MSMI with
UCI control as an active power filter.
- Using MATLAB Simulink to simulate both single-phase and three-phase MSMI
APFs.
- Testing the simulation to evaluate the performance of the three-phase APF.
8
- Comparing the performance of the APF systems (both single phase and threephase).
1.4 Thesis Outline
This thesis is organized into five chapters, which are summarized as follows:
Chapter 1 gives an introduction and short peep on the fundamental aspects of
the project, such as: overview, project background, objectives and scope of the
project.
Chapter 2 describes the full bridge inverter topology and its control scheme,
the schematic of three-phase MSMI APF as well as the control diagram.
Chapter 3 demonstrates the development of the simulation blocks of the
proposed three-phase MSMI APF configuration with selected control scheme.
Chapter 4 displays the simulation results and discusses the compensation
performance of the single phase and three-phase MSMI APF subject to a typical
nonlinear load.
Chapter 5 presents conclusions and recommendations for future researchers.
CHAPTER 2
THREE-PHASE ACTIVE POWER FILTER AND THE CONTROL SCHEME
2.1 Introduction
This chapter describes in detail the installation and operation of the proposed
three-phase MSMI APF and the control architecture used in this project. Also, this
chapter presents the control method in the form of mathematical equations.
2.2 Full bridge inverter
The full-bridge inverter as shown in Figure 2.1 used to convert DC to AC can
be considered as a typical shunt APF. Shunt APF produces harmonic current that has
the same magnitude and different phase of harmonic that is generated by a nonlinear
load. The output is obtained from the DC input by opening and closing switches in
an appropriate sequence. The operation of the switches can be controlled by PWM
techniques. Control of the switches for sinusoidal PWM output requires two carrier
signals and modulating signal (reference), which are sinusoidal waveform and
10
triangular waveform respectively. The frequency of the carrier signal is much higher
than the modulated signal. There are two methods to control the operation of the
switching; bipolar and unipolar scheme. [6]
S1
+
vdc
S3
+ VAB
A
-
B
Load
-
S4
S2
Figure 2.1: Full bridge inverter
In bipolar switch mode only one reference signal is required and compared
with carrier signal and the result of the comparison will produce PWM waveform as
in Figure 2.2, which control the operation of the switches. The switches S1 and S4
are operated to form complementary, i.e. when switch S1 is on, then the switch S4 is
off, the same condition for S2 and S3. When Vtri>Vc then switches S3 and S4 will
turn on, the other two switches are turned off, when Vtri<Vc then switches S1 and S2
will turn on, the other two switches are turned off.
vc
2vtri
Vdc
vAB
-Vdc
Figure 2.2: Bipolar mode
11
In unipolar mode two reference signals are required to compare with the
triangular signal to obtain pulses that are required to operate the switches as shown in
Figure 2.3. Table 2.1 shows the operation of the switches, where 1 indicates the
switch is ON and 0 indicates the switch is OFF.
Table 2.1: Operation of the switches
Comparing Signal
S1
S2
S3
S4
Vtri<Vc
1
0
0
0
Vtri>Vc
0
1
Vtri>-Vc
0
0
0
1
0
0
Vtri<-Vc
0
0
0
1
vc
Vtri
-vc
vA
vB
vAB
Figure 2.3: Unipolar mode
12
2.3 Three-phase MSMI circuit topology and operation
Figure 1.2 has shown a general configuration of the MSMI. Each module of
the MSMI has the same structure where it consists of cascaded single-phase fullbridge inverter. The total output phase voltage is equal to the summation of the
output voltage of the respective modules that are connected in series, which is close
in form to a sinusoidal waveform as shown in Figure 2.4. The number of DC input
voltages required in this topology depends on the number of levels and the type of
system. The number of modules (m) that is equal to the number of DC sources
required depends on the number of levels (n) of the MSMI. For each phase, the
number of modules m= (n-1)/2. [13]
There are many advantages of using multilevel inverter such as the following:
1. It is structure is simple and consists of fewer components.
2. Multilevel inverters can reach high voltage and reduce harmonics by their own
structures without transformers.
3. It has the ability to reduce the voltage stress on each power device due to the
utilization of multiple levels on the DC bus.
4. It is more suitable for high-voltage and high-power applications than the
conventional inverters.
5. It switches each device only once per line cycle, which generates a multi step
staircase voltage waveform similar to a pure sinusoidal output voltage by increasing
the number of levels.
6. Packaging layout is much easier, because of the simplicity of structure and lower
component count [7].
13
Figure 2.4: Output phase voltage
2.4 A five-level three-phase MSMI
The structure of a wye connected five-level three-phase MSMI is as shown in
Figure 2.5 which consists of two cascaded inverter per phase where each inverter has
two legs, also, each leg has two switches. MSMI APF in each phase produces
current that has the same magnitude with that generated by the nonlinear load, but
different in phase, so that the net resultant current is pure sinusoidal. The capacitor is
charged from the source during the operation of the inverter switching. Voltage
divider is also installed at the APF which sends the divided voltage to the controller.
As the name indicates the output phase voltage has five levels, which include
+2VDC, +VDC, 0, -VDC and -2VDC, based on the Kirchoff's Voltage Law, the voltage
for each phase can be calculated. This output depends on the topology of the
14
operation of the switching. The number of modules required is two, based on the
equation that gives the relationship between n and m.
Figure 2.5: 5-level three-phase wye connected MSMI
2.5 Proposed control for three-phase MSMI
Figure 2.6 shows the proposed block diagram of the five-level three phase
MSMI controller, where VA1, VA2, VB1, VB2, VC1, VC2 are the DC voltages of the
inverter capacitors for the phases A, B and C respectively. For each module in each
phase, the DC voltage and the source current are sensed and sent to the controller.
The DC capacitor voltage is integrated and compared with the source current then the
15
output of the comparator is entered to an R-S flip flop to generate the pulses, which
turn OFF and turn ON the switches, based on the function of the R-S flip flop, which
is exposed in Table 2.1. This operation of integration starts when it gets pulse from
the clock pulse. The ports Q and Q are generated based on the condition that is
required for compensation.
VA1
VB1
VC1
VA2
VB2
VC2
Phase A
Phase B
Phase C
Figure 2.6: Block diagram for control of a 5-level three phase MSMI
Table 2.2: Functions of R-S flip flop
R
S
Q(t+1)
Q(t+1) = Present output of flip flop
0
0
Q(t)
Q(t) = Previous output of flip flop
0
1
1
Activated output = 1
1
0
0
Deactivated output =0
1
1
X
Do not care output = x
The R-S flip flop will receive two signals; one from the comparator through
R input port while the other signal from the clock through S input port. The period
of the clock pulses determines the constant switching frequency operation of the
MSMI while the integrator will reset when the next clock pulse triggers it [11].
16
2.5.1 One Cycle Control Theory
The scheme of the one-cycle control employs an integrator with reset as its
core component to generate triangular carrier waveform, also some logical devices
such as flip flop, clock and comparators are used to produce switching signals to the
multilevel inverter as shown in Figure 2.7.
Figure 2.7: The One-Cycle Control
The switch S is operated according to the switching function k(t) at constant
frequency fs = 1/Ts, as shown in Figure 2.8.
⎧1
k (t ) = ⎨
⎩0
0<t<TON
TON<t<T
s
Figure 2.8: The switch function
(2.1)
17
From Figure 2.8, the switching cycle Ts= Ton+ Toff , where Ton is the time
duration when the switch is on and Toff is the time duration when the switch is off.
The duty-ratio d = Ton/Ts is modulated by an analog control reference vref (t). The
input signal x(t) is chopped by the switch and transferred to the output node of the
switch to form a switched variable y(t). The envelope of the switched variable y(t) is
the same as the input signal x(t), while the frequency and the pulse width of the
switched variable y(t) is the same as that of the switch function k(t), as can be clear
by seen in Figure 2.8.
Y(t) = k(t) x(t)
(2.2)
The switch frequency fs is much higher than the frequency bandwidth of the
input signal x(t); then the effective signal carried in the switch output, i.e. the average
of the switched variable is,[9]
y (t ) =
1
Ts
Ton
∫ x(t )dt
0
(2.3)
y (t ) ≅ x(t )d (t )
It is clear from the previous equation that the switched variable y(t) at the
output of the switch is the product of the input signal x(t) and the duty-ratio d(t);
therefore, the switch is nonlinear. If the duty-ratio of the switch is modulated, such
that the integration of the switched variable at the switch output is exactly equal to
the integration of the control reference in each cycle,
Ton
Ts
∫ x(t )dt = ∫ vref dt
0
(2.4)
0
Then the average value of the switched variable at the switch output is
exactly equal to the control reference in each cycle, since the switching period is
constant. Thus, the average of the switched variable is instantaneously controlled
within one cycle,
18
1
y (t ) =
Ts
Ton
T
1 s
(
)
x
t
dt
=
vref dt = vref
∫0
Ts ∫0
(2.5)
This concept is defined as the one-cycle control technique. With one-cycle
control, the effective output signal of the switch is y(t)=vref(t). The one-cycle control
technique turns a non-linear switch into a linear path.
The implementation circuit for one-cycle controlled constant-frequency
switch is shown in Figure 2.7. The core component of the one-cycle control
technique is the integrator and the reset. The integration starts at the moment when
the switch is turned on by the fixed frequency clock pulse. The integration value
vin(t) is compared with the control reference vref(t) instantaneously as follows, where
c is a constant.
t
vin = c ∫ x(t )dt
(2.6)
0
At the instant when vin is equal to vref(t), the controller sends a command to
the switch to change it's condition from on to off state, also the controller will reset
the integrator to zero. The duty ratio d= Ton/Ts is determined by:
dTs
c ∫ x(t )dt = vref (t )
(2.7)
0
Since the switch period Ts is constant and K= l/cTs is a constant, the average
value of the switched variable at the switch output y(t) is [9]:
y (t ) =
1
Ts
dTs
∫ x(t )dt = Kv
0
ref
(t )
(2.8)
19
2.5.2 Proposed UCI APF control method
The control objective of the full-bridge inverter is to provide the reactive and
harmonic current required by the nonlinear load, so that the net current draws from
the AC main is the fundamental active power used at the nonlinear load.
The control key equations for the UCI controller are derived for the threephase MSMI based on the work presented in [14] and [2]. During the positive half
cycle Vga, Vgb, Vgc > 0, S1 is always ON in each phase. The inductor voltages will be
as follows,
VLA(ON)=Vga
for
0<t<dATs
VLB(ON)=Vgb
for
0<t<dBTs
VLC(ON)=Vgc
for
0<t<dCTs
(2.9)
and
⎧⎪V ga − Vdc , d A = d1
VLA (OFF)=Vga-Vo = ⎨
⎪⎩V ga − 2Vdc , d A = d 2
for
dATs<t<Ts
⎧⎪V gb − Vdc , d B = d1
VLB (OFF)=Vgb-Vo = ⎨
⎪⎩V gb − 2Vdc , d B = d 2
for
dBTs<t<Ts
⎧⎪V gb − Vdc , d B = d1
VLC (OFF)=Vgc-Vo = ⎨
⎪⎩V gb − 2Vdc , d B = d 2
for
dCTs<t<Ts
(2.10)
For constant frequency operation, the average inductor in voltage-second of
each phase is approximately balanced during each switching cycle, that is,
20
VLA(ON). dATs + VLA (OFF).(1- dA)Ts= 0
VLB(ON).dBTs +VLB (OFF).(1- dB)Ts = 0
(2.11)
VLC(ON).dCTs + VLC(OFF).(1- dC)Ts = 0
By substituting (2.9) and (2.10) into (2.11)
Vga. dATs + (Vga- V0).(1- dA)Ts = 0
when Vga>0
Vgb.dBTs + (Vgb- V0).(1- dB)Ts = 0
when Vgb>0
Vgc.dCTs + (Vgc- V0).(1- dC)Ts = 0
when Vgc>0
(2.12)
Similarly for the negative half cycle,
Vga. dATs + (Vga+ V0).(1- dA)Ts = 0
when Vga<0
Vgb.dBTs + (Vgb+ V0).(1- dB)Ts = 0
when Vgb<0
Vgc.dCTs + (Vgc+ V0).(1- dC)Ts = 0
when Vgc<0
(2.12)
Suppose,
⎧⎪V g
V ge = ⎨
⎪⎩− V g
⎧⎪i g
and i ge = ⎨
⎪⎩− i g
for
Vg>0
Vg<0
(2.13)
The combination of (2.11), (2.12) and (2.13) yields the relationship between
duty ratios of the switches, input AC voltage for each phase and DC bus voltage of
the APF.
Vgea=V0 (1-dA)
Vgeb=V0 (1-dB)
(2.14)
Vgec=V0 (1-dC)
In order to achieve three phase unity power factor, the control goal of the
APF is therefore to force the AC current to follow the AC input voltage. For each
phase, with Rs as the equivalent sensing resistance,
21
Vge=Rs.ige
(2.15)
Equations (2.14) and (2.15), yield the control key equations as follows,
Rsa.igea= V0 (1-dA)
Rsb.igeb= V0 (1-dB)
Rsc.igec= V0 (1-dC)
(2.16)
CHAPTER 3
DESIGN OF THE SIMULATION BLOCKS
3.1 Introduction
Figure 3.1 shows a flow chart which briefly offers simple steps that are
followed in completing this project. MATLAB/Simulation was utilized in this
project to simulate the nonlinear load and the proposed single-phase and three-phase
MSMI APF with UCI control. Finally, the results obtained from the simulation study
are analyzed.
This chapter shows in detail the simulation blocks of the proposed MSMI
APF as a single-phase shunt APF with UCI control and expands the proposed system
to a three-phase MSMI APF. Also, the controller for the proposed three-phase
MSMI APF is shown in detail. Data type conversion blocks were implemented as an
interface to convert data between the connection of Simulink blocks and
Simpowersystem blocks from Boolean data to Double data type or vice versa.
23
Start
Study the supply current
Literature review
Simulate the nonlinear load and
analyze the generated harmonic
Design single phase MSMI with
UCI controller
Expand single phase MSMI
with UCI to 3-phase
Analyze the results
Troubleshoot
Verification
Is the desired
result achieved?
Yas
Testing and enhancement
Analyze and discussion
End
Figure 3.1: project sequence
No
24
3.2 Setting Simulation parameters
The APF that has been mentioned in the previous two chapters was simulated
using MATLAB/Simulink. To achieve the project goal in an efficient manner,
simulation parameters were placed. By changing the stop time to 0.4second,
maximum simulation step size was selected to be 1e-6, and finally, the solver option
was set at ode 15s (stiff/NDF) solver. The parameters that are used in the proposed
simulation system are listed in Table 3.1.
Table 3.1: Value of the simulation parameters
Parameter
Symbol
Value
Line Voltage
Vg
240 Vrms
Phase voltage
Vga,b,c,
415 V
Line Frequency
F
50 Hz
Resistance
Rl
250 Ω
Capacitance
Cl
1000 µF
APF inductor
Lf
5mH
APF DC-bus capacitor
Cf
500µF
Switching frequency
Fs
10kHz
25
3.3 Single-phase MSMI system
3.3.1 Single-phase nonlinear load
Figure 3.2 shows a single-phase nonlinear load, which is represented by a
full-bridge uncontrolled diode rectifier parallel with an R-C load.
Nonlinear full bridge diode rectifier with R-C load
k
m
k
is
T4
m
T1
Diode
Scope
Diode1
a
a
i pcur
R1
C
T o Workspace
R-L
+
i
-
is
CM
T2
T3
R2
m
k
k
m
AC
Diode3
a
a
Diode2
Figure 3.2: Nonlinear load full bridge diode rectifier with R-C load
26
3.3.2 Schematics of single-phase MSMI APF
The structure of a single-phase MSMI APF is shown in Figure 3.3. It consists
of eight switching devices with two DC-link capacitors. An MSMI consists of
cascaded full bridge inverters with separate DC sources (SDCS). Two modules of a
full-bridge inverter are required to get a five-level MSMI.
Figure 3.3: Single-phase MSMI APF
27
3.3.3 Schematics of the controller of single-phase MSMI
Figure 3.4 illustrates the schematic diagram of the controller for a singlephase MSMI. The controller for module 1 is similar to that of module 2, whereby
each controller will obtain input from its corresponding module. Each flip-flop has
the duty to control each leg of the MSMI.
Unified Constant Frequency Integration (UCFI) Controller
S-R
Flip-Flop
DT5
1
DTC1
double
Integrator
-K-
1
s
Gain1
-1
1
Ts1
boolean
Q
Out1
In1
S
DTC
RO
boolean
<=
DT4
!Q
2
Ts2
Scope
Gain2
R
double
1.5 Const2
controller for module 1
Out2
2
In2
0.1
Gain4
3
S-R
Flip-Flop1
DT1
DT2
Out3
Q
S
!Q
R
RO1
DT3
DT6
4
Ts3
boolean
double
double
Gain3
boolean
<=
-1
Out4
DT11
7
S-R
Flip-Flop2
double
Out7
Ts5
Scope1
Gain6
Integrator1
-K-
1
s
boolean
Q
S
!Q
R
DT10
8
DTC3
double
DTC2
RO2
boolean
<=
1.25 Const1
Out8
DT7
5
S-R
Flip-Flop3
Q
S
!Q
R
DT12
6
double
Ts6
boolean
double
Out5
DT8
DT9
boolean
RO3
Gain7
<=
-1
Out6
Figure 3.4: UCI controller for single-phase MSMI
Gain5
-1
3
Ts4
In3
controller for module 2
28
The entire single-phase MSMI with UCI controller is shown in Figure 3.5. It
can be noticed that, the MSMI is connected in parallel with a point between the
source and nonlinear load, where the filter current will be generated to compensate
the distortion accrued from the nonlinear load, so that the source current remain
sinusoidal.
Figure 3.5: Single-phase MSMI APF system
29
3.4 Three-phase MSMI system
3.4.1 Three-phase nonlinear load
Figure 3.6 shows a three-phase nonlinear load that is used in this project. The
load is represented by a full bridge uncontrolled diode rectifier parallel with R-C load
in each phase. In1, In2, In3 are connected to the supply terminals Va, Vb and Vc
respectively.
Figure 3.6: Three-phase nonlinear load
30
3.4.2 Schematics of three-phase MSMI APF
Three-phase structure of the MSMI APF is connected in Wye connection as
shown in Figure 3.7 which consists of twenty-four switching devices with six DClink capacitors. The three-phase MSMI consists of cascaded full-bridge inverters
with separate DC sources (SDCS). Two modules of the full-bridge inverter in each
phase are required to get a five-level MSMI. The number of modules per phase for
an M level MSMI is equal to (m-1)/2. In25, In26 and In27 are connected to a point
between the source and the three-phase nonlinear load.
Figure 3.7: Three-phase MSMI APF
31
3.4.3 Schematics of the controller for a three-phase MSMI
The UCI controller for a three-phase MSMI is similar to that used in singlephase, where each phase of the three-phase system has its own controller as depicted
in Figure 3.8. From Figure 3.8, In1 and In3 are connected to the capacitor voltage of
module 1 and module 2 for phase A while In2 is connected to the main current for
phase A. Similar connections are also made for the other two phases.
32
Figure 3.8: UCI controller for three-phase MSMI system
33
The overall APF system of the three phase MSMI with UCI controller is
shown in Figure 3.9.
Figure 3.9: Three-phase MSMI APF system
CHAPTER 4
SIMULATION RESULTS AND ANALYSIS
4.1 Introduction
This chapter presents the results obtained from the simulation to support the
theoretical and the equations in chapters II. The simulation results are shown and
analyzed in this chapter in two main sections which are single-phase MSMI system
and three-phase MSMI system.
4.2 Generation of switching signal
The switching signals of leg A and leg B are controlled by comparing the
carrier signal with two reference signals. Carrier signals can be obtained from the
integrated output voltage of the integrator. The integrator is enhanced with a reset to
repeat the process after each cycle of integration. The signal that is produced from
the comparison is fitted to a flip-flop. The output signal from the flip-flop is used to
change the switching status (ON or OFF).
35
Figure 4.1 shows a small section of the carrier signal and reference signals for
controlling module 1 of phase A in the three-phase MSMI. The previous explanation
and following figures are valid for module 2 of phase A. The other two phases B and
C of the three-phase MSMI give similar results as that of phase A.
Figure 4.1: A small section of the carrier signal and reference signals
Figure 4.2 shows the input signal to R port of the flip-flop that is generated
by the comparison between the carrier signal and the reference signal for leg A.
However, the S port receives its signal from a clock with constant frequency pulses;
in this case the constant frequency is equal to 10 kHz, as in Figure 4.3.
Figure 4.2: Input signal to R port of the flip-flop for leg A
36
Figure 4.3: Input signal to S port of the flip-flop for leg A
The output signals from the R-S flip-flop is shown in figure 4.4 and 4.5, the
Q port signal of the flip-flop will control switch S1 while the complement signal
Q will control switch S2.
Figure 4.4: Control signal for switch S1
Figure 4.5: Control signal for switch S2
37
Controlling leg B is the same as leg A, where the input signal to the R port of
the flip-flop is obtained from the comparison of the carrier signal with the reference
signal for leg B as shown in Figure 4.6. Figure 4.7 shows the input signal to the S
port of the flip-flop when controlling leg B.
Figure 4.6: Input signal to R port of the flip-flop for leg B
Figure 4.7: Input signal to S port of the flip-flop for leg B
Figures 4.8 and 4.9 show the control switching signals for switch S3 and S4
respectively, obtained in a similar fashion as mention previously.
38
Figure 4.8: Control signal for switch S3
Figure 4.9: Control signal for switch S4
39
4.3 Single-phase MSMI system
4.3.1 The single-phase nonlinear load
The single-phase nonlinear load is represented by a full-bridge diode rectifier
in parallel with an R-C load. The load is connected to an AC supply as in Figure 3.2.
The AC input current drawn by the nonlinear load is shown in Figure 4.10. It is clear
that the current waveform encounters high distortion and its harmonic component is
very high. The harmonic spectrum is shown in Figure 4.11 with the value of the total
harmonic distortion at 146.73%.
Figure 4.10: Waveform of source current caused by diode rectifier with RC load
40
Figure 4.11: Source current harmonic components
4.3.2 Compensation with single-phase MSMI APF
The nonlinear current is compensated using a single-phase MSMI APF
associated with UCI control. The simulation result was taken during steady state
condition. Figure 4.12 shows the supply current to the nonlinear load after
compensation by the MSMI. The current wave form is close to sinusoidal form
compared with the original input current to the nonlinear load. The THD is reduced
from 146.73% to 6.32%. Figure 4.13 shows the current harmonic component.
Figure 4.12: Source current waveform after compensation.
41
Figure 4.13: Harmonic spectrum of source current after compensation.
42
4.4 Three-phase MSMI system
4.4.1 The three-phase nonlinear load
As mentioned in the previous chapter, the three-phase nonlinear load is
represented by a full-bridge uncontrolled diode rectifier parallel with an R-C load in
each phase. Figures 4.14, 4.15 and 4.16 show the three-phase AC input currents
drawn by the nonlinear load and their harmonic current components for phases A, B
and C.
F F T w in d ow : 5 o f 2 0 c y c le s o f s e lec t e d s ig n al
15
10
5
0
-5
-1 0
-1 5
0.3
0.3 1
0. 3 2
0.3 3
0 .3 4
0.35
Tim e (s )
0 .3 6
0 .3 7
0.38
0 .3 9
Figure 4.14-a: Source current waveform before compensation for phase A
F u n d a m e n t a l (5 0 H z ) = 2 . 4 , T H D = 1 4 6 . 7 3 %
100
90
Mag (% of Fundamental)
80
70
60
50
40
30
20
10
0
0
10
20
30
40
50
H a rm o n i c o rd e r
60
70
80
90
100
Figure 4.14-b: Harmonic spectrum of source current before compensation for Phase A
0.4
43
Figure 4.15-a: Source current waveforms before compensation for Phase B
Figure 4.15-b: Harmonic spectrum of source current before compensation for Phase B
Figure 4.16-a: Source current waveforms before compensation for Phase C
44
Figure 4.16-b: Harmonic spectrum of source current before compensation for Phase C
4.4.2 Compensation with three-phase MSMI APF
The nonlinear current is compensated using a three-phase MSMI APF
associated with UCI control. Figure 4.17 shows the three-phase current of the threephase MSMI. This current will compensate the nonlinear current to become
sinusoidal waveform.
Figure 4.17-a: Compensation current produced by three-phase MSMI APF for phase A
45
Figure 4.17-b: Compensation current produced by three-phase MSMI APF for phase B
Figure 4.17-c: Compensation current produced by three-phase MSMI APF for phase C
The wave shape of the three phase AC source current waveform after
compensation by the proposed configuration of the three phase MSMI APF, is shown
in Figures 4.18a, 4.19a and 4.20a for phases A, B, C, respectively, which are nearly
similar to sinusoidal with slight distortion. The THD of the three-phase AC main
current as shown in Figures 4.18b, 4.19b and 4.20b for phases A, B, C, respectively,
is greatly reduced to about 5%, which exhibit superior results.
Figure 4.18-a: Waveform of source current after compensation for phase A
46
Figure 4.18-b: Harmonic spectrum of source current after compensation for phase A
Figure 4.19-a: waveform of source current after compensation for phase B
Figure 4.19-b: Harmonic spectrum of source current after compensation for phase B
47
Figure 4.20-a: waveform source current after compensation for phase C
Figure 4.20–b: Harmonic spectrum of source current after compensation for phase C
Figure 21 shows that the supply current is forced to be in phase with the
voltage at the AC main which indicates that unity power factor of the three-phase
system is achieved.
400
300
200
100
0
-100
-200
-300
Figure 4.21-a: Input supply current in phase with input phase voltage at AC mains
after compensation of MSMI APF for Phase A
48
400
300
200
100
0
-100
-200
-300
Figure 4.21-b: Input supply current in phase with input phase voltage at AC mains
after compensation of MSMI APF for Phase B
400
300
200
100
0
-100
-200
-300
Figure 4.21-c: Input supply current in phase with input phase voltage at AC mains
after compensation of MSMI APF for Phase C
4.5 Load changes
A load change has also been conducted to test the ability and flexibility of the
proposed three-phase MSMI APF configuration in compensating the current
harmonics. The load is changed from 250 Ω to 200 Ω. Figure 22 shows the
compensation current generated by the proposed three-phase MSMI. The
instantaneous compensation from the MSMI APF has proven its flexibility in
handling load change. From Figure 23 it can be noticed that the current drawn from
49
the AC supply remains a sinusoidal waveform without being affected by the changes
that occurs at the load.
Figure 4.22: Compensation current to the changing load
Figure 4.23: Source current drawn from the AC input with change in load
4.6 Discussion
The overall results of the designed three-phase MSMI APF with UCI control
have shown that the MSMI APF has managed to compensate the distortion in the line
current caused by nonlinear load which in this case is represented by a full-bridge
diode rectifier connected in parallel with an R-C load. Based on the results, the
proposed system is capable of responding effectively to the harmonics caused by the
three-phase diode rectifier. The total harmonic distortion of the source current
50
obtained from the nonlinear load without compensation is too high; about 146.73%
in each phase. For the single-phase case when compensation is made with the
proposed MSMI APF, the total harmonic distortion is reduced to 6.32%, which is
fairly good. For the three-phase when compensation on the harmonic distortion is
made with the proposed three-phase MSMI APF with UCI control, more reduction in
total harmonic distortion percentage was obtained, where it can be measured as 5.8%
in phase A, 5% in phase B and 4.59% in phase C.
In a nutshell, the performance of the MSMI APF using the UCI control is
better in three-phase than in the single-phase system.
CHAPTER 5
CONCLUSION
5.1 Conclusion
The increasing use of nonlinear loads in distribution systems has resulted in
excessive harmonic injection and reactive power burden in the utility. The nonlinear
load draws voltage and current waveforms pollution of power system more than
before. To overcome this problem a three-phase MSMI active power filter system is
proposed for high voltage/high power applications. The implemented three-phase
MSMI with UCI control has successfully given a better impact on harmonics
mitigation in the power system.
A five-level three-phase MSMI APF with UCI controller is employed in this
project to reduce voltage stress on the inverter switches at high power application.
A superior impact on harmonics mitigation in the power system was achieved by
using the proposed system. By using a three-phase MSMI APF with UCI control
about twenty nine times of THD reduction can be gained. The current compensation
is performed in the manner of cycle by cycle using the three-phase MSMI APF with
UCI controller, so that the compensated net current matches the input voltage
closely, thus achieving a three-phase unity power factor.
52
The capability of the three-phase MSMI APF with UCI controller provides a
flexible solution for power quality control. In a nutshell, the proposed three-phase
MSMI APF system is simple, robust and possesses reliable characteristic that has
shown satisfactory performance in the lessening of harmonic current problems in
power system.
5.2 Future work
The future works that can be considered are as follows:
•
Hardware implementation of the three-phase MSMI APF system is
recommended as an extension to the simulation project for verification
purpose.
•
Higher levels of the MSMI can be considered to obtain better results in terms
of harmonic current compensation and further reduce the voltage stress on the
switching devices.
•
The proposed three-phase MSMI APF system can be considered for small
load and heavy load.
53
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54
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13. N. A. Azli and A.H. Mohd Yatim, “Modular Structured Multilevel Inverter for
High Power AC Power Supply Applications”, Industrial Electronics, ISIE 2001.
IEEE International Symposium on Volume: 2, 12-16 June 2001 Pages: 728-733.
14. N. A. Azli, P. Y. Lim, "Modular Structured Multilevel Inverter with Unified
Constant-Frequency Integration Control for Active Power Filters", IEEE PEDS 2005
15. Nabae, A., Takahashi,I. And Akagi, H. (1981). “A Neutral Point Clamped PWM
Inverter.” IEEE Transactions on Industry Applications, Vol. 17, No. 5, pp. 518-523.
16. Taotao Jin, Jun Wen, and Keyue Smedley, "Control and Topologies for Threephase Three-level Active Power Filters" pp 450-455.
17. Taotao Jin and Keyue M. Smedley, "Operation of Unified Constant-frequency
Integration Controlled Three-phase Active Power Filter with Unbalanced Load",
2003 IEEE.
55
18. IEEE PES Harmonic Working Group. “Characteristics and Modeling of
Harmonic Sources—Power Electronic Devices”. IEEE TRANSACTIONS ON
POWER DELIVERY, VOL. 16, NO. 4, OCTOBER 2001.
19. Leow, Pei Ling "SVM based hysteresis current controller for a three phase active
power filter".
20. F.Z. Peng, J. W. McKeever, D. J. Adams, “Cascade Multilevel Inverters for
Utility Applications.” Industrial Electronics, Control and Instrumentation, 1997,
IECON 97, 23rd International Conference on, volume: 2, 9-14 Nov. 1997, pg 437442.
21. Mark McGranaghan "Active power filter design and specification for control of
harmonics in industrial and commercial facilities" Electrotek Concept, Inc. Knoxville
TN, USA.
22. Haque, M. T. “Single Phase PQ Theory for Active Filters”. 2002 IEEE Region
Conference on Computers, Communications, Control and Power Engineering. Oct
28-31. TENCON ’02 Proceedings. 2002. vol. 3: 1941-1944.
23. S. Buso, L. Malesani, “Comparison of Current Control Techniques for Active
Filter Applications”, IEEE Trans on Industrial Electronics. vol. 45. No.5, October
1998.
24. Integrated Publishing, Electrical Engineering Training Series,
http://www.tpub.com/neets/book23/101a.htm
56
APPENDIX A
Table of Current Distortion Limits in IEEE Std 519
Harmonic current limits for nonlinear loads at the point-of-common coupling with
other loads at voltages of 2.4 to 69 kV
Maximum harmonic current distortion in % of fundamental
Harmonic Order (Odd Harmonics)
ISC/IL
<20*
20-50
50-100
100-1000
>1000
TDD
<11
11 ≤h<17
17 ≤h<23
23 ≤h<35
35 ≤h
4.0
7.0
10.0
12.0
15.0
2.0
3.5
4.5
5.5
7.0
1.5
2.5
4.0
5.0
6.0
0.6
1.0
1.5
2.0
2.5
0.3
0.5
0.7
1.0
1.4
Where ISC = Maximum short circuit current at PCC.
IL = Maximum load current (fundamental frequency) at PCC.
5.0
8.0
12.0
15.0
20.0
57
APPENDIX B
MATLAB Documentations for Simulation Model
MSMI_UCI
Details for MSMI_UCI
Ali Ibrahim Ismaail
25-April-2007
58
Model – MSMI_UCI
Full Model system
MSMI_UCI
1. MSMI with UCI controller for phase A
2. MSMI with UCI controller for phase B
3. MSMI with UCI controller for phase C
4. Three-phase nonlinear load
Simulation Parameter
Value
Start time
0.0
Stop time
0.4
Solver
Variable-step, ode 15s (stiff/NDF)
Max step size
1e-6
Min step size
Auto
Initial step size
Auto
Relative tolerance
1e-3
Absolute tolerance
Auto
Maximum order
5
Refine factor
1
Zero cross
On
59
MSMI-UCI system
Table 1- Three-phase AC Voltage Source Block Properties
Name
A
P
F
Stime
Measure
PSBOutput type
AC
AC1
AC2
415
415
415
0
120
240
50
50
50
0
0
0
None
None
None
1
1
1
Table 2- Bus Bar Block Properties
Name
PSBoutput type
T connector
T connector1
1
1
Table 3- Current Measurement Block Properties
Name Phasor Simulation
Output Type
PSBOutput Type
PSBequivalent
CM
CM1
CM2
Magnitude
Magnitude
Magnitude
01
01
01
0
0
0
off
off
off
60
Table 4- From Block Properties
Name
GotoTag
Defined In
FromipcurA
FromipcurB
FromipcurC
ipcurA
ipcurB
ipcurC
Selector
Selector
Selector
Table 5- Goto Block Properties
Name
Goto Tag
Tag Visibility
Used By
GotoipcurA
GotoipcurB
GotoipcurC
ipcurA
ipcurB
ipcurC
Local
Local
Local
Scope, Gain4, To Workspace, Scope1
Scope2, Gain4, To Workspace1, Scope3
Scope4, Gain4, To Workspace2, Scope5
Table 6- PSB option menu block Block Properties
Name
Frange
Ylog
Xlog
Save
Powergui
[0:2:500]
off
on
Off
Variable
ZData
Structure
Source
Zoom FFT
On
Start time
0.3
cycles
DisplayStyle
fundamental
FreqAxis MaxFrequency
frequencyindice
1
4
50
on
5000
1
Rms Steady
display
Ts
methode
frequency
Echo messages
1
off
0
off
60
off
Table 7- Series RLC Branch Block Properties
Name
a
b
c
Measure
PSBOutput Type
5 mH
10
5e-3
Inf
None
1
5 mH1
10
5e-3
Inf
None
1
5 mH2
10
5e-3
Inf
None
1
61
Table 8- To Workspace Block Properties
Name
VariableName
MaxDataPoints
Decimation
SampleTime
SaveFormat
To
Workspace1
To
Workspace2
To
Workspace3
ipcurA
Inf
1
-1
array
ipcurB
Inf
1
-1
array
ipcurC
Inf
1
-1
array
Table 9- Ground Block Properties
Name
PSBOutput
Ground (output)
Ground (input)1
1
0
62
Appendix
Table 1- Block Type Count
BlockType
Count
Block Names
Goto
From
3
3
SubSystem
13
Scope
To Workspace
Series RLC Branch
PSB option menu
block (m)
Current measurement
(m)
Bus Bar (m)
AC Voltage Source
(m)
Ground
3
3
3
GotoipcurA, GotoipcurB, GotoipcurC
FromipcurA, FromipcurB, FromipcurC
MSMI with UCI controller for Phase A, MSMI with UCI
controller for Phase B, MSMI with UCI controller for
Phase C, 3-phaseNon Linear Load, multilevel1for Phase
A, multilevel2for Phase A, multilevel1for Phase B,
multilevel2for Phase B, multilevel1for Phase C,
multilevel2for Phase C, UCI controller for phase A, UCI
controller for phase B, UCI controller for phase C
Scope, Scope1, Scope2
To Workspace1, To Workspace2, To Workspace3
5 mH, 5 mH1, 5 mH2
1
powergui
3
CM,CM1.CM2
2
T connector, T connector1
3
AC, AC1 AC2
2
Ground (output), ground (input1)
Table 2- Model Variables
Name
Parent Blocks
ipcurA
FromipcurA
ipcurB
FromipcurB
ipcurC
FromipcurC
Source
Gotoipcur
powergui
Calling string
ipcurA
ipcurA
ipcurB
ipcurB
ipcurC
ipcurC
source
63
MSMI-UCI System /Three-phase diode Rect. RC load
64
Table 1- Bus Bar Block Properties
Name
input output
Bus Bar (thin
horiz)
Bus Bar (thin
horiz)2
Bus Bar (thin
horiz) 1
Bus Bar (thin
horiz)3
Bus Bar (thin
horiz) 4
Bus Bar (thin
horiz) 5
L connector
T connector
T connector 1
T connector 2
T connector 3
4
0
0
4
4
0
0
4
4
0
0
4
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
PSBOutputType
111111111111111111111111111111111111111111
111111111111111111111111111111111111111111
111111111111111111111111111111111111111111
111111111111111111111111111111111111111111
111111111111111111111111111111111111111111
111111111111111111111111111111111111111111
111111111111111111111111111111111111111111
111111111111111111111111111111111111111111
111111111111111111111111111111111111111111
111111111111111111111111111111111111111111
111111111111111111111111111111111111111111
111111111111111111111111111111111111111111
1
1
1
1
0
Table 2- Current Measurement Block Properties
Name
Phaser simulation
Output type
PSBOutputType
PSBequivalent
CM1
CM2
CM3
off
off
off
Magnitude
Magnitude
Magnitude
01
01
01
0
0
0
Table 3- Diode Block Properties
Name
Ron
Lon
Vf
IC
Rs
Cs
PSBOutputType
Diode
Diode 1
Diode 2
Diode 3
Diode 4
Diode 5
Diode 6
Diode 7
Diode 8
Diode 9
Diode 10
Diode 11
0.01
0.01
0.01
0.01
0.01
0.01
0.01
0.01
0.01
0.01
0.01
0.01
0
0
0
0
0
0
0
0
0
0
0
0
0.8
0.8
0.8
0.8
0.8
0.8
0.8
0.8
0.8
0.8
0.8
0.8
0
0
0
0
0
0
0
0
0
0
0
0
10
10
10
10
10
10
10
10
10
10
10
10
0.01e-6
0.01e-6
0.01e-6
0.01e-6
0.01e-6
0.01e-6
0.01e-6
0.01e-6
0.01e-6
0.01e-6
0.01e-6
0.01e-6
10
10
10
10
10
10
10
10
10
10
10
10
65
Table 4- In port Block Properties
Name
Port
PortDimensions SampleTime
Defined In
In1
In2
In3
1
2
3
-1
-1
-1
constant
constant
constant
-1
-1
-1
Table 5- Ground Block Properties
Name
PSBOutput
Ground (input)
0
Table 6- Series RLC Branch Block Properties
Name
R
L
C
Measure
R1
R2
R3
R4
R5
R6
1mH
1mH 1
1mH 2
RC1
RC2
RC3
125
125
125
125
125
125
1e-3
1e-3
1e-3
0
0
0
0
0
0
0
0
0
1e-3
1e-3
1e-3
0
0
0
inf
inf
inf
inf
inf
inf
inf
inf
inf
1000e-06
1000e-06
1000e-06
None
None
None
None
None
None
None
None
None
None
None
None
Table 7- Terminator Block Properties
Name
T1
T2
T3
T4
T5
T6
T7
T8
T9
T10
T11
T12
PSBOutputType
1
1
1
1
1
1
1
1
1
1
1
1
66
Table 8- To Workspace Block Properties
Name
To
Workspace
To
Workspace1
To
Workspace 2
VariableName
MaxDataPoints
Decimation
SampleTime
loadcurA
inf
1
-1
loadcurB
inf
1
-1
loadcurC
inf
1
-1
SaveFormat
Array
Array
Array
Table 9- Voltage Measurement Block Properties
Name
PhasorSimulation OutputType
PSBOutputType PSBequivalent
VM
VM 1
VM 2
VM 3
VM 4
VM 5
VM 6
VM 7
VM 8
off
off
off
off
off
off
off
off
off
0
0
0
0
0
0
0
0
0
Magnitude
Magnitude
Magnitude
Magnitude
Magnitude
Magnitude
Magnitude
Magnitude
Magnitude
0
0
0
0
0
0
0
0
0
67
Appendix
Table 1- Block Type Count
Block Type
Count
Terminator
12
Series RLC Branch (m)
12
Scope
12
Diode (m)
12
Voltage Measurement (m)
9
Bus Bar (m)
9
To Workspace
3
SubSystem
Ground
Inport
1
1
3
3
Current Measurement (m)
Block Names
T1, T2, T3, T4, T5, T6, T7, T8, T9, T10, T11,
T12
R1, R2, R3, R4, R5, R6, 1mH, 1mH1, 1mH2,
RC1, RC2, RC3
Scope1, Scope2, Scope3, Scope4, Scope5,
Scope6, Scope7, Scope8, Scope9, Scope10,
Scope11, Scope12
Diode, Diode1, Diode2, Diode3, Diode4,
Diode5, Diode6, Diode7, Diode8, Diode9,
Diode10, Diode11
VM, VM1, VM2, VM3, VM4, VM5, VM6,
VM7, VM8
Bus Bar (thin horiz), Bus Bar (thin horiz)1,
Bus Bar (thin horiz)2, Bus Bar (thin horiz)3,
Bus Bar (thin horiz)4, Bus Bar (thin horiz)5, T
connector, T connector1, T connector2, T
connector3, L connector
To Workspace, To Workspace1, To
Workspace2
Three-phase nonlinear load
Ground (input)
In1, In2, In3
CM1, CM2, CM3
68
MSMI-UCI System / MSMI Level1for phase A
Table 1- Bus Bar Block Properties
Name
Input Output PSBOutput Type
Bus Bar (thin horiz)
4
0
Bus Bar (thin horiz)1
0
4
T connector
N/A
N/A
111111111111111111111111111111111111111111
111111111111111111111111111111111111111111
111111111111111111111111111111111111111111
111111111111111111111111111111111111111111
1
Table 2- Current Measurement Block Properties
Name
Phasor Simulation
Output Type
PSBOutput Type
PSBequivalent
CM2
off
Magnitude
01
0
Table 3- Ideal Switch Block Properties
Name
Ron
Initial state
Rs
Cs
PSBOutputType
S1
S2
S3
S4
0.01
0.01
0.01
0.01
Open
Open
Open
Open
0.1
0.1
0.1
0.1
0.01e-6
0.01e-6
0.01e-6
0.01e-6
10
10
10
10
69
Table 4- Inport Block Properties
Name
Port
Port dimension
Sample Time
Defined In
In1
In2
In3
In4
In5
1
2
3
4
5
-1
-1
-1
-1
-1
-1
-1
-1
-1
-1
Constant
DT1
DT6
DT4
DT5
Table 5- Outport Block Properties
Name
Port
Output When Disabled
Initial Output
Used By
Out1
1
held
[]
Out2
2
held
[]
Gain1, Scope1
Terminator, Terminator1,
T connector
Table 6- Series RLC Branch Block Properties
Name
R(Ohms)
L(H)
C(F)
Measure
PSBOutput Type
Rf1
Rf2
Cf1
100
100
0
0
0
0
inf
inf
500e-6
None
None
None
1
1
1
Table 7- Terminator Block Properties
Name
T1
T2
T3
T4
Table 8- To Workspace Block Properties
Name
To
Workspace1
VariablName MaxDtaPoints Decimation
IapfA
inf
1
SampleTime SaveFormat
-1
Array
Table 9- Voltage Measurement Block Properties
Name
Phasor Simulation
Output Type
PSBOutput Type
PSBequivalent
VM
VM 1
VM 2
off
off
off
Magnitude
Magnitude
Magnitude
0
0
0
0
0
0
70
Appendix
Table 1- Block Type Count
Block Type
Count
Block Names
Inport
Terminator
Ideal Switch (m)
Series RLC Branch (m)
Scope
5
4
4
3
4
Bus Bar (m)
3
Voltage Measurement (m)
Outport
To Workspace
3
2
1
SubSystem
3
Current Measurement (m)
1
In1, In2, In3, In4, In5
T1, T2, T3, T4
S1, S2, S3, S4
Rf1, Rf2, Cf1
Scope1, Scope2, Scope3, Scope4
Bus Bar (thin horiz), Bus Bar (thin oriz)1, T
connector
VM, VM1, VM2
Out1, Out2
To Workspace1
MSMILevel1 for phase A, MSMILevel1 for
phase B, MSMILevel1 for phase C
CM2
71
MSMI-UCI System / MSMI Level2for phase A
Table 1- Bus Bar Block Properties
Name
Input Output PSBOutput Type
Bus Bar (thin horiz)
4
0
Bus Bar (thin horiz)1
0
4
T connector
N/A
N/A
111111111111111111111111111111111111111111
111111111111111111111111111111111111111111
111111111111111111111111111111111111111111
111111111111111111111111111111111111111111
1
Table 2- Ideal Switch Block Properties
Name
Ron
Initial state
Rs
Cs
PSBOutputType
S5
S6
S7
S8
0.01
0.01
0.01
0.01
Open
Open
Open
Open
0.1
0.1
0.1
0.1
0.01e-6
0.01e-6
0.01e-6
0.01e-6
10
10
10
10
72
Table 3- Inport Block Properties
Name
Port
Port dimension
Sample Time
Defined In
In1
In2
In3
In4
In5
1
2
3
4
5
-1
-1
-1
-1
-1
-1
-1
-1
-1
-1
Constant
DT11
DT10
DT12
DT7
Table 4- Outport Block Properties
Name
Port
Output When Disabled
Initial Output
Used By
Out1
Out2
1
2
held
held
[]
[]
Gain5
T connector
Table 5- Series RLC Branch Block Properties
Name
R(Ohms)
L(H)
C(F)
Measure
PSBOutput Type
Rf1
Rf2
Cf1
100
100
0
0
0
0
inf
inf
500e-6
None
None
None
1
1
1
Table 6- Terminator Block Properties
Name
T1
T2
T3
T4
Table 7- Voltage Measurement Block Properties
Name
Phasor Simulation
Output Type
PSBOutput Type
PSBequivalent
VM
VM 1
off
off
Magnitude
Magnitude
0
0
0
0
73
Appendix
Table 1- Block Type Count
Block Type
Count
Block Names
Inport
Terminator
Ideal Switch (m)
Series RLC Branch (m)
Scope
5
4
4
3
2
Bus Bar (m)
3
Voltage Measurement (m)
Outport
3
2
SubSystem
3
In1, In2, In3, In4, In5
T1, T2, T3, T4
S5, S6, S7, S8
Rf1, Rf2, Cf1
Scope1, Scope2
Bus Bar (thin horiz), Bus Bar (thin oriz)1, T
connector
VM, VM1
Out1, Out2
MSMILevel2 for phase A, MSMILevel2 for
phase B, MSMILevel2 for phase C
74
MSMI-UCI System / UCI controller
Table 1- Constant Block Properties
Name
Value VectorParams1D OutDataType Mode
Const1
1.250
on
Const2
1.500
on
Inherit from 'Constant
value'
Inherit from 'Constant
value'
ConRadix Group
Use specified scaling
Use specified scaling
75
Table 2- DataTypeConversion Block Properties
Name
Data type
DT5
DT4
DT1
DT6
DT11
DT10
DT7
DT12
DTC1
DTC
DT2
DT3
DTC3
DTC2
DT8
DT9
double
double
double
double
double
double
double
double
boolean
boolean
boolean
boolean
boolean
boolean
boolean
boolean
Table 3- DiscretePulseGenerator Block Properties
Name
Ts1
Ts2
Ts3
Ts4
Ts5
Ts6
Pulse
Type
Time
based
Time
based
Time
based
Time
based
Time
based
Time
Based
Amplitude Period
Pulse
Width
Phase
Delay
Sample
Time
VectParas1D
1
1e-4
1
0
1
on
1
1e-4
1
0
1
on
1
1e-4
1
0
1
on
1
5e-5
1
0
1
on
1
1e-4
1
0
1
on
1
1e-4
1
0
1
on
Table 4- Gain Block Properties
Name
Gain
Multiplication
Out Data Type Mode
Gain1
Gain2
Gain3
Gain4
Gain5
Gain6
Gain7
-1
250
-1
0.1
-1
600
-1
Element-wise(K.*u)
Element-wise(K.*u)
Element-wise(K.*u)
Element-wise(K.*u)
Element-wise(K.*u)
Element-wise(K.*u)
Element-wise(K.*u)
Same as input
Same as input
Same as input
Same as input
Same as input
Same as input
Same as input
76
Table 5- Inport Block Properties
Name
Port
Port Dimensions
Sample Time
Defined In
In1
In2
In3
1
2
3
-1
-1
-1
-1
-1
-1
Selector
Selector
Selector
Table 6- Integrator Block Properties
Name
External
Reset
Initial
Condition
Source
Initial
Condition
Limit
Output
Zero Cross
Integrator
Integrator1
rising
rising
internal
internal
0
0
off
off
on
on
Upper
Saturation
Limit
Lower
Saturation
Limit
Show
Saturation Port
Show State
Port
inf
inf
-inf
-inf
off
off
off
off
Absolute
Tolerance
auto
auto
Table 7- Outport Block Properties
Name
Port
Output When
Disabled
Initial
Output
Used By
Out1
Out2
Out3
Out4
Out5
Out6
Out7
Out8
1
2
3
4
5
6
7
8
held
held
held
held
held
held
held
held
[]
[]
[]
[]
[]
[]
[]
[]
Data Type Conversion, Switch
Data Type Conversion, Switch
Data Type Conversion, Switch
Data Type Conversion, Switch
Data Type Conversion, Switch
Data Type Conversion, Switch
Data Type Conversion, Switch
Data Type Conversion, Switch
Table 8- RelationalOperator Block Properties
Name
Operator
Input Same
DT
RO
<=
off
RO1
<=
off
RO2
<=
off
RO3
<=
off
Logic Out Data Type
Mode
Logical (see Advanced
Sim. Parameters)
Logical (see Advanced
Sim. Parameters)
Logical (see Advanced
Sim. Parameters)
Logical (see Advanced
Sim. Parameters)
Logic Data
Type
Zero
Cross
uint(8)
on
uint(8)
on
uint(8)
on
uint(8)
on
77
Table 9- SR-FlipFlop Block Properties
Name
Initial condition
S-R Flip-Flop
S-R Flip-Flop1
S-R Flip-Flop2
S-R Flip-Flop3
0
0
0
0
Table 10- Sum Block Properties
Name
Icon Shape
List of signs
Input Same DT
Out Data Type Mode
Sum1
Sum2
round
round
++
++
off
off
Inherit via internal rule
Inherit via internal rule
Table 11- To Workspace Block Properties
Name
Variable
Name
Max Data
Points
Decimation
Sample
Time
Save Format
To Workspace1
To Workspace2
To Workspace3
To Workspace4
To Workspace5
To Workspace6
To Workspace8
To Workspace9
To Workspace10
To Workspace11
contrl
ref
S1
S2
S3
S4
S5
S6
S7
S8
inf
inf
inf
inf
inf
inf
inf
inf
inf
inf
1
1
1
1
1
1
1
1
1
1
-1
-1
-1
-1
-1
-1
-1
-1
-1
-1
Array
Array
Array
Array
Array
Array
Array
Array
Array
Array
78
Appendix
Table 1- Block Type Count
Block Type
Count
To Workspace
10
DataTypeConversion
16
Outport
Gain
DiscretePulseGenerator
8
7
6
SRFlipFlop (m)
4
RelationalOperator
Inport
Sum
Scope
Integrator
Constant
4
3
2
2
2
2
SubSystem
3
Block Names
ToWorkspace1, ToWorkspace2, ToWorkspace3,
ToWorkspace4, ToWorkspace5, ToWorkspace6,
ToWorkspace8, ToWorkspace9, ToWorkspace10,
ToWorkspace11
DT5, DT4, DT1, DT6, DT11, DT10, DT7, DT12,
DTC1, DTC, DT2, DT3, DTC3, DTC2, DT8, DT9
Out1, Out2, Out3, Out4, Out5, Out6, Out7, Out8
Gain1, Gain2, Gain3, Gain4, Gain5, Gain6, Gain7
Ts1, Ts2, Ts3, Ts4, Ts5, Ts6
S-R Flip-Flop, S-R Flip-Flop1, S-R Flip-Flop2, S-R
Flip-Flop3
RO, RO1, RO2, RO3
In1, In2, In3
Sum1, Sum2
Scope, Scope1
Integrator, Integrator1
Const1, Const2
UCI Controller for phase A, UCI Controller for
phase B, UCI Controller for phase C