Application Report
SLAA639 – July 2014
LC Sensor Rotation Detection With MSP430™ Extended
Scan Interface (ESI)
Thomas Kot
ABSTRACT
This application report describes the implementation of a flow meter using the Texas Instruments
MSP430FR6989 microcontroller with the Extended Scan Interface (ESI) module. This module can provide
a contactless sensing approach to detecting a rotating disc. The number of rotations of the disc indicates
the volume flow of gas or water and can be used to calculate the fee for the user. This application is good
for gas or water meters. This application also includes the necessary information with regard to software
and hardware procedures for the Water Meter Reference Design for two LC Sensors, Using Extended
Scan Interface (ESI) (TIDM-LC-WATERMTR).
The software described in this app note can be downloaded from http://www.ti.com/lit/zip/tidc583.
Topic
1
2
3
4
5
6
7
8
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Page
Introduction ........................................................................................................ 2
Working Principle of LC Sensors ........................................................................... 2
Hardware Implementation With ESI ........................................................................ 6
Software Implementation ...................................................................................... 8
Runtime Calibration With AFE2 ............................................................................ 17
Demo and Operation ........................................................................................... 19
References ........................................................................................................ 26
Schematics........................................................................................................ 26
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Introduction
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Introduction
The TIDM-LC-WATERMTR design uses the EVM430-FR6989 evaluation module and the MSP430FR6989
device to demonstrate the function of the Extended Scan Interface (ESI), which is designed for flow
meters with a rotating disc to measure the flow rate. The ESI is good for LC, reed switch, GMR, and
optical sensors. The MSP430FR6989 is an ultra-low-power MCU with up to 128KB of FRAM for code and
data. Peripherals include RTC, ADC12, CRC, AES256, MPY32, eUSCI for communication, Comp_E for
touch key module, an LCD controller, and six timers. Figure 1 shows a block diagram of the EVM,
including all of the elements in the default EVM and potential add-on modules that can be added.
The main board of the EVM consists of an RF socket, a USB connection, and a dc-dc converter for the
battery power. The RF module is turned off most of the time and is turned on only a few times per day for
transmission of data. While the RF module is turned on, extra power is required. The dc-dc converter can
output enough power to supply the module with high efficiency. All I/O ports are connected to a pack of
through-holes on the PCB of the EVM. With these connections, the designer can add extra flow meter
features like NFC/RFID for prepayment or a motor driver for valve control. A motor board is also provided
to drive a rotor disc to emulate the rotating disc in flow meter. A sensor board with an LC sensor, GMR, or
optical is also provided. In this application note, the LC sensors are used. The application code can be
reused for other type of sensors.
1.1
System Block Diagram
Figure 1. System Block Diagram
2
Working Principle of LC Sensors
The LC sensor consists of an inductor and a capacitor. In the application circuit, 220 pF for the capacitor
and 470 µH for the inductor are used. After the capacitor is charged by a short pulse of period in 1 µs, the
LC sensor starts oscillating with a frequency of 500 kHz, and the signal voltage level decays. Varying with
the inductor and capacitor used, the frequency and decay rate can be varied according to the ambient
environment, like temperature and humidity. In this application note, room temperature is assumed.
MSP430 is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
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When there is a metal approaching the oscillating LC, the signal decays faster due to the energy
absorption by eddy current of the metal part. As shown in Figure 2, by using this characteristic, the LC
sensor is used to identify metal (signal in red) or nonmetal part (signal in blue). A disc that is half covered
by metal and half by nonmetal can be constructed as a moving component to detect the flow rate. The
rotation speed of the disc can then be detected by the LC sensor.
Figure 2. Oscillation Signal of Detection of Metal And Nonmetal Portions of the Rotor Disc
When overlapping these two oscillating signals of metal and nonmetal, the signal level difference of them
is not constant. It starts from a small level to a largest difference in somewhere in the middle part of the
signals and then decreasing to zero. For a maximum detection distance, only the portion of signals with
maximum difference in signal level is measured (see Figure 3). This needs a timer to form a time delay
before comparing these two signals.
Figure 3. Maximum Difference Along the Decaying LC Signal
To detect the metal and nonmetal signals, the EVM needs a reference signal with a voltage level be set in
between the "red" and "blue" of the LC signals. In the ESI module, a DAC with 12-bit resolution is
provided for this function. For analog hysteresis, two voltage references are provided from the DAC
module of the ESI (see Figure 4). A comparator is then used to identify the metal and nonmetal parts of
the disc.
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Working Principle of LC Sensors
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There are two possible positions to place the reference level, the upper range or the lower range of the LC
signal. In the ESI, the operating voltage for the comparator is from VSS to VCC – 1 V, and the operating
voltage for the DAC is from VSS to 0.8 VCC. VCC is usually below 3.3 V. With these electrical characteristics,
if the measurement uses the upper range of the oscillating signal, a time delay is needed to wait until the
LC signal has decayed to below VCC – 1 V. However, when using the lower range of the signal, it can start
functioning from VSS up. This eliminates the need for a long delay in the beginning part of the signals. In
this EVM, the lower range is used (see Figure 4). The signal level of a sensor is measured with the
voltage level of the selected peak of its LC signal, which varies from metal to nonmetal.
Figure 4. Reference Voltages for Detection of LC Signal to Identify Metal and Nonmetal Parts
Two LC sensors are used for the detection of both clockwise and counterclockwise rotation. In a flow
meter, such as a water meter, there is a bounce back of water flow when the tap is closed. This makes
the rotor disc turn backward and forward repeatedly before the flow rate becomes zero. To eliminate the
counting error with a single sensor, two sensors can count the number of rotations for both directions and
give a correct result.
In Figure 5, a logic low is output when the sensor detects the metal part, and a logic high is output when
the sensor detects the nonmetal part. The two sensors are located in 90° apart. Therefore, the signal of
one sensor is always 90° out of phase to the other sensor. This configuration gives four states of the two
sensors: 00, 01, 11, and 10. The sequence of these four states provides direction of rotation.
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Figure 5. Logical Signal Output of Comparator of ESI for Two Sensors
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Hardware Implementation With ESI
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Hardware Implementation With ESI
Figure 6 shows the block diagram of the ESI. There are three clock sources, ACLK of 32768 Hz, a built-in
internal oscillator (ESIOSC) of ESI for a high-frequency clock source, and the SMCLK using the DCO. In
the EVM, ACLK and ESIOSC are used.
Figure 6. Block Diagram of the ESI
There are two analog front ends, AFE1 and AFE2. AFE1 provides VCC/2 as the ac ground of the LC signal
and an excitation circuit to provide a short pulse in the range of microseconds for the excitation of LC
oscillation. Up to four sensors can be connected to the four channels of the ESI. For each channel, the
sensors are excited one by one.
The input signal of a sensor is connected to the positive input of a comparator. The negative input is
connected to the 12-bit DAC. Two registers of the DAC for each channel provide two reference levels to
implement hysteresis that avoids signal oscillation in the output of the comparator.
The 32 registers of the Timing State Machine (TSM) provide the timing sequence to control the on and off
of the internal parts of the ESI module. The output of the comparator for each channel is stored in a
register of the Preprocessing Unit (ESIPPU). After the completion of one cycle of measurement for all
sensors (using two sensors in this EVM), an ESISTOP signal is generated to trigger the operation of
Processing State Machine (PSM) to analysis the rotation direction and count the rotation number. The
maximum number of processing channels is three out of four selectable channels. The channels are
selected in ESIPPU, and their outputs are processed by PSM.
The AFE2 has DAC registers and a comparator. The inputs to the AFE2 share the same channels
selection circuit of AFE1. With this configuration, the AFE2 measures the same signal that is being
measured by AFE1. The outputs of AFE2 are stored in the ESIPPU. This design enables AFE2 to be the
mirror of AFE1 and to perform a runtime recalibration of AFE1 without interfering with the normal operation
of AFE1.
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3.1
Rotor Plate and Detection Distance
The rotor plate or disc is used to detect the flow rate. This is a round disc that is half covered with metal
and half covered with nonmetal. For a reasonable detection distance, the metal area cannot be too small,
because a larger metal area has more absorption rate of the magnetic energy from the inductor of the LC
sensor. The detection distance also relies on the concentration of the magnetic field from the inductor.
When the disc is rotating, the LC sensor gives a large signal in the nonmetal part and a small signal in the
metal part. The signal level is a continuous change from high to low and low to high. When the sensor is
located in between the metal and nonmetal area, the signal is also between the maximum and minimum
levels (see Figure 7).
Figure 7. Signal Levels From Two Sensors
Each sensor signal has a 90° phase angle from the other. When the rotor disc rotates in clockwise
direction, sensor 2 detects a high signal level when it is in the middle of nonmetal portion, and the signal
level gradually decreases to a low level when detecting the middle of the metal portion.
There are two voltage references from DAC. When signal is in high level, the lower voltage reference is
used, interpreting with logic high. As the rotor disc is rotating, the signal level changes from high to low,
then low to high, and repeats continuously. A logic low results when the signal is lower than the lower
reference. At the same time, the voltage reference is switched to the upper voltage reference to form
analog hysteresis. It has logic high again only when the signal level is higher than the upper voltage
reference. Similarly at this time, the voltage reference is switched to lower voltage reference.
Four states (11, 01, 00, and 10) are obtained, and each state occupies the same period of time. If the
sensors are not placed 90° apart, some states have a shorter time period. This implies that a higher
sampling rate is required to detect them, which increases power consumption.
The maximum detection distance is obtained with a large area of metal portion and an inductor designed
to concentrate the magnetic field on to the metal area. Sensors have to output 90° phase angle. For a
maximized solution, the rotor disc must be half covered with metal and half with nonmetal.
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Software Implementation
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Software Implementation
Figure 8 shows a flowchart of the default software that is provided with the EVM.
Figure 8. Flowchart of the EVM Software
4.1
Operation of Software
The software is optimized to reduce power consumption of the system (see Figure 8). It starts with
initialization which includes ports setting for low current leakage, LCD, ESI internal oscillator calibration,
ESI registers, sampling rate, timing state machine (TSM) with auto-TSM calibration, optimal DAC level,
and processing state machine (PSM) table setting. After initialization, the EVM works well in low-power
mode with the ESI and LCD as the only modules that are actively running.
To avoid too many interrupts to wake up the CPU, the Q6 flag in PSM table is used. This flag is set only
when the rotor disc is rotating. The system is in LPM3 mode when there is no rotation. To further lower
the power consumption, the designer can disable the LCD and add a key button to wake up the LCD
when reading is necessary.
For stable operation throughout the life time of the system, runtime recalibration for tracking the drift of the
sensors and system is provided. A timer with variable constant "Time_to_Recal" is used to count the
period for recalibration. The software is design to operate two sensors. For easy description in this
document, only the first channel or channel 0 is mentioned. The second channel works in a similar way.
4.2
Initialization
Port and LCD setting for low-power operation
To enable low power consumption during ESI operation, the CPU wakes only on interrupts. In normal
state, the rotor disc is not rotating and no interrupt is generated. Q6 of the PSM in normal running mode
and the ESISTOP flag during runtime recalibration mode are the only interrupt flags that wake the CPU.
All ports must be set to minimize low leakage. Unused pins should all be set to output zero.
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Port 1.2 is used as ADC input for the key pad. This port pin is set to be input mode with the pullup resistor
enabled.
For Port 9 pins that are multiplexed with ESICH0 to ESICH3, all P9SEL0 and P9SEL1 register bits must
be set to 1 for the operation of the ESI function, even when working with two channels. At the same time,
the peripheral comparator has pins multiplexed with ESI. The port disable register must be set to prevent
parasitic current during the transition level of the gates in the port pins. To disable the port, CECTL3 must
be set to 1.
In the application code, the LCD is always on. To further lower the power consumption, it is suggested to
turn the LCD off and to turn it only for reading.
4.3
ESI Internal Oscillator Calibration
There are three clock sources associated with the ESI: ACLK, SMCLK, and the internal oscillator of ESI.
The internal oscillator and the SMCLK are the sources of high-frequency clocks which could be used in
the TSM timing control. For low power and standalone operation of ESI, the internal oscillator is preferred.
However, this clock frequency varies from device to device, so an initial calibration is required. The
calibration code can be found in ESI_ESIOSC.c.
4.4
Sensor Sampling Rate Setting
For normal operation, the sampling rate of ESI is the frequency of triggering a LC oscillation so as to
detect the position of the sensors over the rotating disc. The register used is ESITSM. The equation to
determine the rate is as follows:
Sampling Rate = Maximum Rotation Rate × Number of Samples per Rotation
Number of Samples per Rotation = 2 × 360 / (Angle of smaller portion of the Disc – Angle of sensor
pair)
In the half metal, half nonmetal rotating disc, the angle of smaller portion is 180°. The angle of sensor pair
is 90°. The detection area is then the difference between these number which is 90°. There are two
samples in this area to make sure it is detected (see Figure 9a). For one complete rotation, the number of
samples are determined. The sampling rate is found by multiplying this number by the maximum rotation
rate. Therefore, if a maximum rotation rate is 50 rotations per second, the required sampling rate is 400
Hz. In the code of reference design, 500 Hz is used.
Figure 9. Sampling Rates
For runtime recalibration to determine the signal level of sensors, a faster sampling rate is required to
enable the recalibration algorithm to be completed within a certain period of time. For example, a
recalibration process is triggered when a sensor reaches the middle part of nonmetal area. For a
maximum rotation rate of 50 per second, sampling rate of 2000 is required to complete the process with 5
samples in one eighth of a rotation (see Figure 9b). In the reference code, 2340 Hz is used. The equation
is as follows:
Sampling Rate = Number of Samples / Time for recalibration
Time for recalibration = 1 / Maximum Rotation Rate / 8
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Auto-TSM Calibration
The Timing State Machine (TSM) is to control the timing of each state and the registers used are
ESITSMx. Referring to the user guide, the 5 most significant bits of the register are to determine the
period of time for the corresponding state to last for. Afterwards, the TSM jumps to the next state.
Repeating this process until the ESISTOP bit is set to complete one TSM cycle. An ESISTOP flag is
generated and the TSM is repeated after waiting for a time interval of one sampling period. (An auto
repeating setting is used in this reference code. However the TSM can be set to be restarted by software
control).
The following is the initial setting of TSM registers.
ESITSM0
ESITSM1
ESITSM2
ESITSM3
ESITSM4
ESITSM5
ESITSM6
ESITSM7
ESITSM8
ESITSM9
ESITSM10
ESITSM11
ESITSM12
ESITSM13
ESITSM14
ESITSM15
ESITSM16
ESITSM17
ESITSM18
ESITSM19
ESITSM20
ESITSM21
ESITSM22
ESITSM23
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
0x0400;
0x202C;
0x0404;
0x0024;
0x0024;
0x0024;
0x0024;
0x0024;
0x0024;
0xF134;
0x5974;
0x0400;
0x0400;
0x20AD;
0x0485;
0x00A5;
0x00A5;
0x00A5;
0x00A5;
0x00A5;
0x00A5;
0xF1B5;
0x59F5;
0x0200;
//
//
//
//
//
//
//
//
//
//
//
//
//
//
//
//
//
//
//
//
//
//
//
//
DAC=off,
DAC=off,
DAC=off,
DAC=off,
DAC=off,
DAC=off,
DAC=off,
DAC=off,
DAC=off,
DAC=on,
DAC=on,
DAC=off,
DAC=off,
DAC=off,
DAC=off,
DAC=off,
DAC=off,
DAC=off,
DAC=off,
DAC=off,
DAC=off,
DAC=on,
DAC=on,
stop
CA=off,
CA=off,
CA=off,
CA=off,
CA=off,
CA=off,
CA=off,
CA=off,
CA=off,
CA=on,
CA=on,
CA=off,
CA=off,
CA=off,
CA=off,
CA=off,
CA=off,
CA=off,
CA=off,
CA=off,
CA=off,
CA=on,
CA=on,
1xACLK
5xESICLK, excitation
1xACLK
1xESIFCLK, delay tunable
1xESIFCLK, delay tunable
1xESIFCLK, delay tunable
1xESIFCLK, delay tunable
1xESIFCLK, delay tunable
1xESIFCLK, delay tunable
31xESIFCLK,
OUTPUT LATCHES ENABLED, 12xESICLK
1xACLCK, internally damped
1xACLCK, internally damped
5xESICLK, excitation
1xACLK
1xESIFCLK, delay tunable
1xESIFCLK, delay tunable
1xESIFCLK, delay tunable
1xESIFCLK, delay tunable
1xESIFCLK, delay tunable
1xESIFCLK, delay tunable
31xESIFCLK
OUTPUT LATCHES ENABLED, 12xESICLK
The corresponding LC signal of channel 0 is shown in Figure 10.
At point 1, the TSM starts with ESITSM0 of 0x0400 which is the beginning state of TSM cycle. This state
is to synchronize with the rising edge of ACLK. This ensures the following timing of states to be the same
for every TSM cycles.
At point 2, ESITSM1 is to make an excitation pulse for the channel 0 with timing last for 5 clock of ESI
internal oscillation. The length of the pulse must be long enough to ensure the first shot of oscillation to
reach the voltage of VCC + Vdiode ( an internal protection diode of I/O). This makes every oscillation
identical.
At point 3, the LC sensor starts oscillating and its signal amplitude is getting smaller. ESITSM2 last for 1
ACLK. An additional delay with high frequency clock from ESI oscillator is turned on to fine tune the delay
time and last for a period which is the sum of the time delay from ESITSM3 to ESITSM8. By using
ESITSM2 to ESITSM8, an auto TSM time delay function "TSM_Auto_cal()" is constructed to tune the time
delay of the LC signal, so as to reach an optimal signal level and timing to capture a signal ( in point 5).
This function is to add on one high frequency clock cycle delay every time. The captured signal is then
measured by a function "FindDAC()" to find its voltage level, by using the comparator and the DAC as
reference voltage. With this setting, only the peak level is measured. In the reference design, an inverter is
enabled to invert the output of comparator so that the crisis of LC signal is measured. If plotting the value
of the measured level into a graph, an envelope of the signal with a stair-case-shaped curve is obtained.
when the signal level has reached the pre-defined level "LC_Threshold_TSM_CAL", an optimal delay is
obtained at a point which is the mid-way to the next crisis.
At point 4, ESITSM9 is to turn on the comparator and DAC output. A proper delay is taken for the settling
time.
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At point 5, ESITSM10 is to latch in the output of comparator and stored in ESIPPU. One of function of
high frequency clock delay from ESITSM3 to ESITSM8 is to select a mid-point between two peaks or two
crisis for triggering the latch in function. The selection of mid-point provides the maximum margin of phase
noise to detect the peak of the LC signal.
At point 6, ESITSM11 and ESITSM12 switch off the comparator and DAC. They also provide two ACLK of
time for internal damping of the LC sensor of channel 0, by shorting the sensor. This makes sure that it
does not keep oscillating and induce crosstalk noise to the next channel.
From ESITSM13 to ESITSM22 is repeating the same process for channel 1. ESITSM23 generates a stop
signal to complete the TSM cycle.
Figure 10. Different States Along an LC Signal
4.6
Optimal DAC Voltage Level Setting
The DAC in the ESI generates a reference voltage for the comparator. To eliminate or reduce the
oscillation when the voltage of input signal is close to voltage reference of DAC, two DAC registers
"ESIDA1R0" and "ESIDAC1R1" are used to provide two reference voltage for analog hysteresis. This is
especially important when the sensor is on the boarder line of metal and nonmetal part of the rotor disc.
The issue is how large should it be for the separation of these two levels. If the separation is small,
oscillation may frequently occur. If it is too large, it increases the voltage difference required between the
maximum and minimum of sensor signals and, in turn, reduces the detection distance.
Noise level of signal is then a significant data for the optimal setting of analog hysteresis. With a closer
look to the sensor signal (see Figure 11) there is a small noise when the sensor is located onto either the
metal or nonmetal part of the disc. This noise can be measured wherever the signal level is. As noise
amplitude is within the "Noise Level", seldom exceeding it, the optimal hysteresis setting can then be set
as the mid-level between the maximum and minimum of signal plus and minus the noise level.
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ESIDAC1R1 = (Max_DAC_Ch0 + Min_DAC_Ch0)/2 + Noise_level; // "+" for INV version, "-" for nonINV version
ESIDAC1R0 = (Max_DAC_Ch0 + Min_DAC_Ch0)/2 - Noise_level;
// "-" for INV version, "+" for nonINV version
Figure 11. Noise Level of Signal Determines Values of Two Reference Voltages of DAC
The noise level is measured when the rotor disc is not turning. The function "Find_Noise_level()" is
responsible for this measurement, in which "FindDAC_Fast_Range()" is the algorithm to search for the
signal level. This function is to measure the variation of signal for 0.5 second with the sensors staying at
the same position over the disc. The noise level is then the difference between the maximum and
minimum of the measured data.
The Max_DAC_Ch0 and Min_DAC_Ch0 of channel 0 are respectively the maximum and minimum value
of the sensor signal with the rotor disc rotating. To measure these two data, in the function "Set_DAC()",
the rotor must be rotating for 1 second, making sure the metal and nonmetal part of the disc are
measured. The channel 1 is also going through the process at the same time.
To ensure the data correctly measured, the axis of rotor disc must be mounted tightly and in a
perpendicular position in reference to the senors. If it is loosely mounted, the minimum of the signal varies
because of the varying distance between the sensors and the metal part of the disc. For nonmetal part,
there is no such variation (see Figure 12a).
To increase the difference between the maximum and minimum of the signal, a metal with higher energy
absorption rate can work. From the testing, stainless steel has better absorption rate than copper, while
copper is better than aluminum (see Figure 12b).
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Figure 12. Signal Levels
4.7
Processing State Machine (PSM)
The function of PSM is to process the input from ESIPPU so as to detect the position of the sensors on
the rotor disc and then increase or decrease the rotation counters ESICNT0, ESICNT1 and ESICNT2
when the rotor disc is rotating. ESICNT0 is to record the number of rotation when the rotor disc is rotating
in clockwise direction, in parallel to the direction of water flow, while the ESICNT2 is for anti-clockwise
rotation. ESICNT1 is the resultant number of rotations, which records the data equivalent to ESICNT0 –
ESICNT2. Interrupt flags can be set on Q6 and Q7 of the PSM vector. There are some other interrupt
settings with the outputs of the counters. The family user's guide (SLAU367) explains them in more detail.
In this application code, only the Q6 of PSM vector is used for the interrupt call.
There are two channels, Ch0 and Ch1. The sensors for these channels report their detection in a timely
manner according to the sampling rate. When the rotor disc is rotating, there generates four inputs
namely: 00, 01, 11 and 10 (see Figure 13). At the same time, the position of sensors over the rotor disc
can be determined. Four states are used to represent the location of the sensors, namely: S0, S1, S2, and
S3, with S0 indicating both sensors are on metal part; S1 for Ch0 on nonmetal and Ch1 on metal; S2 for
both sensors on nonmetal part; and S3 for Ch0 on metal and Ch1 on nonmetal part. The direction of
rotation can then be found by processing the sequence of the states.
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Figure 13. Different States of LC Sensors When Rotor is Rotating
4.7.1
State Diagram
A state diagram can then be used to clearly show the flow of the states (see Figure 14) with different
inputs and outputs. At the starting of the ESI module, the sensors are located at one of the four positions
over the rotor disc and a state is given. If the disc is not rotating, there the sensor input does not change
and the same state is kept. The output is 0. For this description, assume that the initial state is S0. The
nonrotating disc makes the sensors have 00 as input to the PSM. The state is be kept in S0 and the
output is 0.
When the rotor is rotating clockwise, the state diagram flows from S0 to S1, S1 to S2, S2 to S3, S3 to S0,
with inputs of 01, 11, 10, and 00, respectively, and continuously repeats this sequence as it keeps
rotating. At the same time, the state diagram also outputs 1 when there is a state change. This increases
the counters ESICNT0 and ESICNT1 by 4 for a complete clockwise rotation.
Figure 14. State Diagram of Two Sensors
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When the rotor disc is rotating in an anti-clockwise direction, the state diagram flows in the other direction,
from S0 to S3, S3 to S2, S2 to S1, S1 to S0, with inputs of 00, 11, 01, and 10, respectively, and continues
to repeat this sequence when it keeps rotating. The output is -1 for each change of state, which decreases
the counts ESICNT1 and ESICNT2 by 4 for a complete anti-clockwise rotation.
This state diagram includes a feature to adjust to vibration of the rotor disc. Assuming that the disc is
rotating in clockwise when water is flowing, the counter increases in this direction. However, there is a
bouncing back of water when the tap is closed. A backward flow causes the rotor to rotate in an opposite
direction, and the state diagram reduces the counters accordingly. In the critical moment when the water
is flowing forth and backwards rapidly, the counters have to count up and down without missing a single
count.
The state diagram also provides a state change when there is an error input, for example, from S0 to S2
or S1 to S3. This can happen when the rotation speed is too high for the sample rate or when there is an
error from the sensor input. To eliminate the error input, the sampling rate must be set high enough in
reference to the maximum rotation speed. In addition, proper noise level and DAC level settings are
required. If there has error input from a sensor, the error state simply outputs 0, which does not affect the
counter, and quickly returns to the normal state. The worst case would miss two counts if it does not go
back to the previous state. In this application code, there is no extra error handling for this type of error.
However, Q7 of the PSM table is defined for generating an interrupt flag for this error. If designers need to
build a dedicated error handling code, an interrupt is needed. Designers have to enable the interrupt
enable bit for their interrupt coding.
4.7.2
State Diagram to State Table
To convert the state diagram into a PSM table (see Table 1), S0 to S3 must be given a code. Put S0 = 00,
S1 = 01, S2 = 11, and S3 = 10. In the PSM table, Q0 to Q7 represent the bit number of the register. The
next state is represented by Q3 and Q0; the output is set by Q1 and Q2. When Q1 is set, the ESICNT0
and ESICNT1 are increased by 1. When Q2 is set, the ESICNT1 is decreased by 1 and ESICNT2 is
increased by 1. Q7 is set when there is an error input, indicated with red highlight in Table 1. Q6 is set
when there is a state change in a clockwise direction, indicating with blue highlight in Table 1. Q4 and Q5
are not used in the application code.
The Q6 is another interrupt flag of PSM table. In the application code, when Q6 is set, it triggers an
interrupt code to update the LCD display. This is a design for low power consumption for CPU being in
idle mode when the rotor disc is not rotating.
Table 1. State Table Converted From State Diagram
Present State of ESI
Input
Output
Next State
Interrupt to have
Q7
Q6
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
1
0
1
0
1
0
0
1
0
1
0
1
0
0
0
0
0
1
1
0
0
1
1
1
0
0
1
0
0
1
0
0
0
0
0
0
1
0
1
0
0
0
1
0
0
0
1
1
0
0
0
1
0
1
0
0
1
1
1
0
1
1
1
0
1
1
0
0
0
0
1
0
0
0
1
1
0
0
1
0
0
0
1
1
0
1
0
1
0
0
0
1
0
0
0
1
0
1
1
1
0
1
1
0
0
1
1
0
0
0
0
0
0
1
0
1
1
0
1
1
0
0
1
0
0
1
1
1
0
0
1
1
0
0
1
1
1
1
1
0
0
1
1
0
0
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Ch1
Ch0
Q2 (-1)
Q1 (+1)
Q3
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Software Implementation
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By rearranging the bit order in Table 1, the PSM table is formed as Table 2.
The Hex values are then put into the code and stored in the RAM of PSM.
Table 2. PSM Table by Rearrangement of Bit Order of the State Table
16
Error Flag
Rotation
Flag
Q7
Q6
Q5
Q4
Q3
Q2
Q1
Q0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
1
1
0x43
0
0
0
0
1
1
0
0
0x0C
1
0
0
0
1
0
0
1
0x89
0
0
0
0
0
1
0
0
0x04
0
0
0
0
0
0
0
1
0x01
1
0
0
0
1
0
0
0
0x88
0
1
0
0
1
0
1
1
0x4B
0
1
0
0
0
0
1
0
0x42
1
0
0
0
0
0
0
1
0x81
0
0
0
0
1
0
0
0
0x08
0
0
0
0
1
1
0
1
0x0D
1
0
0
0
0
0
0
0
0x80
0
0
0
0
0
1
0
1
0x05
0
1
0
0
1
0
1
0
0x4A
0
0
0
0
1
0
0
1
0x09
Rearrangement of Bit Order
LC Sensor Rotation Detection With MSP430™ Extended Scan Interface
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Copyright © 2014, Texas Instruments Incorporated
Hex Value
0x00
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Runtime Calibration With AFE2
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5
Runtime Calibration With AFE2
When a flow meter is installed, it is expected to run for many years until the battery is drained. Due to
environmental variation and component decay, the sensor signals will drift. To follow this signal drift, the
reference voltages from DAC have to follow. This process requires a runtime recalibration of the system
(see Figure 15). At each recalibration, the system is still working well and needs only a small calibration to
follow a small drift. With this operation, even there is a large up or down drift over a long time, this runtime
calibration keeps the DAC reference voltage at the optimal level.
As the system is battery powered, power consumption is a concern. In the ESI module, there has an extra
analog front end (AFE2) with duplicated DAC and comparator, connecting to the common sensors of
AFE1. When processing the calibration, AFE2 is switched on to measure the same signals that AFE1 is
detecting. No extra excitation of a dummy signal is required. This cuts half of the power consumption that
is required by the Scan Interface (SIF) in the MSP430FW42x series.
Figure 15. Flowchart of Runtime Recalibration
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Runtime Calibration With AFE2
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Operation of Recalibration
During the normal operation, there is a timer to activate the recalibration process. The timer interval
should be set within a period during which a small drift expected. The designer can modify the constant
"Time_to_Recal" to change the timing. The input clock for the timer is 32768 Hz.
When the process is activated, the MCU is in LPM3 mode until an interrupt is triggered by the Q6 flag
from the PSM connected to AFE1. During recalibration, AFE1 continues normal operation, and AFE2 is
turned on for signal level measurement. The Q6 flag is set only when the rotor disc is rotating in clockwise
direction and there is a change of state of a sensor. This ensures low-power operation during
recalibration. See the flow chart of runtime recalibration in Figure 15.
As the two sensors are located in 90° apart, one sensor must be located at the center of the metal or
nonmetal area of the rotor disc when the other sensor detects a change of state by AFE1 (see Figure 16).
Using this property, the signal level of this sensor is always the maximum or minimum. As this is
measured with the rotor disc rotating, the measurement algorithm is required to be fast and time
deterministic. By using the function AFE2_FindDAC_Fast_Successive() for AFE2, the signal level can be
measured in five measuring cycles. A faster sampling rate of 2340 Hz is required to make sure that the
sensor under measurement is kept on the same side of the disc and the signal level remains in a constant
level. For sampling rate setting, see the section of sampling rate.
Figure 16. Transition States Of A Sensor
Because AFE1 and AFE2 are both inside the single MCU, the environment is identical to both of them.
When there is a drift in AFE2, there is a similar drift in AFE1. Therefore, when a drift is determined in
AFE2, the new level of AFE1 can be added with the same level of drift.
After four complete rotations, the recorded measurements are used to calculate the drift of AFE2 and the
new DAC level of AFE1, as follows for channel 0. similar for channel 1.
AFE2_drift0 = (AFE2_Max_DAC_Ch0 + AFE2_Min_DAC_Ch0)/2 - AFE2_base0;
New_level = AFE1_base0 + AFE2_drift0;
Delta = (ESIDAC1R0+ESIDAC1R1)/2 - New_level;
If "Delta", the difference between the new level and previous level of DAC of AFE1, is less than 10, a valid
measurement is confirmed and the new DAC values are set for channel 0 of AFE1, as calculated in these
equations.
The designer can modify the condition value for a validation of measurement, but it cannot be larger than
the half of the normal separation of maximum and minimum. If the condition exceeds this value, it can be
treated as noise, because the ESI is still working during recalibration, and expects a small drift.
ESIDAC1R0 = New_level - Noise_level;
ESIDAC1R1 = New_level + Noise_level;
After that, the recalibration is finished. The sampling rate is changed back to normal rate and the timer
restarts for the next calibration. There is a timeout timer of two seconds during the recalibration process. If
the rotor does not move for two seconds, the process times out, the sampling rate is changed back to the
normal rate, and the application waits for the next calibration.
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Demo and Operation
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6
Demo and Operation
6.1
Main Board
The main board of the EVM uses the MSP430FR6989 device with an LCD display (see Figure 17). This
board is powered by USB and provides 3.3 V VCC through a buck converter. It can be divided into seven
parts, which are shown in Table 3 and described in Table 3.
This board is a platform for the development of a flow meter with RF and USB connection. The application
software includes code for the ESI module for flow measurement. The default software does not have
code for connection to Part 1, Part 5, and Part 6.
Figure 17. Main Board of EVM
Table 3. Main Board Description
Part 1
A socket for RF modules of sub-1GHz or 2.4GHz, connecting to the MCU with SPI and IO. For details of RF modules,
read CC1120 development kit.
Part 2
Through-holes connecting to I/O that are otherwise unconnected. The headers are the I2C connection.
Part 3
The JTAG debugger and a USB HID interface. The HID interface can connect the board to PC with a dedicated GUI.
Part 4
A reset button. This board does not have on/off switch. To re-start the firmware, push the reset button.
Part 5
This device contains five push-button switches. The firmware does not have code for this part. Designers can use it to
implement a key control.
Part 6
LED indicator, connected to PJ.2 and PJ.3. To reduce current consumption, remove the jumpers.
Part 7
The socket for the Sensor board to connect to the ESI of the MCU.
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Demo and Operation
6.2
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Sensor Board
The sensor board is designed for various sensors: LC, GMR, or optical sensors (see Figure 18). On the
left part of the board, only LC sensors can be soldered on. The sensors can be placed in different
orientation. For half covered metal rotor disc, the sensors are placed in 90° apart. On the right part of the
board, GMR and optical sensors can be connected.
Figure 18. Sensor Board
6.3
Motor Board
The motor board is to drive the rotor disc to simulate water or gas flow (see Figure 19). The battery socket
is on the back of the board. The parts of the board are described in Table 4.
Figure 19. Motor Board
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LC Sensor Rotation Detection With MSP430™ Extended Scan Interface (ESI)
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Table 4. Motor Board Description
6.4
Part 1
Two pins connected to external power
Part 2
Power switch to turn the motor board on or off
Part 3
2-wire Spy-Bi-Wire mode of JTAG. This can be used to program or debug the firmware.
Part 4
Variable resistor to vary the rotation speed.
Part 5
These buttons are to select the rotation direction and also act as a stop button.
Part 6
This is an infrared sensor that provides feedback on the rotation speed of the rotor disc.
Part 7
A rotor disc with half covered by copper.
Part 8
A connection header for I2C and UART.
Demonstration
Figure 20 shows the complete EVM hardware set up to run the demonstration code.
Figure 20. Complete Evaluation Hardware
Procedure to use the EVM with Auto-Calibration in initialization of code:
1. Set the rotor at 5 mm from the sensor board and switch off the motor.
2. Power the main board with a USB cable.
3. At start up, a TSM calibration starts and the LCD displays "0". Wait until the LCD displays "8888", then
go to next step.
4. Switch on the motor and do not adjust the distance between rotor and sensors. A calibration that
determines the proper reference voltages for the DAC starts now and lasts for one second.
5. The initial calibration is now finish. The LCD continues to display the number of rotations.
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Demo and Operation
6.4.1
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Current Consumption
Figure 21 shows the current consumption of the MCU with two LC sensors, excluding the current into the
LCD, power, and other modules on the board. The data is taken by measuring the current flowing into the
MCU connected to two sensors with the LCD off, varying with different sampling rate in the SIF of
MSP430FW42x and the ESI of MSP430FR6989.
Figure 21. Current Consumption of ESI With Two Sensors
From the experimental data, the current consumption in MSP430FR6989 is half of that for a
MSP430FW42x system with the same type of LC sensors.
• For the MSP430FR6989 with two LC sensors, the current per sample is less than 9 nA.
• For the MSP430FW42x with two LC sensors, the current per sample is less than 17 nA.
Current consumption of the MSP430FR6989 running the ESI without sensors is also given. This shows
that the LC sensors account for half of the total current consumption of the system. To further reduce the
current consumption, well designed LC sensors are necessary.
22
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6.5
Signal Level Searching Algorithm
There are two channels in the algorithm. For simplicity in the following flow charts, only the first channel is
shown. The other channel is processed with the same algorithm.
6.5.1
FindDAC()
Figure 22 shows the flowchart of FindDAC().
Figure 22. FindDAC() Flowchart
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Demo and Operation
6.5.2
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FindDAC_Fast_Range()
Figure 23 shows the flowchart of FindDAC_Fast_Range().
Figure 23. FindDAC_Fast_Range Flowchart
24
LC Sensor Rotation Detection With MSP430™ Extended Scan Interface
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6.5.3
AFE2_FindDAC_Fast_Successive()
Figure 24 shows the flowchart of AFE2_FindDAC_Fast_Successive().
Figure 24. AFE2_FindDAC_Fast_Successive() Flowchart
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25
References
7
www.ti.com
References
1. MSP430FR698x(1), MSP430FR598x(1) Mixed-Signal Microcontrollers (SLAS789)
2. MSP430FR58xx, MSP430FR59xx, MSP430FR68xx, and MSP430FR69xx Family User's Guide
(SLAU367)
3. Code Composer Studio (CCSTUDIO) Version 5.5
4. Rotation Detection With the MSP430 Scan Interface (SLAA222)
5. SmartRF Transceiver Evaluation Board User's Guide (SWRU294)
8
Schematics
The following figures show the schematics of the main, sensor, and motor boards in the EVM430-FR6989.
26
LC Sensor Rotation Detection With MSP430™ Extended Scan Interface
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Schematics
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1
2
3
4
5
6
R405
33
USB_SHIELD
GND
J400
3V3
BUCK_3V3
6
A
TPS62237DRYR
U403
5
7
VBUS
R408
1.5k
4
8
3
D+
2
D-
9
10
R407
3
DP0
22
R409
VBUS
C415
1µF
DM0
VIN
5
1
EN
MODE
FB
A
2.2µH
2
NR3010T2R2M
6
GND
22
C417
1µF
4
1
SW
L400
11
C401
4.7µF
ZX62R-B-5P
C403
22pF
C402
0.1µF
C404
22pF
GND
GND
U400
4
GND
2
NC
VCC
IO2
IO1
GND
1
5
3
GND
GND
GND
3.3V BUCK REGULATOR
TPD2E001DRLR
Place 0.1uF as close to
U400 vcc as possible.
Also ensure sufficient metal
for Vcc and Gnd for ESD
conduction.
GND
MICRO USB
3V3
B
R404
47k
HUB_RESET
USB HUB
GND
HUB RESET
DM1
DP1
11
12
15
16
DM3
DP3
19
20
DM4
DP4
23
24
HUB_XTAL1
30
HUB_XTAL2
29
DM4
31
15.0k
R402
2
1
DM2
DP2
C400
0.1µF
R403
DM0
DP0
27
3V3
DP4
GND
DM3
HUB_RESET
8
15.0k
R401
C
15.0k
R400
4
3
25
DP3
15.0k
DM0
DP0
10
14
18
22
OVRCUR1
OVRCUR2
OVRCUR3
OVRCUR4
DM1
DP1
DM2
DP2
DM3
DP3
8
R418
IN
5
10k (DNP)
C414
1µF (DNP)
3V3
NC
2
6
7
EN
N/C
N/C
N/C
OUT
NR/FB
PAD
GND
1
3
C416
0.01µF (DNP)
C418
2.2µF (DNP)
4
TPS73533DRB (DNP)
26
EXTMEM
DM4
DP4
U402
9
NC
13
NC
17
NC
21
PWRON1
PWRON2
PWRON3
PWRON4
LDO_3V3
VBUS
6
EEDATA /GANGED
GND
5
EECLK
XTAL1
32
SUSPND
GND
GND
NC NC
NC
XTAL2
OPTIONAL 3.3V LDO
TSTMODE
TSTPLL/48MCLK
BUSPWR
RESET
33
EP
VCC
VCC
7
28
GND
GND
C
THERMAL CONNECTION ONLY
TUSB2046BIRHBR
C407
0.1µF
GND
B
500mA LDO
U401
3V3
C408
0.1µF
GND
HUB3 and HUB4 NOT USED
GND
GND
3V3
HUB_XTAL1
R413
HUB_DM2
1
Q400
CSTCR4M00G15L99
2
R412
HUB_DP2
HUB_DM1
DP2
HUB_DP1
C406
10pF
R419
R420
DNP
0
BUCK_3V3
DP1
22
R414 R415
15.0k 15.0k
C410
10pF
C412
10pF
3
C405
10pF
DM1
22
R416
22
R410 R411
15.0k 15.0k
LDO_3V3
R417
DM2
22
D
R406
GND
POWER SWITCHES
HUB_XTAL2
GND
27
6MHZ XTAL
GND
BRIDGE USB HUB FILTER
GND
GND
GND
GND
GND
Mod. Date: 27/05/2014
Designed for:Public Release
Project Title: Change in menu Project|Project Options|Parameters
Number: XX####
Rev: E1 Sheet Title:
Texas Instruments and/or its licensors do not warrant the accuracy or completeness of this specification or any information contained therein. Texas Instruments and/or its licensors do not
SVN Rev: Not in version control
Assembly Variant: [No Variations]
Sheet: 1 of 4
warrant that this design will meet the specifications, will be suitable for your application or fit for any particular purpose, or will operate in an implementation. Texas Instruments and/or its Drawn By:
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licensors do not warrant that the design is production worthy. You should completely validate and test your design implementation to confirm the system functionality for your application. Engineer: Enter name of project lead Contact: http://www.ti.com/support
1
2
D
GND
EZFET USB HUB FILTER
3
4
5
http://www.ti.com
?Te xas Instruments 2014
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Figure 25. Schematic, Main Board (1 of 4)
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Schematics
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1
2
3
4
5
C202, C203
near pin
11,15
CAPS
3V3
3V3
BRIDGE_V18
3V3
C208
near pin
53
VBUS
BRIDGE_VUSB
BRIDGE_VCORE
J201
J600
A
6
C204
near pin
40
C203
10µF
C202
0.1µF
C204
0.1µF
C205
0.1µF
C206
0.22µF
C207
0.22µF
C208
0.47µF
4
3
2
1
C209
4.7µF
BRIDGE_UCB0_DRDY
BRIDGE_UCB0_SCL
BRIDGE_UCB0_SDA
R601
2.2K
R600
2.2K
3 BRIDGE_UCA0_RXD
2 BRIDGE_UCA0_TXD
1
A
TSW-103-07-G-S
TSW-104-07-G-S
GND
GND
GND
GND
GND
GND
GND
GND
EXTERNAL I2C
EXTERNAL UART
BRIDGE_LED0
BRIDGE_LED1
BRIDGE_LED2
BRIDGE_TARGET_UART_TXD
BRIDGE_TARGET_UART_RXD
BRIDGE_TARGET_READY_IN
BRIDGE_TARGET_READY_OUT
BRIDGE_LED3
MSP430F5528 COMMUNICATIONS BRIDGE
J200
1
1
2
3
4
5
6
7
Q200
MURATA -FILTER_CSTCR4M00G15
TSW-107-07-G-S
3
2
BRIDGE_RST
BRIDGE_TCK
BRIDGE_TMS
BRIDGE_TDI
BRIDGE_TDO
BRIDGE_TEST
GND
GND
OPTIONAL JTAG PROGRAMMING
BRIDGE_XT2OUT
GND
BRIDGE_UCB0_SDA
BRIDGE_UCB0_SCL
BRIDGE_UCB0_DRDY
BRIDGE_UCA0_RXD
BRIDGE_UCA0_TXD
34
35
36
37
38
P3.0/UCB0SIMO/UCB0SDA
P3.1/UCB0SOMI/UCB0SCL
P3.2/UCB0CLK/UCA0STE
P3.3/UCA0TXD/UCA0SIMO
P3.4/UCA0RXD/UCA0SOMI
EXTERNAL UART
9
10
BRIDGE_XT2IN
57
BRIDGE_XT2OUT 58
12
13
P2.0/TA1.1
P2.1/TA1.2
P2.2/TA2CLK/SMCLK
P2.3/TA2.0
P2.4/TA2.1
P2.5/TA2.2
P2.6/RTCCLK/DMAE0
P2.7/UCB0STE/UCA0CLK
P4.0/PM_UCB1STE/PM_UCA1CLK
P4.1/PM_UCB1SIMO/PM_UCB1SDA
P4.2/PM_UCB1SOMI/PM_UCB1SCL
P4.3/PM_UCB1CLK/PM_UCA1STE
P4.4/PM_UCA1TXD/PM_UCA1SIMO
P4.5/PM_UCA1RXD/PM_UCA1SOMI
P4.6/PM_NONE
P4.7/PM_NONE
P5.0/A8/VREF+/VEREF+
P5.1/A9/VREF-/VEREFP5.2/XT2IN
P5.3/XT2OUT
P5.4/XIN
P5.5/XOUT
P6.0/CB0/A0
P6.1/CB1/A1
P6.2/CB2/A2
P6.3/CB3/A3
P6.4/CB4/A4
P6.5/CB5/A5
P6.6/CB6/A6
P6.7/CB7/A7
4MHZ XTAL
BRIDGE_DP 50
BRIDGE_DM 52
C
BRIDGE_PUR
BRIDGE_PUR
R206
1.5k
R203
HUB_DM1
BRIDGE_V18
BRIDGE_VCORE
55
17
VBUS
BRIDGE_VUSB
53
54
BRIDGE_DM
3V3
27
R201
HUB_DP1
51
BRIDGE_DP
27
11
15
40
PU.0/DP
PU.1/DM
PJ.0/TDO
PJ.1/TDI/TCLK
PJ.2/TMS
PJ.3/TCK
PUR
V18
VCORE
RST/NMI/SBWTDIO
TEST/SBWTCK
VBUS
VUSB
QFN PAD
VSSU
AVSS1
AVSS2
DVSS1
DVSS2
AVCC1
DVCC1
DVCC2
26
27
28
29
30
31
32
33
41
42
43
44
45
46
47
48
64
59
1
B
Red
D200
Green
Green
D201 D202
Green
D203
LEDS
GND
FROM TARGET DATA RDY
TARGET_READY_IN
BRIDGE_READY_OUT
BRIDGE_UCA1_TX
BRIDGE_UCA1_RX
3V3
CONNECTS TO TARGET UART
R209
47k
1
2
3
4
5
6
7
8
60
61
62
63
R205
390
2
P1.0/TA0CLK/ACLK
P1.1/TA0.0
P1.2/TA0.1
P1.3/TA0.2
P1.4/TA0.3
P1.5/TA0.4
P1.6/TA1CLK/CBOUT
P1.7/TA1.0
R204
390
BRIDGE_RST
C210
1000pF
BRIDGE_TDO
BRIDGE_TDI
BRIDGE_TMS
BRIDGE_TCK
C
BRIDGE RESET
BRIDGE_RST
BRIDGE_TEST
GND
3V3
65
49
14
56
16
39
S202
EXTERNAL I2C
BRIDGE_XT2IN
18
19
20
21
22
23
24
25
R202
390
S201
BRIDGE_LED0
BRIDGE_LED1
BRIDGE_LED2
BRIDGE_LED3
2
TARGET TO BRIDGE COMMUNICATION JUMPER
B
1
U200
1
R200
470
J601
1
2
4
6
8
2
1
3
5
7
2
BRIDGE_UCA1_RX
BRIDGE_UCA1_TX
BRIDGE_READY_OUT
TARGET_READY_IN
MSP430F5528IRGCT
C200
10pF
C201
10pF
R211
100
BRIDGE_PUR
GND
GND
GND
USB
R210
1.0Meg
BRIDGE USB BSL
D
GND
D
Mod. Date: 27/05/2014
Designed for:Public Release
Project Title: Change in menu Project|Project Options|Parameters
Number: XX####
Rev: E1 Sheet Title:
Texas Instruments and/or its licensors do not warrant the accuracy or completeness of this specification or any information contained therein. Texas Instruments and/or its licensors do not
SVN Rev: Not in version control
Assembly Variant: [No Variations]
Sheet: 2 of 4
warrant that this design will meet the specifications, will be suitable for your application or fit for any particular purpose, or will operate in an implementation. Texas Instruments and/or its Drawn By:
File: usb_mcu_bridge_sch.SchDoc
Size: B
licensors do not warrant that the design is production worthy. You should completely validate and test your design implementation to confirm the system functionality for your application. Engineer: Enter name of project lead Contact: http://www.ti.com/support
1
2
3
4
5
http://www.ti.com
?Te xas Instruments 2014
6
Figure 26. Schematic, Main Board (2 of 4)
28
LC Sensor Rotation Detection With MSP430™ Extended Scan Interface (ESI)
Copyright © 2014, Texas Instruments Incorporated
SLAA639 – July 2014
Submit Documentation Feedback
Schematics
www.ti.com
1
2
3
4
5
6
A
A
MSP430F5528 EZFET-LITE
EZFET_LED0
EZFET_LED1
EZFET_XT2IN
R105
390
J100
U100
1
D101
Green
EZFET_LED0
EZFET_LED1
3
2
Q100
2
1
D100
Red
2
1
R104
470
EZFET_XT2OUT
GND
LEDS
GND
4MHZ XTAL
EZFET_UART_TXD
EZFET_UART_RXD
EZFET_VREF
B
EZFET_XT2IN
EZFET_XT2OUT
TARGET_3V3
3V3
J401
3
1
C409
10µF
4
2
P1.0/TA0CLK/ACLK
P1.1/TA0.0
P1.2/TA0.1
P1.3/TA0.2
P1.4/TA0.3
P1.5/TA0.4
P1.6/TA1CLK/CBOUT
P1.7/TA1.0
34
35
36
37
38
9
10
57
58
12
13
EZFET_DP
EZFET_DM
TARGET_GND
EZFET_PUR
50
52
EZFET_V18
55
EZFET_VCORE 17
1
3
5
7
2
4
6
8
EZFET_TARGET_TEST_SBWTCK
EZFET_TARGET_RST_SBWTDIO
EZFET_TARGET_UART_TXD
EZFET_TARGET_UART_RXD
EZFET_VUSB
V18
VCORE
53
54
3V3
RST/NMI/SBWTDIO
TEST/SBWTCK
VBUS
VUSB
11
15
40
J402
PJ.0/TDO
PJ.1/TDI/TCLK
PJ.2/TMS
PJ.3/TCK
PUR
VBUS
EZFET_SBW_TST
EZFET_SBW_RST
EZFET_UART_RXD
EZFET_UART_TXD
P6.0/CB0/A0
P6.1/CB1/A1
P6.2/CB2/A2
P6.3/CB3/A3
P6.4/CB4/A4
P6.5/CB5/A5
P6.6/CB6/A6
P6.7/CB7/A7
PU.0/DP
PU.1/DM
51
41
42
43
44
45
46
47
48
P4.0/PM_UCB1STE/PM_UCA1CLK
P4.1/PM_UCB1SIMO/PM_UCB1SDA
P4.2/PM_UCB1SOMI/PM_UCB1SCL
P4.3/PM_UCB1CLK/PM_UCA1STE
P4.4/PM_UCA1TXD/PM_UCA1SIMO
P4.5/PM_UCA1RXD/PM_UCA1SOMI
P4.6/PM_NONE
P4.7/PM_NONE
P5.0/A8/VREF+/VEREF+
P5.1/A9/VREF-/VEREFP5.2/XT2IN
P5.3/XT2OUT
P5.4/XIN
P5.5/XOUT
EZFET_RST
EZFET_TCK
EZFET_TMS
EZFET_TDI
EZFET_TDO
EZFET_TEST
GND
TSW-107-07-G-S
EZFET_PROGRAM/DEBUG
EZFET_SBW_RST
EZFET_SBW_TST
VBUS
1
2
3
4
5
6
7
8
EZFET_AVBUS
EZFET_AVCCOUT2ADC
60
61
62
63
EZFET_TDO
EZFET_TDI
EZFET_TMS
EZFET_TCK
64
59
EZFET_RST
EZFET_TEST
R110
240k
C110
33pF
R109
150k
GND
VBUS SENSE
3V3
R108
220k
EZFET_AVCCOUT2ADC
C109
33pF
MSP430F5528IRGCR
EZFET
B
EZFET_AVBUS
65
49
14
56
16
39
QFN PAD
VSSU
AVSS1
AVSS2
DVSS1
DVSS2
AVCC1
DVCC1
DVCC2
1
2
3
4
5
6
7
26
27
28
29
30
31
32
33
P2.0/TA1.1
P2.1/TA1.2
P2.2/TA2CLK/SMCLK
P2.3/TA2.0
P2.4/TA2.1
P2.5/TA2.2
P2.6/RTCCLK/DMAE0
P2.7/UCB0STE/UCA0CLK
P3.0/UCB0SIMO/UCB0SDA
P3.1/UCB0SOMI/UCB0SCL
P3.2/UCB0CLK/UCA0STE
P3.3/UCA0TXD/UCA0SIMO
P3.4/UCA0RXD/UCA0SOMI
C411
1µF
TSW-102-07-G-D
GND
18
19
20
21
22
23
24
25
R107
220k
GND
C
TARGET VCC SENSE
C
GND
EZFET_PUR
R103
1.5k
HUB_DM2
EZFET_V18
EZFET_VCORE
R106
47k
EZFET_VREF
EZFET_DM
EZFET_RST
27
R100
HUB_DP2
3V3
3V3
EZFET_VUSB
R101
EZFET_DP
27
C100
10pF
C101
10pF
C103
10µF
C102
0.1µF
C104
0.1µF
C105
0.22µF
C106
0.22µF
C107
0.47µF
C108
0.1µF
C111
1000pF
R102
1.0Meg
GND
GND
GND
GND
GND
GND
GND
GND
CAPS
EZFET RESET
GND
USB
D
D
Mod. Date: 27/05/2014
Designed for:Public Release
Project Title: Change in menu Project|Project Options|Parameters
Number: XX####
Rev: E1 Sheet Title:
Texas Instruments and/or its licensors do not warrant the accuracy or completeness of this specification or any information contained therein. Texas Instruments and/or its licensors do not
SVN Rev: Not in version control
Assembly Variant: [No Variations]
Sheet: 3 of 4
warrant that this design will meet the specifications, will be suitable for your application or fit for any particular purpose, or will operate in an implementation. Texas Instruments and/or its Drawn By:
File: ezFET_lite_sch.SchDoc
Size: B
licensors do not warrant that the design is production worthy. You should completely validate and test your design implementation to confirm the system functionality for your application. Engineer: Enter name of project lead Contact: http://www.ti.com/support
1
2
3
4
5
http://www.ti.com
?Te xas Instruments 2014
6
Figure 27. Schematic, Main Board (3 of 4)
SLAA639 – July 2014
Submit Documentation Feedback
LC Sensor Rotation Detection With MSP430™ Extended Scan Interface (ESI)
Copyright © 2014, Texas Instruments Incorporated
29
Schematics
www.ti.com
1
2
3
4
5
6
C32
0.1uF
TA RGET_3V3
A
A
TA RGET_GND
RF1
RF_SPI1_CSN
R48
RF_GPIO_82
R49
RF_SPI1_MISO/RF_UART_TXD R50
RF_SPI1_MOSI/RF_UART_RXD R51
1
3
5
7
9
11
13
15
17
19
0R
0R
0R
0R
RF2
2
4
6
8
10
12
14
16
18
20
R52
R53
0R RF_GPIO_17
0R RF_GPIO_13
R54
R55
R56
R57
0R RF_SPI_CSN
0R RF_SPI_SCLK
0R RF_SPI_MOSI
0R RF_SPI_MISO
RF_RESET R44
RF_GPIO_81 R45
RF_GPIO_10 R46
1
3
5
7
9
11
13
15
17
19
0R
0R
0R
MHDR2X10
2
4
6
8
10
12
14
16
18
20
TA RGET_GND
R47
0R RF_SPI1_SCLK
MHDR2X10
TA RGET_GND
TA RGET_3V3
TA RGET_3V3
TA RGET_3V3
ESI
JP13
TA RGET_GND
JP14
LED2
1
2
R10
470R
R59
DNP
LED2
C11
22pF
R60
DNP
AGND
R61
DNP
1
1
3
5
7
9
11
13
15
ESIVSS
ESICOM
ESICI3
ESICI1
ESICH3/ESITEST3
ESICH1/ESITEST1
TA RGET_GND
R62
DNP
C12
DNF
LCD39
LCD38
LCD37
LCD36
LCD35
LCD34
LCD33
LCD32
LCD31
LCD30
LCD29
LCD28
LCD27
LCD26
LCD25
LCD24
COM0
COM1
COM2
COM3
LCD23
LCD22
HFXOUT
AGND
C10
22pF
HFXIN
LED1
LFXIN
1
2
LFXOUT
LED1
R9
470R
PORT_9/ESI
2
4
6
8
10
12
14
16
ESIVCC
ESICI
ESICI2
ESICI0
ESICH2/ESITEST2
ESICH0/ESITEST0
ESITEST4
TA RGET_GND
1
3
5
7
9
11
13
15
ESIVSS
ESICOM
ESICI3
ESICI1
ESICH3/ESITEST3
ESICH1/ESITEST1
TA RGET_GND
MHDR2X8
2
4
6
8
10
12
14
16
ESIVCC
ESICI
ESICI2
ESICI0
ESICH2/ESITEST2
ESICH0/ESITEST0
ESITEST4
MHDR2X8
C13
DNF
2
TARGET_ GND
X2 DNP
X1
32.768
TA RGET_3V3
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
C9
AGND AGND AGND AV CC
LCD
FH-1152P
TA RGET_3V3
0.1uF
AV CC
B
R65
10R
C7
ESIVCC
ESICOM
C35
DNP
0.1uF
C34
DNP
ESIVSS
R3
100K
ESICOM
ESICI
ESIVSS
LCD2
LCD3
LCD4
LCD5
LCD6
LCD7
LCD8
LCD9
LCD10
LCD11
LCD12
TA RGET_GND
C36
0.1uF
AGND
R5
5K6
R11
DNP
R12
TA RGET_GND DNP
R13
DNP
VR1
DNP
C
TA RGET_GND
P6.0
P6.1
P6.2
COM0
COM1
COM2
COM3
LCD39
LCD38
LCD37
LCD36
LCD35
LCD34
LCD33
LCD32
LCD31
LCD30
LCD29
LCD28
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
RF_GPIO_13
UART0_TXD
P4.2
I2C_SDA
P1.6
7
5
3
1
RF_GPIO_17
TA RGET_GND
MHDR2X4
PORT_2_3
RF_SPI1_CSN
RF_SPI1_MISO/RF_UART_TXD
P1.0
TA RGET_GND
P3.6
P3.4
P2.2
P2.0
PORT_6_8
R7
5K6
ESIVCC
ESICI3
ESICI2
ESICI1
ESICI0
ESICH3/ESITEST3
ESICH2/ESITEST2
ESICH1/ESITEST1
ESICH0/ESITEST0
RF_SPI_SCLK
RF_SPI_MOSI
RF_SPI1_SCLK
RF_SPI1_MOSI/RF_UART_RXD
7
5
3
1
MHDR2X4
P8.7
P8.5
BUT_AIN4
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
8
6
4
2
BUT_AIN3
U1
MSP430FR6989
ESIVCC
P9.7/ESICI3/A15/C15
P9.6/ESICI2/A14/C14
P9.5/ESICI1/A13/C13
P9.4/ESICI0/A12/C12
P9.3/ESICH3/ESITEST3/A11/C11
P9.2/ESICH2/ESITEST2/A10/C10
P9.1/ESICH1/ESITEST1/A9/C9
P9.0/ESICH0/ESITEST0/A8/C8
P1.0/TA0.1/DMAE0/RTCCLK/A0/C0/VREF-/VeREF
P1.1/TA0.2/TA1CLK/COUT/A1/C1/VREF+/VeREF+
P1.2/TA1.1/TA0CLK/COUT/A2/C2
P1.3/ESITEST4/TA1.2/A3/C3
P8.7/A4/C4
P8.6/A5/C5
P8.5/A6/C6
P8.4/A7/C7
DVCC2
DVSS2
P7.4/SMCLK/S13
P7.3/TA0.2/S14
P7.2/TA0.1/S15
P7.1/TA0.0/S16
P7.0/TA0CLK/S17
P2.0/UCA0SIMO/UCA0TXD/TB0.6/TB0CLK
C3
0.1uF
P2.3
P2.1
R6
5K6
TA RGET_GND
DVSS1
DVCC1
TEST/SBWTCK
RESET/NMI/SBWTDIO
PJ.0/TDO/TB0OUTH/SMCLK/SRSCG1
PJ.1/TDI/TCLK/MCLK/SRSCG0
PJ.2/TMS/ACLK/SROSCOFF
PJ.3/TCK/COUT/SRCPUOFF
P6.7/TA0CLK/S31
P7.5/TA0.2/S30
P7.6/TA0.1/S29
P10.1/TA0.0/S28
P7.7/TA1.2/TB0OUTH/S27
P3.3/TA1.1/TB0CLK/S26
P3.4/UCA1SIMO/UCA1TXD/TB0.0/S25
P3.5/UCA1SOMI/UCA1RXD/TB0.1/S24
P3.6/UCA1CLK/TB0.2/S23
P3.7/UCA1STE/TB0.3/S22
P8.0/RTCCLK/S21
P8.1/DMAE0/S20
P8.2/S19
P8.3/MCLK/S18
P2.3/UCA0STE/TB0OUTH
P2.2/UCA0CLK/TB0.4/RTCCLK
P2.1/UCA0SOMI/UCA0RXD/TB0.5/DMAE0
DNP
P4.3/UCA0SOMI/UCA0RXD#/UCB1STE
P1.4/UCB0CLK/UCA0STE/TA1.0/S1
P1.5/UCB0STE/UCA0CLK/TA0.0/S0
P1.6/UCB0SIMO/UCB0SDA/TA0.1
P1.7/UCB0SOMI/UCB0SCL/TA0.2
R33/LCDCAP
P6.0/R23
P6.1/R13/LCDREF
P6.2/COUT/R03
P6.3/COM0
P6.4/TB0.0/COM1
P6.5/TB0.1/COM2
P6.6/TB0.2/COM3
P2.4/TB0.3/COM4/S43
P2.5/TB0.4/COM5/S42
P2.6/TB0.5/COM6/S41
P2.7/TB0.6/COM7/S40
P10.2/TA1.0/SMCLK/S39
P5.0/TA1.1/MCLK/S38
P5.1/TA1.2/S37
P5.2/TA1.0/TA1CLK/ACLK/S36
P5.3/UCB1STE/S35
P3.0/UCB1CLK/S34
P3.1/UCB1SIMO/UCB1SDA/S33
P3.2/UCB1SOMI/UCB1SCL/S32
P3.7
P3.5
BUT_AIN2
TA RGET_GND
R8
5K6
P6.1
BUT_AIN5
RF_RESET
RF_GPIO_10
8
6
4
2
P6.1
RF_GPIO_81
P8.6
RF_GPIO_82
P8.4
P6.2
P6.2
P6.0
P6.0
7
5
3
1
MHDR2X4
TA RGET_GND
PORT_J
RF_GPIO_17
RF_GPIO_13
BUT_AIN
ESITEST4
1
RF_RESET
RF_GPIO_81
RF_GPIO_10
RF_GPIO_82
COM
2
COM
Left
Down
Select
Right
Up
PJ.7
PJ.5
PJ.3
PJ.1
7 BUT_AIN2
4 BUT_AIN5
5 BUT_AIN3
HFXOUT
LFXOUT
LED2
PJ.1
8
6
4
2
HFXIN
LFXIN
LED1
PJ.0
7
5
3
1
PJ.6
PJ.4
PJ.2
PJ.0
MHDR2X4
6 BUT_AIN
3 BUT_AIN4
BUT
TA RGET_3V3
LCD13
LCD14
LCD15
LCD16
LCD17
TA RGET_GND
C5
0.1uF
C
TA RGET_3V3
R1
47K
TA RGET_GND
SBW
RF_SPI1_MOSI/RF_UART_RXD
EZFET_TA RGET_UART_TXD
TA RGET_GND
UART0_TXD
RST/NMI/SBWTDIO
EZFET_TA RGET_RST_SBWTDIO
TEST/SBWTCK
EZFET_TA RGET_TEST_SBWT CK
TARGET_3V3
26
27
28
29
30
31
32
33
34
35
36
37
38
39
RF_SPI_MOSI
40
RF_SPI_MISO
41
42
RF_SPI_SCLK
43
RF_SPI_CSN
LCD21 44
LCD20 45
LCD19 46
LCD18 47
RF_SPI1_CSN
48
RF_SPI1_SCLK
49
50
RF_SPI1_MISO/RF_UART_TXD
DNP
UART0_RXD 1
LCD1 2
LCD0 3
I2C_SDA
4
I2C_SCL
5
8
6
4
2
RF_SPI_CSN
RF_SPI_MISO
BUT_AIN
EZFET_TA RGET_UART_RXD
TEST/SBWTCK
RST/NMI/SBWTDIO
PJ.0
PJ.1
LED1
LED2
LCD27
LCD26
LCD25
LCD24
LCD23
LCD22
C33
4u7
R41
P1.1
UART0_RXD
I2C_SCL
DNP
P4.2/UCA0SIMO/UCA0TXD/UCB1CLK
DVCC3
DVSS3
P4.1/UCB1SOMI/UCB1SCL/ACLK/S2
P4.0/UCB1SIMO/UCB1SDA/MCLK/S3
P10.0/SMCLK/S4
P4.7/UCB1SOMI/UCB1SCL/TA1.2/S5
P4.6/UCB1SIMO/UCB1SDA/TA1.1/S6
P4.5/UCB1CLK/TA1.0/S7
P4.4/UCB1STE/TA1CLK/S8
P5.7/UCA1STE/TB0CLK/S9
P5.6/UCA1CLK/S10
P5.5/UCA1SOMI/UCA1RXD/S11
P5.4/UCA1SIMO/UCA1TXD/S12
AVSS2
PJ.5/LFXOUT
PJ.4/LFXIN
AVSS1
PJ.6/HFXIN
PJ.7/HFXOUT
AVSS3
AVCC1
ESICOM
ESICI
ESIVSS
TA RGET_3V3
P4.3
P1.7
R63
Net-Tie
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
LCD0
LCD1
LCD2
LCD3
LCD4
LCD5
LCD6
LCD7
LCD8
LCD9
LCD10
LCD11
LCD12
LCD13
LCD14
LCD15
LCD16
LCD17
LCD18
LCD19
LCD20
LCD21
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
UART0_TXD
NT0
R40
PORT_1_4
TA RGET_3V3
LCD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
LCD
UART0_RXD
6
5
4
3
2
1
RST/NMI/SBWTDIO
Header 6
MCU_RESET
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
COM0
COM1
COM2
COM3
24
23
B
C1
2.2nF
TA RGET_GND
BRIDGE_TARGET_UART_TXD
BRIDGE_TARGET_UART_RXD
BRIDGE_TARGET_READY_IN
BRIDGE_TARGET_READY_OUT
TA RGET_3V3
TARGET_ GND
D
D
Designed for: Public Release
Mod. Date: 27/05/2014
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Rev: E1 Sheet Title:
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warrant that this design will meet the specifications, will be suitable for your application or fit for any particular purpose, or will operate in an implementation. Texas Instruments and/or its
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licensors do not warrant that the design is production worthy. You should completely validate and test your design implementation to confirm the system functionality for your application.
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Figure 28. Schematic, Main Board (4 of 4)
30
LC Sensor Rotation Detection With MSP430™ Extended Scan Interface (ESI)
Copyright © 2014, Texas Instruments Incorporated
SLAA639 – July 2014
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Figure 29. Schematic, Sensor Board
SLAA639 – July 2014
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LC Sensor Rotation Detection With MSP430™ Extended Scan Interface (ESI)
Copyright © 2014, Texas Instruments Incorporated
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Schematics
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Figure 30. Schematic, Motor Board
32
LC Sensor Rotation Detection With MSP430™ Extended Scan Interface (ESI)
Copyright © 2014, Texas Instruments Incorporated
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