IEEE TRANSACTIONS ON VISUALIZATION AND COMPUTER GRAPHICS,
VOL. 10,
NO. 3,
MAY/JUNE 2004
1
Multiresolution Indexing of
Triangulated Irregular Networks
John J. Bartholdi III and Paul Goldsman
Abstract—We show how to build a continuous, one-dimensional index of the points on a triangulated irregular network (TIN). The
index is constructed by first finding an ordering of the triangles in which consecutive triangles share a vertex or an edge. Then, the
space within each triangle is continuously indexed with a space-filling curve that begins at one vertex of the triangle and ends at
another. The space-filling curve is oriented such that the first point in each triangle is a vertex shared with the previous triangle and the
last point is a vertex shared with the next triangle. Furthermore, our index can be refined locally and, therefore, efficiently when the TIN
is augmented by filling any face with another TIN (to make a hierarchical TIN). Such processes arise, for example, in the elaboration of
detail on a graphical surface.
Index Terms—Triangulated irregular network, TIN, space-filling curve, hierarchical triangulation, multiresolution triangulation, triangle
mesh, spatial index.
æ
1
INTRODUCTION
T
RIANGULATED Irregular Networks (TINs, Triangle meshes)
are structures widely used in computer graphics and
geographic information systems (GIS) to represent surfaces
and terrains. Efficient storage, retrieval, transmission, and
processing of such structures becomes essential as data sets
grow larger and application demands increase.
Recent work on surface models based on TINs has been
motivated in part by the need to send large threedimensional graphics data sets over the Internet quickly
and efficiently. Much of this has concentrated on finding
efficient algorithms for compression and progressive
transmission and rendering of such models, as well as
supporting multiresolution views of surface data [11], [13],
[17], [23], [26], [27], [28]. Many of the related algorithms are
based on finding long sequences of edge-adjacent triangles
in the TIN, so-called “triangle strips.” Each triangle in a
triangle strip shares two vertices with predecessor and
successor triangles, facilitating high rates of compression,
by minimizing the number of vertices that need to be
retransmitted. Ideally, one triangle strip would encompass
the entire TIN, equivalent to finding a Hamiltonian path
through the edge-adjacency dual of the TIN. Such a path
does not always exist, and just checking the Hamiltonicity of
a TIN is NP-complete [3].
Hierarchical TINs are a generalization of TINs in which
cells may be filled recursively by TINs so that surface data
may be represented at varying levels of detail. An example
is the zoom-in/zoom-out capability found in graphics and
GIS software, which permits users to regulate the scope and
detail of data presented in a given view. For various
approaches to hierarchical triangulation, see [1], [12], [28].
In addition, interesting multiresolution algorithms for
compression and rendering of TINs, based on a recursive
. The authors are with the School of Industrial and Systems Engineering,
Georgia Institute of Technology, Atlanta, GA 30332-0205.
E-mail: {john.bartholdi, pgold}@isye.gatech.edu.
Manuscript received 19 Nov. 2001; revised 22 Oct. 2003; accepted 27 Oct.
2003.
For information on obtaining reprints of this article, please send e-mail to:
[email protected], and reference IEEECS Log Number 115447.
1077-2626/04/$20.00 ß 2004 IEEE
subdivision of the TIN, are found in [9], [18]. A multiresolution approach to surface models based on TINs and
applied to remeshing is found in [20].
Our approach to indexing triangulated surfaces sequences the triangles and also orders the space within each
triangle (Fig. 1). Our construction has a number of novel
features. First, sequential triangles may be edge-adjacent or
vertex-adjacent (sharing just one vertex). This is a relaxation
of the triangle-strip requirement that triangles with adjacent
indices must be edge-adjacent. Since not all TINs are
Hamiltonian, the stricter condition of edge-adjacency means
that some TINs require multiple triangle strips. We show
that the relaxed condition allows us to find, in all cases, a
single triangle sequence covering the entire TIN.
Second, we (continuously) order the space within each
triangle with a space-filling curve, oriented in such a way that
the point with highest index value in one triangle coincides
with the point with lowest index value in the next triangle in
the sequence. Space-filling curves are continuous mappings
from a one-dimensional interval onto a two-dimensional (or
higher) area. Space-filling curves can be used as “nearness
preserving” indices since they order space in such a way that
points near in index will be near on the surface and points
near on the surface will tend to be near in index. Moreover, in
our application, each triangular face maps to a contiguous
subinterval of indices, and contiguous subintervals map to
contiguous spatial regions in the TIN.
Space-filling curves also suggest a natural way to vary
resolution at different locations on a surface since they
provide a regular hierarchical decomposition of a region. This
is useful since the density of features of interest typically
varies over a surface. For discussions on the ability of spacefilling curves to preserve nearness, comparisons to other
spatial orderings, and pointers to relevant literature, see [2],
[4], [14], [15], [16], [19]. A thorough overview of spacefilling curves is found in [24]. For practicalities of working
with space-filling curves, see [5], [24]. These features of
space-filling curves have been exploited in various contexts
such as a family of heuristics for difficult combinatorial
problems on the plane [6], [7], [8], [22], global data
structures [4], and spatial searches [21]. The multiresolution
Published by the IEEE Computer Society
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Fig. 3. Conceptual view of a space-filling curve.
Fig. 1. Continuous circuit of a triangulated irregular network. The portion
of the path within each triangle represents a space-filling curve that
starts at one vertex and ends at another.
algorithms presented in [9], [18] were suggested by the
recursive partitioning of space-filling curves.
A third feature of our construction is that it results in a
circuit of the surface (or, for a special class of TINs, a path
that is very nearly a circuit). This is useful in certain
applications, such as heuristics for the traveling salesman
problem [7].
Section 2 describes how to create a continuous index of
all the points of a TIN. We prove that a continuous path
through a TIN always exists. In addition, we show that a
continuous circuit exists in all but a certain family of TINs
and provide a simple necessary and sufficient condition for
the existence of a continuous circuit that is checkable in
OðnÞ time for a TIN with n triangles. We describe efficient
algorithms to construct paths and circuits in worst case
Oðn2 Þ steps and argue that the average case is likely to be
OðnÞ. In Section 3, We extend our results to irregular
hierarchical TINs in which each triangle may be filled
(recursively) with a TIN.
2
STANDARD TINS
For our purposes, we shall adopt the following definition of
a TIN.
Definition 1. A triangulated irregular network (TIN) is a
finite planar graph in which each face (taken to include its
boundary) is a triangle, no vertex appears on the interior of an
edge, and each subgraph is adjacent by at least one common
edge to the rest of the graph.
Definition 2. Two disjoint TINs or triangles, are edge-adjacent
to each other when they share at least one edge and vertexadjacent when they share at least one vertex, but no edge.
We use the notation T n to refer to the class of TINs
having n triangles. For example, a T 2 is a TIN with two
Fig. 2. Approximations to the Sierpinski space-filling curve.
triangles (in other words, a pair of triangles with a common
edge), a T 3 is a triple of triangles, and so on.
We index a triangulation by continuously ordering the
space within each triangle by a space-filling curve, such as
Sierpinski curve [25] (Fig. 2) that orders triangular regions
so that the lowest index value occurs at one vertex and the
highest occurs at a second vertex. We can conceptualize
such a space-filling as entering a triangle at its entry vertex
and exiting at its exit vertex (Fig. 3). Since two vertices of a
triangle define an edge, we can indicate how a particular
triangle is indexed by naming an edge and a direction.
Applying this idea to a triangulation, we conceptualize a
continuous path through a TIN as a sequence of such edges,
oriented as follows: The exit vertex of one edge coincides
with the entry vertex of the next edge in the sequence. If we
can find such a sequence in which each triangle contributes
exactly one edge, then the sequence of these space-filling
curves forms a continuous path through all the points of the
TIN. If the entry vertex of the first triangle in the sequence
coincides with the exit vertex of the last triangle, the path is
a circuit. Fig. 4 shows circuits through two simple TINs.
Space-filling curves are usually illustrated based on
regular, symmetric geometric figures, but they can also be
based on irregular figures [5]. This is useful since TINs are
composed primarily of scalene triangles.
Definition 3. Given a TIN with n faces, a path is a sequence of n
directed edges ðv1; v2Þ (one edge from each) oriented such that
vertex v2 of edge ei coincides with vertex v1 of edge eiþ1 , for all
ði ¼ 1; . . . ; n 1Þ; a circuit is a path in which the exit vertex
of edge en coincides with the entry vertex of edge e1 . A TIN is
path-indexable when a path exists and circuit-indexable
when a circuit exists.
We begin with small, circuit-indexable TINs consisting of
two or three triangles and show how to combine these to
form larger circuit-indexable TINs.
2.1 TINs with up to Four Triangles
Lemma 1. T 1s (single triangles) are path-indexable but not
circuit-indexable; all T 2s and T 3s are circuit-indexable.
We omit the proof (see Figs. 5 and 6).
J. BARTHOLDI AND GOLDSMAN: MULTIRESOLUTION INDEXING OF TRIANGULATED IRREGULAR NETWORKS
3
Fig. 4. Space-filling circuits through simple TINs.
The T 4 depicted in Fig. 7 is path-indexable but not
circuit-indexable. This TIN will play a special role in testing
for indexability, so we now name it T 4 . All other T 4s are
circuit-indexable.
Lemma 2. T 4 is not circuit-indexable.
The straightforward proof is omitted. All other T 4s have
circuits, as may be verified by enumeration.
2.2 Combining Circuit-Indexable TINs
The union of two triangulations that share an edge is also a
TIN. We prove that, when both are circuit-indexable, their
union is also circuit-indexable. The proof includes an
efficient way to find a circuit of the union in which at most
two edges in the original circuits change.
Lemma 3. The union of two circuit-indexable triangulations that
share an edge is circuit-indexable. Given the circuits of the
original/triangulations, the circuit of the union can be found in
constant time.
Proof. Suppose we have two circuit-indexable triangulations, A and B, that share edge ðv1; v2Þ and have circuits
C1 and C2, respectively. Since a circuit contains exactly
one edge from each triangle of a TIN and since any edge
of a triangle contains two of the three vertices of that
triangle, then each of the circuits contains either vertex v1
only or vertex v2 only or both v1 and v2.
Case 1: Circuits C1 and C2 have no common vertex
(Fig. 8). Assume, without loss of generality, that C1
contains v1 only and C2 contains v2 only. Then, C1
consists of edge ðv1; v3Þ together with a path p1 (not
containing edge ðv1; v3Þ) between v3 and v1. Likewise,
C2 consists of edge ðv2; v4Þ, together with a path p2 (not
containing edge ðv2; v4Þ) between v4 and v2. If we replace
edge ðv1; v3Þ with edge ðv2; v3Þ and edge ðv2; v4Þ with
edge ðv1; v4Þ, then a circuit of A [ B is: edge ðv2; v3Þ, p1,
edge ðv1; v4Þ, p2.
Case 2: Circuits C1 and C2 share (at least) one vertex.
Assume, without loss of generality, that they both
contain v1. Then, the following is a circuit of A [ B:
Start at v1; continue through C1, ending at v1; continue
through C2, ending at v1.
Assuming a data structure capturing adjacency
information, a new circuit is constructible in constant
time because it involves only local changes (in at most
two edges).
u
t
Corollary 1. The TIN T formed by the union of n disjoint,
edge-adjacent, circuit-indexable TINs is circuit-indexable in
OðnÞ steps.
Definition 4. A set S of triangulations is a partition of a
triangulation T when no two triangulations in S contain the
same triangle and the union of all triangulations in S is T .
Corollary 2. Every triangulation partitionable into pairs and
triples is circuit-indexable.
Definition 5. An edge located on the boundary of a triangulation
(and so belongs to just one triangle) will be called a free edge.
If a T 1 is edge-adjacent to any other T 1 or to a T 2, the
union of the two groups has a circuit (Lemma 1 since the
union would be a T 2 or T 3, respectively). If a T 1 is edgeadjacent to a T 3, their union has a circuit in all but one case.
The exception involves the T 3 shown in Fig. 9. In this case,
triangles r1 and r3 both have exactly two free edges each
and both share exactly one edge with central triangle r2. If
such a T 3 is edge-adjacent by the free edge of r2 to the T 1
labeled s, then the union of the two groups is a T 4 , which
has no circuit (Lemma 2).
We use the notation T 3 to refer to a T 3 edge-adjacent to
another group in this special way. When we say that a
triangle group A is edge-adjacent to a T 3 , we mean that A
is adjacent to the central edge of the T 3 described above and
to no other edge of that T 3.
2.3 Circuit-Indexability of 2-Adjacent TINs
Definition 6. A TIN in which each triangle shares edges with at
least two other triangles (such as the TIN on the left of Fig. 4)
will be called 2-adjacent.
Theorem 1. A 2-adjacent triangulation T with n triangles is
circuit-indexable.
Proof. (Constructive.) We will partition T completely into
T 2 and T 3 groups so that it will be circuit-indexable by
Corollary 2. Assume that T is initially partitioned into n
T 1 groups.
Iteration: Choose a T 1 (until none remains); label it s1.
Choose a group g that is edge-adjacent to s1 and continue
with one of the following cases:
1.
Fig. 5. All paths through T 2.
If g is a T 1 or a T 2, combine s1 and g into a T 2 or
T 3, respectively, and continue with the next T 1.
4
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Fig. 6. Paths through each of the two members of T 3.
2.
3.
If g is a T 3, but not a T 3 , divide the four triangles
(of s1 and g) into two T 2s and continue with the
next T 1.
If g is a T 3 , mark the T 3 . By 2-adjacency, s1
must be edge-adjacent to some other group g2.
a.
b.
If g2 is anything but a T 3 , then transform as
before and continue with the next T 1. (If g2 is
the same group as g, then it is in this category
since the adjacency to s1 is by a noncentral
edge. In other words, g2 would be a T 3 with
respect to s1, but not a T 3 .)
Otherwise, g2 is a T 3 . (Since a T 3 is, by
definition, edge-adjacent by its unique central
edge, this must be a different T 3 than the
marked T 3 .) We need to check if the two
T 3 s are edge-adjacent to each other. Such an
adjacency would be by noncentral edges
since the central edges of both T 3 s are
occupied and, thus, they would be easy to
resolve (Fig. 10).
i.
ii.
Case A: The new T 3 is edge-adjacent to
the marked T 3 .
Partition the T 1 and the two T 3 s as
follows (Fig. 11): The edge-adjacent triangles of the two T 3 s become a T 2. The
T 1 and the remaining two triangles of the
new T 3 become a T 3. The remaining
two triangles of the marked T 3 become
a T 2. Continue with the next T 1.
Case B: The new T 3 is not edge-adjacent
to the marked T 3 .
Transform s1 with the new T 3
(Fig. 12). Mark the resulting T 3 and
label the new T 1 as s2. By 2-adjacency, s2
is edge-adjacent to some other group g3.
-
Otherwise, g3 is another T 3 . As
before, since all marked T 3 s are
already adjacent by their central
edges, this new T 3 must be unmarked. Again, if the new T 3 is
edge-adjacent to one of the marked
T 3 s, we can resolve the T 1. Otherwise, we again transform to create a
new T 3 and T 1 labeled s3 (Fig. 13).
By 2-adjacency and the assumption
that T is finite, this process eventually reaches a non-T 3 , resolving
the T 1. Continue with the next T 1.
Since each iteration in this procedure consumes at
least one T 1, the process eventually stops. Since T is then
completely partitioned into T 2s and T 3s, it is circuitindexable by Corollary 2.
-
2.4 Worst-Case Running Time
The number of iterations is OðnÞ since each iteration
consumes at least one T 1. Starting from a data structure
capturing adjacency information, Cases 1 and 2 are constant
time and Case 3b involves OðnÞ steps (resulting in OðnÞ
marked T 3 s).
If we could avoid the reuse of marked T 3 s by a T 1 in a
future Case 3b, then this case would contribute a maximum
OðnÞ to the total number of steps since at most one
additional new T 3 is constructed at each iteration (Case 3b
may modify a number of T 3s, but they are not new).
However, in the algorithm, reuse of a marked T 3 is
possible, though it seems unlikely. For example, suppose
we encounter two instances of Case 3b that resolve as
follows: The first instance ends when the terminal T 1
encounters another T 1 to create a terminating T 2; the
If g3 is a non-T 3 , we are done with
this T 1. Continue with the next T 1.
Fig 7. T 4 is path-indexable, but not circuit-indexable.
Fig. 8. The union of circuit-indexable TINs that share an edge is also
circuit-indexable.
J. BARTHOLDI AND GOLDSMAN: MULTIRESOLUTION INDEXING OF TRIANGULATED IRREGULAR NETWORKS
Fig. 9. The union of a T 1 and a T 3 is a T 4 and has no circuit.
second instance ends when the terminal T 1 encounters this
T 2 to create a T 3. Now, suppose we choose a new T 1 that is
edge-adjacent to the central edge of two T 3 s of this sort; in
this case, it will recheck at least some of the marked T 3 s.
Therefore, we bound this algorithm with the worst case of
Oðn2 Þ. While it is possible to construct such cases, they are
extremely unlikely to occur in practice. We expect the
average running time to be close to OðnÞ.
T 3 -Trees—A Family of Non-Circuit-Indexable
TINs
T 4 (Fig. 7) is a simple member of a family of non-circuitindexable triangulations. We will show that this family is
identical to the set of all non-circuit-indexable triangulations.
2.5
Definition 7. A T 3 -tree is a TIN constructible by starting
with a T 1 and iteratively adding T 3 groups that are adjacent
at a free edge (and no other edge) of the current triangulation
(as in Fig. 14). (Each new adjacency in such a TIN, therefore,
involves exactly one central edge of a T 3 and one other type of
edge: either a noncentral edge of a T 3 or an edge of the T 1.)
T 3 -trees can thus be created by a process of accretion.
The simplest T 3 -tree is a T 1. T 4 s are created by adding a
T 3 to any of the three free edges of a T 1. The next larger
T 3 -trees are T 7s, created by adding a T 3 to any of the six
free edges of a T 4 , and so on. This process would
eventually generate all possible T 3 -trees. An interesting
property of T 3 -trees, the subject of the following lemma, is
that there are many ways to partition T 3 -trees into the T 3
groups and the T 1. For example, there are three ways to
partition a T 4 into one T 1 and one T 3 (Fig. 15).
Lemma 4. A T 3 -tree can be transformed (partitioned) into T 3 s
and one T 1 in such a way that any triangle having a free edge
is the T 1.
Proof. We prove the lemma by induction on t, the number
of T 3 groups in the T 3 -tree.
1.
Base case. When t ¼ 1, there are four triangles
(Fig. 15). The three outside triangles have free
edges; the central triangle has no free edge. The
Fig. 10. Case A: T 3s are edge-adjacent. Case B: T 3s are not edge
adjacent.
5
Fig. 11. T 3 transformation, Case A.
2.
figure shows the possible transformations, with
the new T 1 labeled s. In each of the three possible
partitions, the T 1 is a different outside triangle.
Inductive step. Assume the lemma is true for t ¼ k.
To get the t ¼ k þ 1 case, add a new T 3 . The new
T 3 must attach to one of the free edges (Fig. 16a).
By the inductive hypothesis, assume that this
edge belongs to the T 1 labeled s. Adding the
ðk þ 1Þst T 3 to an edge of s gives three new
triangles: One of the new triangles is edgeadjacent to s and has no free edge (r3). The other
two new triangles (r1, r2) have two free edges
each (Fig. 16b). To transform r1 into the T 1
labeled s0 , we make a new T 3 by combining s, r3,
and r2 (Fig. 16c). Alternatively, to transform r2
into the T 1, we could combine s, r3, and r1. Fig. 17
u
shows some alternate partitions of a T 3 -tree. t
Lemma 5. Any TIN T can be partitioned into T 2s and T 3s or
into a T 3 -tree.
Proof. We start by following the 2-adjacency circuitindexability proof (Theorem 1). We run into a problem
when we encounter a T 3 -tree. It was 2-adjacency that
allowed us to eventually resolve T 3 -trees, but we no
longer make that assumption. Suppose we have reached
a T 3 -tree. By the adjacency of T , the T 3 -tree either
encompasses all of T or it is edge-adjacent to some other
group g. In the former case, we are done.
Otherwise, by Lemma 4, we can assume that g is edgeadjacent to a T 1 s (within the T 3 -tree). Now, as in
Theorem 1, we can resolve s in the cases where g is either
a T 1, a T 2, a non-T 3 triple, or a T 3 edge-adjacent to a
marked T 3 . In any of these cases, we can resolve the
T 3 -tree and g into T 2s and T 3s. (In other words, if any
free edge of a T 3 -tree is edge-adjacent to any group
other than a T 3 , then we can resolve the T 1.)
But suppose otherwise. In this case, g is a T 3 and we
add it to the T 3 -tree. Because of adjacency, this
procedure will eventually dispose of the T 3 -tree or the
T 3 -tree will grow to include all of T and we are done. In
Fig. 12. T 3 transformation, Case B.
6
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Fig. 13. The next transformation.
the former case, we follow the proof of 2-adjacency by
continuing with the next T 1.
Because T is finite and we never create a new T 1, this
procedure eventually terminates, and we are left with a
u
T 3 -tree or a partition of T consisting of T 2s and T 3s. t
Analysis: The running time analysis is similar to that of
Theorem 1.
Corollary 3. A non-circuit-indexable TIN can be represented as a
T 3 -tree.
Proof. By Lemma 5, any TIN can be completely divided into
either a set of T 2s and T 3s or a T 3 -tree. But, when a TIN
can be divided into a set of T 2s and T 3s, it is circuitindexable by Corollary 2. Therefore, if a TIN is noncircuit-indexable, the only possibility is that it can be
u
t
represented as a T 3 -tree.
Theorem 2. All TINs are path-indexable.
Proof. If a TIN T is circuit-indexable, then it is trivially pathindexable. Otherwise, T is non-circuit-indexable and can
be partitioned into T 3 s and one T 1 (Corollary 3). It is
Fig. 15. Three ways to partition a T 4 into a T 3 -tree.
Fig. 16. Transforming s with the new T 3 group.
Fig. 17. Alternate partitions of a T 3 -tree.
Fig. 14. T 3 -tree consisting of 11 T 3 groups and one T 1.
straightforward to rearrange the partition to ensure that
the T 3 s are all edge-adjacent to each other (by Lemma 4,
arranging the groups so that the single is adjacent to just
one T 3 ). Then, since each T 3 is circuit-indexable, we
can find a circuit of their union (Lemma 3). The T 1 is not
in the circuit, but is edge-adjacent to some triangle t that
is. An edge from s is easily connected with the circuit at t
to create a path.
u
t
Example 1. In Fig. 18, triangles s and t share edge ðv1; v2Þ.
The following is a path through the TIN: Start at v2,
proceed around the original circuit and return to v2,
proceed along edge ðv2; v3Þ, end at v3.
2.6 Recognizing Circuit-Indexable TINs
Euler showed that the existence of certain types of
traversals in graphs can be established by counting edges
incident to vertices [10]. In a similar spirit, we will show
that the existence of a continuous circuit in a TIN can be
determined by counting faces incident to vertices.
J. BARTHOLDI AND GOLDSMAN: MULTIRESOLUTION INDEXING OF TRIANGULATED IRREGULAR NETWORKS
7
Fig. 18. Finding a path in a non-circuit-indexable TIN.
For a vertex to appear in a circuit, there must be at least
two edges incident to the vertex: an incoming edge and an
outgoing edge. Since each triangle contributes exactly one
edge to a circuit, a pair of triangles is needed each time the
circuit passes through a vertex. For example, if two triangles
are incident to a vertex, then that vertex could appear in a
circuit at most once; if just one triangle is incident to a
vertex, then the vertex could not be part of a circuit; the
circuit could enter but not exit the vertex. When a TIN T has
n faces, a circuit passes through n vertices. Therefore, if T
has fewer than n pairs of triangles incident to vertices, a
circuit is impossible. The simple case of a T 1 has three
vertices, each with just one incident triangle; there are no
pairs of incident triangles, so a circuit is impossible.
Fig. 20. Triangles incident to vertices in a T 4 .
edges in a certain way. We use induction on t, the
number of T 3 s added to the T 1.
1.
2.
3.
Example 2. A triangle pair (Fig. 19).
Vertices a and b have a pair of incident triangles each,
so each vertex could appear in a circuit (or path) up to
one time. (In the figure, asterisks (*) indicate triangles
incident to vertices.) Vertices c and d have a single
incident triangle each, so neither could appear in a
circuit. Therefore, this TIN has just one possible circuit,
passing through vertices a and b.
Example 3. The T 4 TIN.
We can confirm that T 4 is not circuit-indexable: A
T 4 has a total of four triangles and six vertices (Fig. 20).
Three vertices (a; c; e) have one incident triangle each;
three vertices (b; d; f) have three incident triangles each.
There are just three pairs of triangles incident to vertices
in T 4 , but n ¼ 4, so a circuit is impossible.
We formalize these notions below and provide a simple
test for the existence of a circuit—a kind of “Euler’s
Theorem” for TINs. We first introduce some notation:
the number of pairs of faces incident to vertex v.
d0 ðvÞ ¼ P
d0 ðT Þ ¼ v2T d0 ðvÞ, the total number of pairs of incident
faces, summed over all vertices v in a TIN T .
Lemma 6. A T 3 -tree T containing n faces has d0 ðT Þ ¼ n 1.
When t ¼ 1, the chain is a T 4 , n ¼ 4, and d0 ðT1 Þ ¼
n 1 ¼ 3 (Fig. 20).
When t ¼ k, there are n ¼ 3k þ 1 triangles. Assume d0 ðTk Þ ¼ n 1 ¼ 3k.
Add the ðk þ 1Þst T 3 group. This increases n by
three to 3k þ 4. Counting the addition to d0
(Fig. 21): There are three new vertices: d, b, and
e. d and e have just one incident triangle each, so
they do not contribute to d0 . b has three incident
triangles, increasing d0 by one pair. Two existing
vertices, a and c, have two new incident triangles
each, increasing d0 by two more pairs. The total
increase in d0 is three. Therefore,
d0 ðTkþ1 Þ ¼ d0 ðTk Þ þ 3 ¼ 3k þ 3 ¼ n 1:
t
u
Theorem 3. A TIN T with n faces is circuit-indexable if and only
if d0 ðT Þ n.
Proof.
1.
Show that if T is circuit-indexable, then d0 ðT Þ n:
A circuit of T contains n edges and n vertices (the
vertices are not necessarily unique). Each time the
circuit goes through a vertex, there are two
incident triangles: one contributing to the incoming edge and one to the outgoing edge. Incoming
and outgoing edges come from different triangles,
even when the same vertex appears more than
once in a circuit, since each triangle contributes
just one edge to a circuit. Therefore, the number
Proof. By definition, a T 3 -tree can be created by starting
with a T 1 and iteratively appending T 3 groups to free
Fig. 19. Counting vertices in a T 2.
Fig. 21. A new T 3 group adds three pairs of triangles incident to
vertices.
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VOL. 10,
NO. 3,
MAY/JUNE 2004
TABLE 1
Experiments with Sample TINs
Data sources: Horse: “Multiresolution in Geometric Modeling” project, European Union, www.cs.technion.ac.il/~vitus/mingle/
ds_3d_triangle_meshes.html; Seashell, Head: GNU Triangulated Surface Library, http://gts.sourceforge.net/samples.html; Delaunay TINs were
generated via Mathematica.
2.
of pairs of triangles incident to vertices must be at
least n, the number of vertices in the circuit.
Show that, if d0 ðT Þ n, then T is circuit-indexable: If T is not circuit-indexable, then it can be
represented as a T 3 -tree (Corollary 3), in which
case, d0 ðT Þ ¼ n 1 (Lemma 6). But, d0 ðT Þ n by
supposition, so T is circuit-indexable.
u
t
3
HIERARCHICAL TINS
Hierarchical TINs are generalizations of standard TINs in
which faces may be replaced recursively with TINs.
Continuous indices of hierarchical TINs can be constructed
in the following way:
Step 1: Partition the TIN into T 2s and T 3s.
Step 2: Create and combine subcircuits in the
individual sub-TINs.
We bounded the performance with Oðn2 Þ (Section 2.4), but
conjectured that running time will be close to OðnÞ for
normally encountered TINs. Step 2 is OðnÞ by Corollary 1,
so we now examine the performance of Step 1.
The partition of the TIN in Step 1 proceeds as follows:
Create a continuous index of the base (or top-level) TIN.
Recursively create continuous indices through subTINS (cells which have been further triangulated),
oriented so as to maintain continuity.
Creating the continuous index in each sub-TIN makes
use of the construction procedure developed in Section 2.
However, an additional complication arises in this case: For
each triangle containing a TIN, the new path must be
constructed between fixed endpoints, beginning and ending
at the same vertices as in the current path. This constraint is
necessary to ensure that all changes are local to the
containing triangle. Observe that it is not possible in general
to find a path between any two vertices on the bounding
region of a TIN, but we will show that, in the case of a
triangle filled with a TIN, a path can always be found
between any two bounding vertices.
Fig. 22 shows a simple (one-level) example in which the
base TIN has three triangles; the center triangle is filled with
a sub-TIN. (Note that, unlike standard TINs, vertices in a
hierarchical TIN may appear on the interior of edges of a
previous level in the hierarchy, so subtriangles of adjacent
triangles may not line up. That is, we do not require
De Floriani and Puppo’s property of “matching” [12].) For
convenience, we use the term triangulated triangle to refer to
a triangular cell containing a TIN or, equivalently, a TIN
with a triangular boundary.
Initial Partition: Divide the TIN into T 2s, T 3s, and
T 4 s.
2. T 4 Resolution: Resolve each T 4 by finding an
adjacent group with which it can combine. This
search proceeds recursively if necessary until such
an adjacent group is found.
We ran experiments with a number of sample TINs,
including two Delaunay triangulations and four polyhedral
models, and ranging in size from 184 to 96; 966 triangles.
The results support our conjecture: T 2s and T 3s predominated in the initial partition and all T 4 s were resolved in
one pass and, so, make little contribution to running time,
which is dominated by the OðnÞ initial partition. See Table 1.
3.1 Finding an Initial Path
An important feature of our procedure is that changes to
the index are localized and do not disturb the rest of the
index. Given a TIN T with a continuous index I, choose
some triangle t and assume that I orders the space within
t starting at vertex v1 and ending at vertex v2 . Suppose
we now fill t with its own TIN. We will show that we
can index the sub-TIN within t in such a way that it is
also ordered starting from v1 and ending at v2 . In general,
for any triangulated triangle, we can always find a
continuous path between any two vertices of the
bounding triangle. Therefore, we can augment the original
Corollary 4. The circuit-indexability of a TIN can be determined
in OðnÞ time.
Corollary 5. A TIN is circuit-indexable if and only if it is not
representable as a T 3 -tree.
Corollary 6. The TIN created by adding any one edge or triangle
to a non-circuit-indexable TIN is circuit-indexable.
Corollary 7. For any TIN, our procedure can construct a near
circuit, a path whose starting and ending vertices are separated
by at most a single edge.
2.7 Empirical Results
As we have seen, a circuit of a TIN can be constructed in
two phases:
.
.
1.
1.
2.
J. BARTHOLDI AND GOLDSMAN: MULTIRESOLUTION INDEXING OF TRIANGULATED IRREGULAR NETWORKS
9
Fig. 22. Continuous index of a hierarchical TIN.
Fig. 23. TIN within a triangular bounding region, finding initial path.
index I by inserting the index for the sub-TIN, without
disturbing the rest of I.
Given a triangulated triangle labeled as in Fig. 23, we
seek a procedure to construct a continuous path from a to c.
The procedure starts by constructing an initial path,
between vertices a and c, through a subset of the triangles
in T , consisting of certain sub-TINs of T . The procedure
proceeds by iteratively adding more triangles from T , in a
path-preserving manner, until the path includes edges from
all the triangles in T . Path-preserving implies that, at each
stage of the procedure, we maintain a continuous path
between vertices a and c that traverses the set of triangles
currently included.
We begin by finding an initial continuous path through a
subset of the TIN T . This path can be constructed by linking
up, in order, triangle edges that lie on sides ða; bÞ and ðb; cÞ
of the bounding triangle (Fig. 23, right). We use the term side
triangle to refer to triangles having an edge lying on a side of
the bounding triangle.
At most one triangle, containing vertex b, could straddle
both sides ða; bÞ and ðb; cÞ of the bounding region. (The TIN
in Fig. 23 has such a triangle.) We use the term top triangle to
refer to this special case of a side triangle. If no top triangle
exists, an initial path from a to c is found by starting at a,
running along sides ða; bÞ and ðb; cÞ including, in order, the
edges of the side triangles, and ending at c. If a top triangle
exists, it contributes its interior edge to the path, as in
Fig. 23. All other side triangles contribute their edges that lie
on a side of the bounding triangle.
The initial path has the same endpoints as the path we
seek and includes, in most cases, a proper subset of the
triangles in T . Our approach is to iteratively add the rest of
the triangles to the path, in a path-preserving way. In other
words, at each step, we add more triangles to the path while
maintaining a viable path with the same endpoints until,
finally, the path visits all the triangles in T .
The initial path partitions T into sub-TINs by dividing T
into two sets of triangles: those that contribute an edge to
the initial path and those that do not. Each of these sets may
consist of one or more TINs (as defined above). Those TINs
containing triangles that contribute an edge to the initial
path (that is, triangles with edges lying on sides ða; bÞ or
ðb; cÞ of the bounding region), will be referred to as side
TINs. The remaining TINs will be referred to as interior
TINs (these contain no triangles contributing edges to the
initial path). The special case of a side TIN consisting of a
single top triangle will be called a top TIN.
Example 4. In Fig. 23, the initial path divides T into two
interior TINs (one T 1 and one T 4) and five side TINs (all
T 1s). One of the side TINs is a top TIN.
Each side TIN shares a vertex with one or two neighbors
or we could not link them into a continuous path. No two
share an edge, else they would be part of the same TIN.
Each triangle in a side TIN has an edge lying on the right or
left side of the bounding region and contributes exactly one
edge to the initial path; otherwise, it would be a member of
an interior TIN.
Interior TINs contribute no triangles to the initial path
since they contain no edges lying on the right or left sides of
the bounding region. These TINs may or may not be circuitindexable. Non-circuit-indexable TINs are T 3 -trees (Corollary 5). Neither of the two interior TINs in Fig. 23 is
circuit-indexable.
Observation 1. Each side TIN shares at most two edges
with interior TINs.
Observation 2. Each interior TIN has at least two edges
adjacent to side TINs (possibly to triangles within the
same side TIN).
3.2 Combining Paths and Circuits
In the previous section, we showed how to create an initial
path, between vertices a and c, that traverses a subset of the
triangles in a TIN. The next step is to iteratively add the
remaining triangles to the subset as we augment the path.
This process proceeds in a path-preserving way. We now
develop some basic tools for combining paths, circuits, and
triangles.
Lemma 7. Given a triangle t that is edge-adjacent to a circuitindexable TIN T , the union of t and T is a TIN with a path
between any two vertices of t.
Proof. (Constructive) Let a and b be any two vertices of t
and let R be a circuit of T . Supposing R contains neither
a nor b, then a path can be constructed by modifying two
links, as shown in Fig. 24. Otherwise, R contains a or b
(or both). Supposing, without loss of generality, that R
contains a, then a path is: vertex a, circuit R (starting and
ending at a), and, finally, edge ða; bÞ of the triangle. t
u
Corollary 8. Given a path through a set of triangles that shares
an edge with a circuit-indexable TIN, the union of the set of
10
IEEE TRANSACTIONS ON VISUALIZATION AND COMPUTER GRAPHICS,
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Fig. 25. Adding an interior T 1 to the path.
Fig. 24. Case 2: Circuit R contains neither vertex a nor b.
triangles and the TIN is path-preserving, that is, there exists a
path through the union that begins and ends at the same
vertices as the original path.
Proof. (Constructive) By supposition, some triangle r1 in
the original path shares an edge with the circuitindexable TIN T . Suppose that r1 contributes edge ða; bÞ
to the path. Then, by Lemma 7, we can construct a path p,
through both r1 and T , that begins at vertex a and ends
at vertex b. Substituting p into the original path, in place
of edge ða; bÞ, then the modified path includes both the
original path and the circuit through the TIN and has the
same endpoints as the original path.
u
t
3.3 Adding Interior TINs to the Path
Recall that the initial path divides the TIN into side TINs
and interior TINs. We augment the initial path by adding
interior triangulations one by one in a path-preserving way
until all the Interior TINs have been added and we have the
path we seek. Interior triangulations may be circuitindexable or non-circuit-indexable and non-circuit-indexable TINs may be T 1s or (general) T 3 -trees. We show how
to resolve each case; this will be used in the next section in
presenting a procedure to create a path.
1.
2.
Resolving circuit-indexable interior TINs. Whenever a
circuit-indexable interior TIN shares an edge with a
triangle in the current path, we can incorporate the
TIN into the path in a path-preserving way
(Corollary 8); we defer this case to the end of the
procedure.
Resolving interior T 1s. Each triangle in a side TIN
(except a top triangle, if any) has its outside edge
included in the initial path. We may add an interior
T 1 to the path as shown in Fig. 25. An interior T 1
that shares an edge with a side triangle always has
this kind of configuration with respect to the path;
therefore, this is the type of adjacency we will
always use to incorporate a T 1 into the path.
Note that, after adding the T 1, the outside edge of
the side triangle is no longer in the path. Therefore,
we cannot use the same side triangle to incorporate
another T 1 into the path. In effect, we use up one side
triangle each time we add a new T 1 to the path in
this way. Therefore, if two interior T 1s share an edge
with the same side triangle, we can resolve just one
of the two in this manner. (There are at most two
such interior T 1s corresponding to a given side
triangle, by Observation 1.) To resolve the second
T 1, we recall that it must share an edge with some
other side TIN (Observation 2). It is straightforward
to show that this is a different side TIN: The first side
3.
TIN must be a T 1 since two of its edges are adjacent
to interior T 1s and the third lies on a border of the
bounding region. Therefore, it cannot have another
adjacency with the second interior T 1.
Resolving interior T 3 -trees. When a T 3 -tree shares
an edge with a side TIN, we can incorporate it into
the path as follows: Partition the T 3 -tree in such a
way that its T 1 is edge-adjacent to the side TIN
(Lemma 4). Resolve the T 1 as in the previous
paragraph, using up one side triangle. The remaining
interior T 3s are circuit-indexable and can be easily
incorporated in the path (Corollary 8). Note that
incorporating these T 3s could be deferred until the
end of the procedure, when the other circuitindexable TINs are incorporated. If they are incorporated at this time, they should be added without
using up a side triangle (for example, via the T 1 from
the T 3 -tree through which the path now runs).
Note: A top TIN cannot be used to incorporate a noncircuit-indexable TIN into the path (Fig. 26). Therefore, if a
top TIN exists and is adjacent to a non-circuit-indexable
TIN, then this case must be handled first, using the fact that
this non-circuit-indexable TIN shares an edge with at least
one other side TIN (Observation 2).
3.4 Procedure to Find the Path
Theorem 4. A path between two bounding vertices of a
triangulated triangle always exists.
Proof. (Constructive) For each side TIN, we resolve the
interior TINs with which it shares edges by adding them
to the current path. All side TINs start out unmarked. The
path through an unmarked top TIN is the only path
through an unmarked side TIN that cannot resolve an
interior TIN, so, if a top TIN exists, it should be the first
side TIN considered. Circuit-indexable interior TINs all
start out marked; they can be added to the path at any
time, without using up side triangles, so they will be
handled at the end. All non-circuit-indexable interior
TINs start out unmarked.
1.
Iteration. Find the next unmarked side TIN s;
there are five cases to consider:
.
.
Case 1: s does not share an edge with an
unmarked interior TIN. Mark s.
Case 2: s is a top TIN, sharing an edge with
unmarked interior TIN i1 . Mark s. By
Observation 2, i1 shares an edge with some
other side TIN s2 . Since a top TIN is the first
considered, then s2 must be unmarked, and
available to resolve i1 . If s2 falls under Case 5
(below), then it is a T 1 and also shares an
J. BARTHOLDI AND GOLDSMAN: MULTIRESOLUTION INDEXING OF TRIANGULATED IRREGULAR NETWORKS
2.
Fig. 26. A top TIN cannot incorporate a non-circuit-indexable TIN.
.
.
.
edge with some other unmarked interior
TIN i2 . In this case, we treat s2 as in Case 5,
with the condition that we must use s2 to
resolve i1 (since i1 may have no other
adjacency to an unmarked side TIN). Otherwise, if s2 does not fall under Case 5, then we
use it to resolve i1 , mark i1 (but not s2 ), and
continue with the next iteration.
Case 3: s contains more than one triangle and
shares edges with unmarked interior TINs i1
and i2 . (A side TIN shares edges with at most
two interior TINs, by Observation 1). The
shared edges must come from different
triangles in s and, so, i1 and i2 easily resolve.
Mark s, i1 , and i2 . It is straightforward to
show that the two shared edges come from
different triangles in s and that, therefore, it is
easy to resolve the interior TINs. If we
assume otherwise, then some triangle in s
shares edges with i1 , with i2 , and with some
other triangle in s (by the connectedness of
TINs); this triangle also has an additional
edge lying on the bounding region (definition
of side TIN). But, this would require the
triangle to have four edges.
Case 4: s contains just one triangle and shares
an edge with just one unmarked interior
TIN i1 . Resolve i1 . Mark s and i1 .
Case 5: s contains just one triangle and shares
an edge with two unmarked interior TINs: i1
and i2 . (A side TIN shares edges with at most
two interior TINs, by Observation 1). Since s
has just one triangle, it can resolve just one of
the interior TINs. Use s to resolve i1 and mark
s and i1 .
By Observation 2, each interior TIN has at
least two edge-adjacencies to side TINs. Since
s is a T 1, with two of its edges already
accounted for and the third edge lying on the
bounding region, then i2 must share an edge
with some other side TIN s2 . Since the
procedure only marks a side TIN after
resolving all interior TINs with which it
shares edges, then s2 must be unmarked. If
s2 also falls under Case 5, then it is a T 1 and
shares an edge with some other unmarked
interior TIN i3 . In this case, we treat s2 as an
independent Case 5 in the next iteration, with
the condition that we must use s2 to resolve i2
(since i2 may have no other adjacency to an
unmarked side TIN). Otherwise, if s2 does
11
not fall into Case 5, then we use it to resolve
i2 , mark i2 (but not s2 ), and continue with the
next iteration.
Finalization. At this point, all the side TINs are
marked. All interior non-circuit-indexable TINs
must be resolved since side TINs are marked after
we have resolved all unmarked interior TINs with
which they share edges and each interior TIN
shares an edge with a side TIN. Now, incorporate
all interior circuit-indexable TINs into the path by
repeated application of Corollary 8. Since we
maintained a path from a to c during the entire
procedure and all TINs are now incorporated, we
are done.
u
t
Analysis: Running time is bounded by the procedure to
find a circuit of the interior triangulations, which is Oðn2 Þ.
As in the nonhierarchical case, the worst case is likely to
arise only in artificially constructed examples and average
running time in practice is likely to be close to OðnÞ.
Example 5. Path construction (Fig. 27).
1.
2.
3.
4.
4
The initial path partitions the TIN into five side
TINs (one triangle each) and two non-circuitindexable interior TINs (a T 1 labeled i1, a T 4
labeled i2).
Since there is a top TIN q, it is considered first. q
shares an edge with i1, but cannot resolve it. i1 is
resolved by r, the second side TIN with which it
shares an edge.
r is edge-adjacent to i2, but r has already resolved
i1 and a T 1 cannot resolve two interior TINs. i2 is
also edge-adjacent to unmarked side TIN s. s
resolves a T 1 from i2.
The remaining T 3 from i2 is circuit-indexable,
and resolved last.
CONCLUSIONS
We showed that a continuous “near circuit” through a TIN
(that is, a circuit short one edge) can always be constructed.
Furthermore, a circuit can be constructed in a TIN with
n triangles if and only if there are at least n pairs of triangles
incident to vertices. This condition can be checked in
OðnÞ time and it always holds in the special case where each
triangle is edge-adjacent to at least two other triangles.
Given data structures encapsulating appropriate adjacency
information, we derived a worst-case bound of Oðn2 Þ on the
number of steps to construct a (near) circuit, but we
conjecture that, for most “reasonable” data, actual performance will be OðnÞ. Indeed, the special situations that force
Oðn2 Þ work seem so contrived as to be unlikely in practice.
It is worth noting that our analysis holds for any TIN that
is locally planar, that is, each triangular face is planar, with
no holes, so that the space-filling curve index can be used
and no face is vertex-adjacent to itself.
It is possible to reduce the Oðn2 Þ worst case bound on
performance of our algorithm by remeshing any T 4 .
However, it is an empirical question whether this results in
actual speedup of the computation because the worst case is
so unlikely. In addition, remeshing requires that the algorithm become more complicated to handle the additional
special cases that can be introduced by the changed mesh.
In general, local changes in a TIN do not always lead to
simple updates in the corresponding index. Edge-removal,
12
IEEE TRANSACTIONS ON VISUALIZATION AND COMPUTER GRAPHICS,
VOL. 10,
NO. 3,
MAY/JUNE 2004
Fig. 27. Finding a path through a triangulated triangle.
for example, may invalidate a particular path completely or
change a TIN from circuit-indexable to non-circuit-indexable or result in a nontriangular face. It would be useful to
explore how such changes to the TIN affect the index.
ACKNOWLEDGMENTS
The authors appreciate the support of the US Office of
Naval Research through grant #N00014-89-J-1571, the US
National Science Foundation through grant #DMI-9908313,
The Logistics Institute at Georgia Tech and its sister
organization, The Logistics Institute Asia Pacific in Singapore. They also thank the anonymous referees for their
useful comments and suggestions.
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John J. Bartholdi III is a professor in the School
of Industrial and Systems Engineering at the
Georgia Institute of Technology, where he is
research director of The Logistics Institute and
holds the Manhattan Associates Chair of Supply
Chain Management. He teaches courses in
supply chain issues at both the undergraduate
and graduate levels and in Georgia Tech’s
program of industry short courses. His research
centers on problems of warehousing and distribution, but he reserves some time to publish on wider-ranging
interests, including structural mechanics, voting, geography, computer
science, and biology.
Paul Goldsman is a research engineer in the
School of Industrial and Systems Engineering at
the Georgia Institute of Technology. His research interests include logistics, computational
geometry, geography, and game theory.