ECSE-322A
MidTerm Test
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Signature: _________________________________
I.D.Number: ________________
Printed Name: ______________________________
McGill University
Department of Electrical and Computer Engineering
Course ECSE-322A -- Computer Engineering
MidTerm Test
Friday 29 October 2004
PLEASE NOTE CAREFULLY:
Sign this paper, fill in your student ID number and print your name at the top of the first
page and on the mark sense sheets - if you do not do this the exam may not be marked.
Initial each page of the exam paper in case the sheets should get separated. Make
sure the signed paper in its entirety is handed in at the end of the examination.
INSTRUCTIONS:
• This exam consists of two parts; part 1 consists of a set of 16 multiple choice
questions, part 2 consists of a set of 2 questions with short answers - YOU
SHOULD CHOOSE ONE OF THE TWO QUESTIONS IN PART 2. The
answers to the questions in Part 1 (the first 16 questions) should be entered on
the computer marked sheets, the answers to Part 2 should be written on this
question paper in the space provided. DO NOT USE ANY OTHER EXAM
BOOKS FOR ANSWERS TO BE MARKED.
• Unless otherwise stated on the exam paper, the scoring method for this
examination will assign 1 mark for each correct answer, 0 marks for a blank or
wrong answer. All multiple choice questions will be weighted equally in scoring.
• This is a closed book exam. However, the candidates are allowed to bring in one
sheet of letter size paper which may have handwritten notes on both sides.
• Student answers in the multiple choice section will be subject to analysis by the
McGill Exam Security Computer Monitoring Program in order to identify
unusually similar answer patterns.
Please sign this paper at the top of this page, write your name legibly, and read
the important notice above.
ENTER THE NUMBER OF THE SHORT ANSWER QUESTION IN PART 2 TO BE
MARKED HERE:
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TEST QUESTIONS
PART 1 - This part consists of 16 multiple choice questions. Indicate the correct answer
to each question on the computer readable sheets provided.
1.
Which of the following applies to a stack?
(a)
(b)
(c)
(d)
(e)
Both ends can migrate through memory
The last piece of data placed in the structure is the first piece out
It is a static data structure because it has a fixed starting point
Data can be retrieved by direct indexing into the structure
The structure has a fixed size.
Answer b
2.
Which of the following applies to a tree?
(a)
(b)
(c)
(d)
(e)
Each parent node has, at most, two children
A search for a data item always has an average time complexity of O(log2N)
Every level is fully populated
The path from one node to any other node is unique
Each node which has children is also a root node.
Answer d
3.
A sparse vector is a data structure in which
(a)
(b)
(c)
(d)
(e)
Hashed storage is used to save memory
Data can be stored efficiently by making use of symmetry
The polynomial computations can be eliminated by precomputing offsets
Several data items are repeated in the structure
A large percentage of the entries are equal to zero and are thus not stored in
memory.
Answer e
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4.
A list may be defined as an abstract data type
(a)
(b)
(c)
(d)
(e)
in which the last item entered is the last item out
in which accessing a data item automatically removes the item from the structure
in which there is an ordered sequence of data
in which the length is predefined
in which accessing any item is an O(constant) operation.
Answer c
5.
The Bubble Sort (or Exchange Sort) has an best case performance of O(N).
Under what conditions might this performance be achieved?
(a)
(b)
(c)
(d)
(e)
The data set is already in sorted order
The data set contains no zero entries
The data set is in totally random order
The data set divides into equal size partitions on each step
It can never achieve this performance – the optimum performance is O(N2)
Answer a
6.
A communications system in which the data transfer occurs as a result of a
“cause-and-effect” dialog is:
(a)
(b)
(c)
(d)
(e)
A half duplex system
A full duplex system
A synchronous system
An asynchronous system
A shareable system.
Answer d
7.
Any searching system that manages to halve the data set at each step will have a
complexity of:
(a)
(b)
(c)
(d)
(e)
O(constant)
O(N2)
O(Nlog2N)
O(N)
O(log2N).
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Answer e
8.
An insertion sort to place N items in a linked list has a complexity of
(a)
(b)
(c)
(d)
(e)
O(constant)
O(N2)
O(Nlog2N)
O(N)
O(log2N).
Answer b
9.
A vectored interrupt is one which
(a) Does not require all device interfaces to be polled
(b) Does not require the cpu to check the interrupt line at the end of each “Fetch and
Execute” cycle
(c) Reduces the number of control lines needed on the bus
(d) Removes the need to enable interrupts on the interface
(e) Allows interrupts to be globally disabled.
Answer a
10.
XON/XOFF is a protocol used when
(a)
(b)
(c)
(d)
(e)
Interrupts are not available to move data to or from the cpu
A full RS-232 communications system is implemented
A buffer in a receiving device is either about to overflow or about to empty
A serial line communications system cannot handle all the data being sent
A polled system to interrogate a device cannot be implemented..
Answer c
11.
(a)
(b)
(c)
(d)
(e)
The Vertical Blanking Period is the time
During which the next row of information is sent to the display
During which no information is transmitted to the display
During which the electron beam is returned to the start of the next line
During which the electron beam is moved to the start point of a frame (picture)
During which the electron beam moves one line vertically.
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Answer d
12.
A Read Only Memory may best be described as a device which
(a)
(b)
(c)
(d)
(e)
Stores information permanently and it cannot be altered
Is used to store ASCII character codes
Can be used to store data as it arrives at a device
Replaces the main RAM in many computer systems
Is used to resolve the timing issue caused by having slow devices and a fast cpu.
Answer a
13.
In a system using start and stop bits for synchronization, and communicating at
57600 baud, the maximum number of 7 bit ASCII characters that can be sent per second,
if parity and 2 stop bits are implemented, is:
(a)
(b)
(c)
(d)
(e)
6400
5760
5236
4800
None of the above.
Answer c
14.
Which of the following is TRUE with regards to the keyboard circuitry described
in class?
(a) The ROM takes as input a 6-bit address and outputs an ASCII code
(b) The ASCII code produced is sent to the computer over the bus lines
(c) The speed of the clock is the main communication bottleneck between the
keyboard and the computer
(d) The output of the latch is the 8-bit ASCII code
(e) The de-multiplexer sends +V volts to each row one at a time.
Answer a
15.
Which of the following is true?
(a) I/O is impossible without interrupts
(b) A computer needs as many interrupt levels as there are I/O devices
(c) Priority interrupts cause the device which has waited the longest to be handled
next
(d) Interrupt service routines may themselves be interrupted.
(e) Polled I/O is preferred over interrupt-driven I/O on a multi-user system.
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Answer d
16.
In a keyboard having 100 keys, it is expected that a user will hold a key down for
about 100 milliseconds. What should be the clock rate for scanning the keyboard
switches if the key is to be sensed only once?
(a)
(b)
(c)
(d)
(e)
10 Hz
100 Hz
1000 Hz
10000 Hz
100000 Hz.
Answer b
PART 2 of this exam starts on the next page. Please turn over the page and begin
Part 2 NOW!
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PART 2 - This part consists of 2 short answer questions. YOU SHOULD ANSWER ONLY
ONE OF THE QUESTIONS - IF YOU ANSWER BOTH, ONLY ONE WILL BE MARKED.
The question is worth 10 marks (Each question consists of 5 sections, each worth 2 marks).
Write your answers to the question in the space provided on this exam paper. Do not use extra
paper - any answers written outside of the allowed space will not be marked.
17.
(a) Define the following terms related to a Tree:
(i) Degree of a Node (1 mark)
___Answer: The number of child nodes attached to it._____________________
(ii) Level of a Node (1 mark)
___Answer: The number of nodes traversed in reaching that node from the
root._______
(b) (i) Derive an expression for the maximum number of data items in a complete binary
tree. (1 mark)
The maximum number will occur when the last level is full. Thus the maximum number of
data items is the sum of the series: 1,2,4,…,2N-1 = 2N-1
Where N is the height of the tree.
(ii) Derive the complexity expression for the average cost of inserting N items in a
binary tree followed by a traversal of the tree. (1 mark)
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Each insertion into a binary tree requires log2N operations where N is the number of levels
in the tree (on average). Thus for N items, the cost of insertion is:
O(Nlog2N)
A traversal visits each node in the tree once and is thus O(N)
Thus the total is O(N) + O(Nlog2N) or O(N(l+log2N)) which is approximately O(Nlog2N)
(c) The following diagram shows a binary tree used to store an algebraic expression:
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Assuming each sub-tree is enclosed in parentheses,
(i)
Write down the expression obtained from an inorder traversal of this tree: (1
mark)
Inorder is left, root right so the result is:
((a*b) – c) + (d*e)
(ii) Write down the expression obtained from a postorder traversal of this tree: (1 mark)
Postorder is left, right, root so the result is:
ab* c – de* +
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(d) (i) Can a Quicksort algorithm be:
(1) Applied to an Array and, if so, what is its time complexity? (0.5 marks)
Yes, O(Nlog2N)
(2) Applied to a Doubly Linked List and, if so, what is its time complexity? (0.5
marks)
Strictly speaking the answer is No.
However, it can be done if a track can be kept of all the head and trail
pointers that are created as the list subdivides. Note that the recursive algorithm is
somewhat more difficult to create in this case. If all this is done, then it would also
have the complexity of O(Nlog2N)
(ii) Write down the result after each pass of a Quicksort algorithm (using the original
array and a maximum of one extra integer storage location), for the following dataset: (1
mark)
5
7
3
12
1
22
1
3
5
12
7
22
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end of pass 2
all further passes will result in no changes but there will be 4 passes altogether
(e) (i) Describe what is meant by a “collision” when using a hashed form of data storage
and explain how it can be dealt with (1 mark)
A collision occurs when more than one element maps to the same point in the hashed array.
In other words, when the location computed for an element is already occupied.
A solution would be to design a family of hashing functions such that when a collision is
detected with the first function, the second is tried, etc. The family of functions must be
able to access all the locations in the array.
An alternate solution would be to use a bucket hashing structure.. (only one solution is
needed for this question)
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(ii)
Give an example of a situation in which a hashed storage scheme would be an
appropriate solution to the data structure problem (1 mark).
A requirement to store the list of last names of students in a class. The list of all
possible names is huge but only a small subset of these will exist in any given class. A
hashing function based on the alphabetic value of the name would be appropriate.
Several alternate models exist as well – including a library of books, the set of
variables in a computer program…
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18.
(a) Give one function of each of the following:
(i)
the Device Data Register on the device interface (1 mark):
__The DDR is used to transfer data to or from the data lines on the computer bus. It
is a temporary storage register.
______________________________________________________________________
(ii)
a memory buffer on an output device (1 mark):
__The buffer is used to store data as it is received from a computer so that the
device can handle it at a rate which is slower than the rate at which it is being
received. In essence, the buffer is used to match the communications speed to the
device speed.
______________________________________________________________________
(b) An interface currently provides the following information:
Device Busy
Interrupt Enabled
Interrupt Set
The design is to be modified to add a vectored interrupt capability.
(i) Complete the truth table below (with signal names and logic values) for the logic that
will generate the signal (LOAD) to place the Interrupt Service Routine address on the
bus: (1 mark)
Interrupt Set
Interrupt Acknowledge
LOAD
0
0
0
0
1
0
1
0
0
1
1
1
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(ii) Complete the circuit below with the logic to create the Interrupt Set and ISR Address
LOAD signals (1 mark)
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(c) A laser printer is capable of printing 250 characters per second. It is connected to a
computer via a serial line running at 20,000 bits/second. The communications protocol
uses one start and 1 stop bit and the characters are sent using 8 bit ASCII codes. A page
of text consists of 50 lines of 80 characters.
(i)
If the computer transmits a 20 page document to the printer as fast as it can, what
is the minimum size of the memory buffer that the printer will require? (1 mark)
20,000 bits/second = 2000 characters per second.
1 page = 4000 characters
20 pages = 80,000 characters
so 20 pages can be sent in 40 seconds.
The printer can print 250 characters per second so it takes 16 seconds to print a
page.
Thus in 16 seconds, it can remove 4000 characters from the buffer.
In 40 seconds, it removes 40*4000/16 characters = 10,000 characters
Thus the minimum size of the buffer, if the system is not to lose any characters is
70,000 characters = 68.36 kilobytes.
(ii)
If the computer takes 4 seconds to retrieve and format each page prior to sending
it to the printer, what would the minimum size of the memory buffer be? (1 mark)
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The transmission time of the first page is 2 seconds. After that, pages arrive in
bursts of 40,000 characters every 6 seconds and the total transmission time is
2 + 19*6 = 116 seconds.
In 6 seconds, the printer can print 1500 characters.
If the data arrival is considered to be as a continuous stream rather than in bursts,
then the printer can remove 250*116 characters from the buffer = 29,000
Thus the minimum size of the buffer would be 80,000 – 29,000 = 51,000 bytes = 41.1
kbytes
The result is the same if the calculation is done based on a burst rate instead.
(d) (i) Explain what is meant by a “Bit Mapped Display” (1 mark)
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A Bit Mapped Display is one in which the image to be displayed is held in a RAM
which has the same dimensions as the resolution of the screen, i.e. each “bit” in the
frame buffer maps directly onto a unique addressable point on the screen.
(ii) How much memory (in bytes) is needed to provide the frame buffer in a colour
graphics system capable of providing 256 levels of intensity to each “gun” in a cathode
ray display and having a resolution of 1024 by 768 pixels (1 mark)
256 levels of intensity = 1 byte per gun. Hence bytes are needed for each pixel.
1024 by 768 = 786432 dots
Total memory = 3*786432 = 2359296 = 2.25 Mbytes
(e) Name four control signals that are needed to synchronize data transfer in an RS-232
communications system and state whether the “modem” or the “computer” may set them.
(0.5 marks each)
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(i)
Signal 1____Data Set Ready_______________________________
Set by: _____Modem__________________________________________
(ii)
Signal 2____Data Terminal Ready___________________________
Set by: _____Computer__________________________________________
(iii)
Signal 3___Request to Send________________________________
Set by: _____Computer__________________________________________
(iv)
Signal 4____Clear to Send__________________________________
Set by: _____Modem__________________________________________
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