KTH Electrical Engineering
Evaluation of a new definition
for a Multi-Infeed Short Circuit Ratio
Master of Science Thesis by
Mercedes Sánchez Illanas
XR-EE-ES 2007:005
KTH Electrical Engineering
Electrical Power Systems
Acknowledgements
This thesis work is part of my Master of Science degree and is carried out at the School
of Electrical Engineering, Division of Electrical Power Systems, Royal Institute of
Technology (KTH) in Stockholm in cooperation with ABB HVDC, Sweden.
Firstly, I would like to thank Professor Lennart Söder, the Head of the Division and my
examiner Dr Mehrdad Ghandhari for letting me perform my work in this Division.
I wish to express my gratitude to my supervisor Paulo Fischer De Toledo of ABB
HVDC for the inspiration, support, advice, and sharing his expertise and deep
knowledge related to the design and operation of HVDC. This thesis work would not
have been carried out without his contribution.
I am thankful to Dr Valerijs Knazkins, my supervisor at KTH for the given support and
encouragement.
Finally, I would like to thank all my colleagues in the Division of Electrical Power
Systems for their support and advice during these six months that we have shared.
Stockholm, March 2007
Mercedes Sánchez Illanas
i
Abstract
A detailed methodology and consistent results related to the evaluation and validation
of the Multiple Infeed Short Circuit Ratio as an index of the system strength in a
particular point for Double Infeed HVDC systems are presented in this thesis. The
evaluation will be carried out by comparing the critical MESCR with respect to the
critical Short Circuit Ratio for a Single Infeed HVDC system. These critical values
represent the weakest AC-network that connected to the inverter is able to keep the
system stability after a disturbance. These stability limits are obtained by studying the
risk of voltage instability.
The results presented in this work conclude that the validation is positive and the
stability limit can be set in 1.3.
ii
Table of contents
1 Introduction
3
2 The HVDC transmission concept
5
2.1. General overview
5
2.1.1. Rectifier operation
6
2.1.2. Inverter operation
7
2.2. An HVDC system model: The Cigre Benchmark model
8
2.2.1. The AC networks
9
2.2.2. The HVDC transmission link
9
2.2.3. The transformers
10
2.2.4. The control system
10
2.2.5. The Benchmark model extended to a double infeed HVDC system 12
2.3. Main technical aspects of concern
13
2.3.1. Tendency to voltage instability and voltage collapse
3 The Multi-Infeed Short Circuit Ratio
14
17
3.1. Definitions
17
3.2. Discussion
20
4 Methodology for calculating stability limit in Single and Double
Infeed HVDC models
22
4.1. The Simulation Software: PSCAD
23
4.2. First Task: Obtaining stability limit for the Single Infeed HVDC model
24
4.2.1. Simulation case
27
4.2.2. Procedure 1
27
4.2.3. Procedure 2
28
1
4.3. Second Task: Obtaining stability limit for the Double Infeed HVDC
model
29
4.3.1. Symmetrical configuration
29
4.3.2. Asymmetrical configuration
30
4.3.3. Procedure 1
31
4.3.4. Procedure 2
32
5 Results and Discussion
33
5.1. Single Infeed HVDC system
33
5.2. Double Infeed HVDC system
36
5.2.1. Symmetrical configuration
36
5.2.2. Asymmetrical configuration
41
5.3. Final discussion
43
6 Conclusions and Forward Researches
46
References
48
Table of Figures
50
2
Chapter 1
Introduction
The HVDC power transfer has become the most feasible way to transmit a large
amount of power over long distances. The enormous energy demand is increasing the
number of interconnections between power systems, leading to complex and risky
configurations regarding the appearance of adverse power systems phenomena.
There are some technical aspects related to multiple infeed HVDC links that can
severely destabilize the system, especially in critical situations, when the AC-network
is weak in comparison with the DC-power supplied by the HVDC station. In fact, this
relation provides information concerning the cooperation between both parts into the
system performance referred to the prevention or resistance to anomalies such as
temporary overvoltages, commutation failures, voltage instability or resonance, among
others.
The Short Circuit Ratio (SCR), or Effective Short Circuit Ratio (ESCR), represents the
strength of the system as the ratio between the short circuit capacity of the ac-network
and the nominal power of the HVDC link. This index is valid for single infeed HVDC
systems, but can be extended to multiple infeed HVDC by the so called Multiple Infeed
Short Circuit Ratio (MSCR) or Multiple Infeed Effective Short Circuit Ratio (MESCR).
Such indices were introduced in [3].
The scope of this thesis consists of evaluating the definition of Multiple Infeed Short
Circuit Ratio in a Double Infeed HVDC system, and validating it as a way to define the
3
real strength of a system in a particular point, and thus, estimate the performance like
for the single-infeed HVDC case. The validation will be accomplished in the way that
the definition involves all the interactions between HVDC stations that could affect the
system stability.
The evaluation will be made by determining the critical MSCR and critical SCR related
to the risk of voltage instability in the system, and comparing them. Critical MSCR or
critical SCR corresponds to the weakest AC system that connected to the inverter of a
HVDC station still has stable operating conditions. This evaluation is made by applying
small increases in current order in the HVDC stations. Two different procedures were
put in practise, since the way to apply these increments to get the most realistic
conclusions entails another goal in this thesis.
Results for both procedures and different increment sizes are presented and discussed in
this work, obtaining important conclusions which can serve as a starting point for
further extended research in this field.
4
Chapter 2
The HVDC transmission concept
The HVDC concept appeared in order to find solutions to some of the weaknesses of
the HVAC power transmission. The HVDC power transfer is optimal for long
distances, because the bulk of transmitted power is almost unlimited for practical
purposes. In addition, an HVDC station is the best solution for linking two power
systems working at different frequencies or not synchronized. On the other hand, this
kind of installation is essentially more expensive [1].
2.1 General overview
A conventional HVDC station consists of two 12- pulse converters, the rectifier that is
the positive pole and the inverter, which constitutes the negative pole, linked each other
by a DC line. Both 12-pulse stations are formed by two 6-pulse, line-frequency bridge
converters connected by Y-Y and a ∆ –Y transformers. The station is united at each
terminal to the AC-network and a set of filters and shunt capacitors banks needed to
reduce the current harmonics from the converters and supply the reactive power
required by them [2].
5
Figure 2.1 An HVDC transmission system [2]
2.1.1 Rectifier operation
Assuming that the transformer’s reactance and the voltage drops through the thyristores
are negligible, the average rectifier DC-voltage, in a 12-pulse station, follows the
equation
Vd =
6 2
π
VLL cos α −
6ω LS
π
Id
(2.1)
where:
VLL is the RMS line-to-line ac-voltage at the commutation bus.
α is the firing angle
LS is the ac-side inductance
Id is the dc-current
The AC-filters located at the high-voltage side of the HVDC transformers absorbed
most of the harmonic currents. Consequently, it is assumed that the fundamental
harmonic is just the responsible for both active and reactive power supply to the
rectifier, resulting the equations below, which are simplified supposing LS = 0.
6
Pd = 2.7VLL I d cos α
(2.2)
Q = 2.7VLL I d sin α
(2.3)
From equations (2.2) and (2.3), we conclude that an HVDC converter acts as a load
connected to the grid, and controlled in both magnitude and power factor.
2.1.2 Inverter operation
All equations above can be extended to the inverter, knowing that the firing angle in
this case is larger than 90°. Changing the polarity of the voltage with respect to that in
the rectifier, the inverter average DC-voltage can be written in terms of the extinction
or commutation margin γ as follows:
Vd =
6 2
π
VLL cos γ −
6ω LS
Id
(2.4)
= cos γ − cos ( γ + u )
(2.5)
π
and the relation between γ and DC-current, as
I d 2ω LS
2VLL
where u is the overlap angle that represents the time in which more than two thyristors
are conducting at the same time in a 6-pulse bridge because of LS. Equation (2.5) shows
the functional relationship between the current and the overlapping between the
conducting thyristors.
The relation between inverter firing angle, overlap angle and commutation margin is
180° = α i + γ + u
7
(2.6)
which explains why the commutation margin is of paramount important for the reliable
performance of HVDC stations. It must be large enough to permit thyristors the
recovery from conduction to withstand forward blocking voltage. Otherwise, they could
prematurely conduct, resulting in a failure in commutation of current between thyristors
fail and causing large overcurrents [8].
The active power from equation (2.2) can be rewritten in terms of γ, taking into account
that, in this case, that power goes from the DC side to the AC side. The reactive power
does not change the polarity with respect to the rectifier because this is as well absorbed
by the converter. The simplified equations, assuming LS = 0 and u = 0, result:
Pd = 2.7VLL I d cos γ
(2.7)
Q = 2.7VLL I d sin γ
(2.8)
2.2 An HVDC system model: The Cigre Benchmark
model
The benchmark model from which all simulations have been run and evaluated in the
thesis is based on [4].
0.5968 [H]
2.5 [ohm ]
2.5 [ohm ]
0.5968 [H]
Ibus
A
V
A
V
Rectifier
Inverter
Figure 2.2. Cigre Benchmark model
8
Inverter_AC
26.0 [uF]
Rectifier_AC
Rbus
The Benchmark model is a way in which a feasible comparison among different DC
controls strategies and recovery performances in HVDC studies can be done. This
model was designed in the way some difficulties could appear during a hypothetical
performance of the system represented.
2.2.1 The AC networks
The AC network at the inverter side is represented by an R-L-L circuit. The impedance
angle is kept at 75° along the whole analysis, even when the SCR is changed. The AC
network at the rectifier side is represented by an R-R-L circuit, with an impedance angle
of 84°. The SCR at both ends is 2.5. The AC inverter bus must be set in 230kV, and the
AC rectifier bus in 345 kV.
0.151 [H]
0.0365[H]
2160.633 [ohm ]
24.81[ohm ]
0.0365[H] 0.7406[ohm ]
C
0.151 [H]
0.0365[H]
24.81[ohm ]
B
2160.633 [ohm ]
0.0365[H] 0.7406[ohm ]
A
0.151 [H]
0.0365[H]
2160.633 [ohm ]
A
B
C
24.81[ohm ]
0.0365[H] 0.7406[ohm ]
AC network at rectifier side
AC network at inverter side
SCR = 2.5
SCR = 2.5
Figure 2.3. ac-networks
The AC network is in parallel with a combination of capacitor banks and filters, which
provide the converter reactive compensation. The reactive power supplied is the
conventional 0.5 per unit of rated dc- power (500MVA).
2.2.2 The HVDC transmission link
The Benchmark model consists of a monopolar HVDC station with two current source
converters of 12-pulse each. The DC line is a 500 kV and 1000 MVA cable of around
100 km length.
9
2.2.3 The transformers
The model includes tap changer transformers as the junction between AC-networks and
converters, which allows a VLL control from the proper HVDC station. However, this
control will not be used in this thesis, setting the AC voltage at the commutation buses
by changing the Thevenin voltage in both ac-network sources.
2.2.4 The control system
Angle Order
dc current
measured
at rectifier
Gamma Angle
measured
at inverter
CMRC
AOR
Rectifier Controls
current
order
for rectifier
CORDER
GMES
dc voltage
measured
at inverter
VDCI
Electrical Sys tem
AOI
CMIC
dc current
measured
at inverter
Inverter Controls
Angle Order
Figure 2.4 The control system
Figure 2.4 shows the outline of the control system in the Benchmark model. Each
converter is in control of one of the variables in the link: the DC voltage is controlled
by the inverter control and the DC current (or power through the HVDC line) by the
rectifier control. Both controls are not independent of each other, as we see from the Vd
- Id characteristic in Figure 2.5.
10
Figure 2.5 Steady State Vd-Id characteristic [4]
The inverter γ-control represents the line ABCDE. The segments from A to D are the
ones that enable the fast system recovery after a fault, a lower risk of commutation
failures and almost constant reactive power consumption [11]. To get it, the inverter
control just measures its DC voltage and according to the control ramp shown in Figure
2.5 and sends a current order signal to the rectifier control. This mechanism is the socalled “voltage-dependent-current order-limit” [4].
Simultaneously, the control loop increases the γ-signal to reduce the risk of
commutation failure due to the high current during the fault. According to all of this,
and following equation (2.5), the control provides the suitable inverter firing angle
signal. However, at nominal conditions, the inverter control keeps γ fixed at the
minimum value required to ensure avoiding commutation failures, which will be in our
case 15°. So, the reactive power consumed by the inverter is the minimum allowed,
according to equation (2.8).
The rectifier current control has such a high gain that makes its characteristic almost
vertical at the input current order. The control loop consists of a measurement of DC
current and voltage levels at the rectifier side, getting a modified Id that is compared
with the current order given by the inverter control, which, as was mentioned before, is
11
not always equal to the input current order. From the difference Id – Id-ref, the rectifier
firing angle is formed such that it will be larger or lower whether the difference is
positive or negative, respectively. At nominal conditions, the firing angle, α, is set in
17°.
2.2.5 The benchmark model extended to a double infeed HVDC
system
The benchmark model for a Double Infeed HVDC system is built up just linking the
inverter terminals between two Cigre benchmark models. Within the model, both
HVDC stations keep their own control systems.
Angle Order
AOR_1
I12_B
current
order
for rectifier
CMRC_1
I12_C
Gamma Angle
measured
at inverter
I12_A
dc current
measured
at rectifier
Rectifier Controls
CORDER_1
GMES_1
Angle Order
dc current
measured
at rectifier
Gamma Angle
measured
at inverter
current
order
for rectifier
Electrical Sys tem
CMRC_2
AOR_2
Rectifier Controls
CORDER_2
GMES_2
AOI_2
CMIC_2
Inverter Controls
NCI_2
dc current
measured
at inverter
NBI_2
VDCI_2
NAI_2
dc voltage
measured
at inverter
Angle Order
Figure 2.6 The benchmark model for a double infeed HVDC system
12
0.0168[ohm]
Angle Order
0.0168[ohm]
Inverter Controls
0.4611[ohm]
Electrical Sys tem
AOI_1
CMIC_1
0.4611[ohm]
dc current
measured
at inverter
0.0168[ohm]
VDCI_1
0.4611[ohm]
dc voltage
measured
at inverter
The mutual impedance will vary in absolute value depending on the case to simulate, as
we will see later on. However, the angle will be kept constant at 85° for all the cases.
2.3 Main technical aspects of concern
In Single Infeed HVDC systems, the main problems related to the performance are
located in current source inverter terminals, especially when they are connected to a
low short circuit capacity AC network with respect to the DC power infeed [8]. These
aspects of concern can be summarized as follows [6]:
•
High temporary overvoltages, followed by a load rejection because of a fault in
the transmission network, or due to a commutation failure
•
Low frequency resonance at both AC and DC sides because of the system
configuration [10]
•
Voltage and power instability, caused by a lack in reactive power or a lack in
control
•
Long restart times after small modification around the operating point, due to
control system upsets
•
Commutation failures in the inverter, due to voltage disturbance at the AC side,
usually phase-to-ground faults
When the number of converters connected to the same AC-network increases, the list of
problems is extended to include all those related to the interaction between them, as is
detailed in [8]:
•
Commutation failures interactions between converters
•
Requirements on need for coordination of recovery control
•
Coordination of high level controls like power or voltage modulation between
HVDC transmission links
•
Frequency instability
13
2.3.1 Tendency to voltage instability and voltage collapse
The thesis is focussed on the study of the risk of voltage and power instability in
HVDC systems. This phenomenon is well-known in power systems and consists of a
high and uncontrollable voltage drop after small increases in load or transmitted power.
In HVDC systems, the voltage stability is a problem related to the operation of the
inverter when it is connected to a weak AC system. This is due to the inability of the
AC system in providing the reactive power needed by the converters to maintain
acceptable system voltage.
An increase in reactive power can be triggered just by a small increase in current order
with respect to the operating point, leading to a voltage drop. During the system
transient, the control system reacts trying to decrease the overcurrent and increase the
voltage by increasing rectifier firing angle αR and decreasing inverter αI, respectively
(see Figure 2.7). It makes increase the converter power factor, increasing the reactive
power demand and dropping the active power, as follows from equations (2.3) and
(2.2). If the AC-network is not strong enough, the loading will exceed the system’s
maximum capacity, the voltage will sharply drop and the system collapses [8].
This trend is shown by the Maximum Power Curve (Figure 2.8) when the nominal
operating point is located in the unstable zone. The stable operating zone is the positive
slope in the Id-Pd curve, which is equivalent to a negative slope in the Pd-U curve. We
can see that in the unstable zone, an increase in current entails a decrease in voltage and
active power.
14
y (p.u.)
Rectifier DC Current
step
1.100
1.050
1.000
0.950
0.900
0.850
Recifier Alpha Order
y
100
y
10
150
140
130
120
110
100
Inverter Alpha Order
y (p.u.)
Inverter AC Voltage (RMS)
1.100
1.050
1.000
0.950
0.900
0.850
Figure 2.7 Alpha variation just after an increase in the current order
Figure 2.8 Maximum power curves: Pd-U and Id-Pd [5]
From Figure 2.8, we can see, as well, why the power control entails the most critical
situation. When the power order increases, the power control acts increasing the
current, which leads to a drop in voltage and transmitted power. Consequently, the
power control increases the current again, causing the continuous drop in voltage until
the system reaches the collapse [5].
15
DC links theoretically have just a thermal constraint to transmitted power, but this is
not the case if they are controlled by power electronics and included in the power
system. The maximum transmitted power is fixed by both the AC-network capacity and
γmin at inverter γ-control [5].
16
Chapter 3
The Multi-Infeed Short Circuit Ratio
In the previous chapter, we saw that the most critical performance situation occurs in
those points where the AC-network has a low short circuit capacity compared with the
DC power infeed. This strength of the network is represented, in single infeed HVDC
systems, by the Short Circuit Ratio (SCR), which identifies a system according to its
performance in a particular point.
When two or more converters are connected to the same ac-network, the Multi-Infeed
Short Circuit Ratio (MSCR) at a particular bus pretends to be an extension of the SCR
and supply a normalized information about the real strength of the system in that point
regardless the number of converters connected, since the effects of the interactions
between them are already within the MESCR definition. The validation of this
statement is one of the key goals of the thesis. Presently, the definitions of SCR and
MSCR will be given and analyzed in this chapter.
3.1 Definitions
The equivalent circuit shown in the figure below is the most common way to represent
the inverter side in single infeed HVDC systems. Z1 is the impedance of the ac-network
and B1 represents filters and shunt capacitors banks [3].
17
Figure 3.1 Simplified model of an HVDC connected to an AC network [3]
The definition of Short Circuit Ratio is
SCR =
S SC
PdN
(3.1)
where:
S SC is the short circuit capacity at the commutation bus.
PdN is the nominal power at the HVDC link.
S SC is equal to
1
in per unit when the DC-nominal power and ac nominal voltage at
Z1
the commutation bus are the bases, resulting the definition of SCR as follows:
SCR =
1
Z1
(3.2)
The Effective Short Circuit Ratio is the SCR including the reactive compensation at the
commutation bus.
ESCR =
S SC − Qc
PdN
(3.3)
with Qc denoting the reactive shunt compensation. This definition is better in order to
provide a more realistic strength of the system since the destabilizing effect of shunt
capacitors is already included.
18
Figure 3.3 Simplified model for 3-HVDC
systems
Figure 3.2 Simplified model for 2-HVDC
systems
From Figure 3.2 and Figure 3.3, the Multi-Infeed Short Circuit Ratio is defined by
MSCRn =
1
k
∑P
dcm
⋅ zn ,m
(3.4)
m =1
where:
k the number of HVDC terminal stations.
PdN the nominal power of the HVDC station m in p.u.
zn,m the term of the ZBUS located in the row n and column m, in p.u.
Including the compensation in the admittance matrix, we get the Multi-Infeed Effective
Short Circuit Ratio.
MESCRn =
1
k
∑P
dcm
⋅ zen,m
(3.5)
m =1
We must observe that the MESCR definition is applicable as well to Single-Infeed
systems just making the mutual impedances tend to infinite.
19
3.2 Discussion
In order to evaluate the reliability of MESCR to define the strength of the system in a
particular point, it is necessary to have a look at those effects that take place when two
or more HVDC converters are linked:
•
A disturbance in a converter can be alleviated by the proper control and all the
converters connected to it. This interaction depends on the strength of the grids
connected to them and the strength of the links to the considered converter.
•
A converter is affected by a disturbance in any other converter connected to it.
This interaction depends on the strength of the grids connected to them and the
strength of the link between the considered converters.
From the interpretations of ZBUS, we know that the element located in the nth row and
mth column represents the sensitivity of bus n to load variations in bus m. The larger
this term is, the larger the influence of the converter m in the converter n is. Obviously,
this term becomes larger when the mutual impedance between m and n is lower and the
self impedance in m greater.
At the same time, this zn,m value is multiplied by the rating power of the mth converter.
This pretends to put on weight the influence of m over n, since a disturbance in m is
more critical if the load at that point is larger, implying a larger influence over n.
According to everything mentioned above, we can conclude that the first effect of the
interaction between converters is represented by the term Pdcn ⋅ zen ,n and the second by
k
∑P
dcm
⋅ zen ,m in the equation (3.5).
m =1
m≠ n
20
Since the different aspects related to the interaction between converters seem to be
included in the MESCR definition, this should be a good tool to measure the real
strength of a system in a particular point. The next step is to prove it empirically, which
constitutes the target of the subsequent chapters.
21
Chapter 4
Methodology for calculating stability
limit in Single and Double Infeed
HVDC models
The thesis is aimed at evaluating the definition of Multiple Infeed Short Circuit Ratio.
To do this, an attempt will be made to get the stability limit in terms of MESCR for a
double infeed HVDC system, and compare it to the one obtained previously for the
single infeed HVDC case in terms of ESCR. If both values are sufficiently close to each
other, it will be possible to conclude that MESCR is able to provide a normalized
strength of a system in a particular point, since all the influences between converters are
already included within the definition.
In Chapter 2, some aspects of concern related to HVDC systems were mentioned. In
order to get the most realistic stability limit, the study of every problem should be
carried out. The primary focus in this thesis is placed on the risk of voltage instability at
the inverter side, which is the most critical side due to the risk of commutation failures
associated. Consequently, the methodology followed here is to explore the behaviour of
the system from a nominal operating point to a region where the system will reach
voltage collapse, and this is possible by increasing the current order, as was mentioned
in Section 2.3.1.
22
If we want to evaluate MESCR by comparing the trend towards voltage instability in
different systems, we must be sure that no other phenomenon induces the instability.
Therefore, obtaining the best procedure that ensures it constitutes another goal in this
thesis. Actually, the design and proper implementation of this procedure has required
the most labour-intensive part of this project. Two different procedures were put in
practise. These methods are detailed in the following sections and the conclusions
related to which of them can be considered the most suitable will be treated later on
during the discussion.
Before going into detail through the methodology employed to calculate the stability
limits, it is interesting to introduce briefly the simulation tool.
4.1 The Simulation Software: PSCAD
The software used for running the simulations is PSCADv4.2.0. PSCAD is a generalpurpose time domain simulation tool for studying transient behaviour of electrical
networks. This seamlessly integrated visual environment supports all aspects of
conducting a simulation including circuit assembly, run-time control, analysis, and
reporting [7].
PSCAD includes an extensive library of models including all aspects of AC and DC
power systems and controls. The analysis and design of any power system is possible,
since a graphical user interface, and control tools are available for that. If a model not
included in this master library is required, there exists the option in the software to
create an own new one using the built-in graphical Component Workshop.
The software includes some project-examples. Having a look at those, we find out the
file HVDCCigre. Within it, the project called Cigre_Benchmark.psc can be loaded. This
model is the basis for the one employed in this thesis. The extended version differs
from the other basically in the control system, more sophisticated since it includes the
“voltage-dependent-current-order-limit”. Also, it incorporates new input controls and
23
measurement points required to induce the disturbances for a complete study of the
system stability.
Figure 4.1 Cigre Benchmark model
Figure 4.2 Cigre Benchmark model, extended
version
From the extended version, it is possible to simulate not only in time domain but
frequency domain too, in order to obtain Bode and Nyquist plots for the study of the
stability in steady state conditions.
4.2 First task: Obtaining stability limit for the Single
Infeed HVDC model
The task consists of obtaining the minimum value of the SCR at the inverter bus for
which a single infeed HVDC system keeps being stable after an increase in current
order.
It should be noted that detection of the voltage collapse phenomenon is not a trivial
task. This is because in some cases the control system is able to manage the situation
and recover the steady state conditions. To circumvent this difficulty, the voltage
instability will be checked by measuring the overshoot in the rectifier dc-current just
after the increase in current order. We will consider the system as tending to voltage
instability when the overshoot exceeds a value of 100%. That is, if the incremental
24
value of the actual current transiently reaches the value of 10% for a current order
increment of 10%, then the overshoot is 100%. This limit is just a criterion to calculate
the stability limit in this project, where the scope is focused on evaluating the MESCR
definition rather than obtaining an accurate stability limit. In order to get a more
realistic stability limit, the maximum overshoot may be fixed according to values
permitted in the real life applications.
y (p.u.)
Rectifier DC Current
step
1.050
1.000
0.950
0.900
0.850
Figure 4.3 Overshoot below 100%
y (p.u.)
Rectifier DC Current
step
1.050
1.000
0.950
0.900
0.850
Figure 4.4 Overshoot close to 100%
y (p.u.)
Rectifier DC Current
step
1.050
1.000
0.950
0.900
0.850
Figure 4.5 Voltage collapse
According to everything mentioned above, the stability limit is established by applying
the following steps.
25
Rectifier
Inverter
SCR = 2.5 SCR = 2.5
ESCR = 2 ESCR = 2
Shunt Capacitors Qc=0.5
INCREASE CURRENTORDER
(procedure 1 or 2)
MEASURE OVERSHOOT
If is ≤ 100%
DECREASE INVERTER
SCR IN 0.1
Figure 4.6 Flowchart of obtaining stability limit for the Single Infeed HVDC model
The stability limit will be the SCR for which, having the system an overshoot close to
100% (Figure 4.4), during the following decreasing of SCR it collapses (Figure 4.5).
We will apply two increases in current, one of a 10% and another softer of 5%,
obtaining two different stability limits for each of them. But we must be aware of the
risk of commutation failures that an increase in current involves. In order to ensure the
study of just the trend to voltage instability in the system, the increase in current order
is carried out using two different procedures that will be detailed later on in this section.
26
4.2.1 Simulation case
In the Cigre benchmark model, from Section 2.2, the strength of the AC-networks is set
up in a SCR of 2.5 or ESCR of 2 (remember that Qc is 0.5 per unit) at both rectifier and
inverter sides.
To build up the remaining simulation cases, we will need to vary the SCR at the
inverter side. Taking into account that the inverter AC-network is represented by an RL-L circuit and assuming that we keep the impedance angle in 75° for all the cases, the
equation (3.5) evidences that we just need to multiply each element of the grid’s
impedance by the same constant to change the SCR at the inverter bus. The constant is
defined by the following ratio:
ρ=
2.5
.
SCR
(4.1)
4.2.2 Procedure 1
To increase the current avoiding commutations failures at the same time, we should
make the increase from a lower value than the nominal operating point. In this way, the
overlap angle will not grow so much and, thus, the drop of the commutation margin
will not be so risky.
There are two procedures to apply such a step up in current. The first one is
schematically shown below in Figure 4. 7.
27
INITIAL STEADY STATE
CONDITIONS:
Id = 1 pu
Ud = 1 pu
α = 17°
γ = 15°
-10% STEP DOWN IN CURRENT
ORDER DURING 1sec.
-5% STEP DOWN IN CURRENT
ORDER DURING 1sec.
Figure 4. 7: Flowchart of Procedure 1
In this procedure, the overshoot is measured just after the current order is reset to 1 per
unit.
4.2.3 Procedure 2
The procedure 2 differs from the procedure 1 in the initial steady state conditions that
are directly set up with current order lower than 1pu:
INITIAL STEADY STATE
CONDITIONS:
INITIAL STEADY STATE
CONDITIONS:
Id = 0.9 pu
Ud = 1 pu
α = 17°
γ = 15°
Id = 0.95 pu
Ud = 1 pu
α = 17°°
γ = 15°°
STEP UP IN CURRENT ORDER TO
1pu
Figure 4.8: Flowchart of Procedure 2
28
4.3 Second task: Obtaining stability limit for the Double
Infeed HVDC model
The task consists of obtaining the minimum value of MESCR at a particular inverter
bus for which a double infeed HVDC system preserves its stability after an increase in
current order.
The increase in current order will be carried out using both procedures previously
mentioned. In this case, we will calculate the stability limit applying tree different steps
in current: one of 10 % in just one station, one of 5% in one converter and one of 5% in
both stations simultaneously.
In this case, we can vary MESCR by varying
− the self SCR1 at the inverter commutation bus in both converters
− the mutual impedance.
4.3.1 Symmetrical configuration
The symmetrical configuration is that in which the self impedance (or self SCR) of the
ac-networks and the rated power are the same in both inverters.
From the equation (3.5), we see that for symmetrical systems, MESCR does not depend
on the mutual impedance, keeping always the same value in both buses that is equal to
the self ESCR. Then, we will try to check whether the stability limit depends on the
mutual impedance or not. To this, it is enough to propose two cases such that the
mutual impedance largely differs from each other. The stability limit is obtaining for
each case by applying the flowchart in Figure 4.9.
1
When we talk about “self SCR” at the inverter bus we refer to the inverse of the self impedance (in pu)
of the AC-network connected to that bus. It is, the SCR at the inverter terminal if the HVDC station is
not linked to any other converter.
29
HVDC STATION 1
variable ESCR
HVDC STATION 2
variable ESCR
Fixed Z12
Shunt capacitors: Qc = 0.5
INCREASE CURRENT ORDER
(procedure 1 or 2)
MEASURE OVERSHOOT
If is ≤ 100%
DECREASE INVERTER
selfESCR IN 0.1 IN BOTH
STATIONS
Figure 4.9: Flowchart of obtaining stability limit for the double infeed HVDC system. Symmetrical
cases
4.3.2 Asymmetrical configuration
There is a numerous variety of combinations of asymmetrical cases among which we
must select a few that could cover as many critical situations as possible in order to
evaluate the quality of MESCR. These cases will be grouped into two blocks:
A. Fixing the inverter network 1 as a strong network and the inverter network 2 as
a weak one. The MESCR increase/decrease by decreasing/increasing the mutual
impedance respectively.
B. Fixing the inverter network 1 as a strong network and keeping the mutual
impedance constant. The MESCR increase/decrease by increasing/decreasing
self ESCR in the inverter network 2 respectively.
30
To obtain the stability limit for cases within block A and block B, I will follow the
flowcharts represented in Figure 4. 10 and Figure 4.11 respectively.
HVDC STATION 1
fixed ESCR
HVDC STATION 2
fixed ESCR
HVDC STATION 1
fixed ESCR
HVDC STATION 2
variable ESCR
Variable Z12
Shunt capacitors: Qc = 0.5
Fixed Z12
Shunt capacitors: Qc = 0.5
INCREASE CURRENT ORDER
(procedure 1 or 2)
INCREASE CURRENT ORDER
(procedure 1 or 2)
MEASURE OVERSHOOT
MEASURE OVERSHOOT
If ≤ 100%
If ≤ 100%
INCREASE MUTUAL
IMPEDANCE IN 0.1 pu
DECREASE selfESCR 2 IN
0.1 pu
Figure 4. 10: Flowchart of obtaining stability
limit for the double infeed HVDC system.
Asymmetrical cases, block A
Figure 4.11: Flowchart of obtaining stability
limit for the double infeed HVDC system.
Asymmetrical cases, block B
4.3.3 Procedure 1
Procedure 1, extended to double infeed HVDC systems, is now represented by the
following diagram:
31
INITIAL STEADY STATE
CONDITIONS:
STATION 1
Id = 1pu
Ud = 1pu
α = 17°
γ = 15°
-10% STEP DOWN IN
CURRENT ORDER DURING
1sec IN STATION 2
STATION 2
Id = 1 pu
Ud = 1pu
α = 17°
γ = 15°
-5% STEP DOWN IN
CURRENT ORDER DURING
1sec IN STATION 2
-5% STEP DOWN IN
CURRENT ORDER DURING
1sec IN BOTH STATIONS
Figure 4.12: Flowchart of procedure 1
4.3.4 Procedure 2
Procedure 2, extended to double infeed HVDC systems, follows the steps below:
INITIAL STEADY STATE
CONDITIONS:
STATION 1
Id = 1pu
Ud = 1pu
α = 17°
γ = 15°
STATION 2
Id = 0.9pu
Ud = 1pu
α = 17°
γ = 15°
INITIAL STEADY STATE
CONDITIONS:
STATION 1
Id = 1pu
Ud = 1pu
α = 17°
γ = 15°
STATION 2
Id = 0.95pu
Ud = 1pu
α = 17°
γ = 15°
STEP UP IN CURRENT ORDER TO
1pu
Figure 4.13: Flowchart of procedure 2
32
INITIAL STEADY STATE
CONDITIONS:
STATION 1
Id = 0.95pu
Ud = 1pu
α = 17°
γ = 15°
STATION 2
Id = 0.95pu
Ud = 1pu
α = 17°
γ = 15°
Chapter 5
Results and Discussion
5.1 Single Infeed HVDC system
From this first analysis, we determine which procedure is the one that provides the
safest stability limit. In Figure 5.1 and Figure 5.2, the trend curves show how the
overshoot varies with ESCR at the inverter bus. There is one curve for each procedure
and increment in current.
PROCEDURE 1
100% limit
PROCEDURE 2
stability limit 1
stability limit 2
200
180
160
overshoot (%)
140
120
100
80
60
40
20
0
1,1
1,2
1,3
1,4
1,5
1,6
1,7
1,8
1,9
ESCR
Figure 5.1 Stability limits with increase in current of 10%
33
2
PROCEDURE 1
100% limit
PROCEDURE 2
stability limit 1
stability limit 2
200
180
160
overshoot (%)
140
120
100
80
60
40
20
0
1,1
1,2
1,3
1,4
1,5
1,6
1,7
1,8
1,9
2
ESCR
Figure 5.2 Stability limits with increase in current order of 5%
Table 5. 1: Stability limits for the Single Infeed system analysis
Procedure 1
Procedure 2
Increment in 10%
Increment in 5%
SCR = 2
SCR = 1.7
ESCR = 1.5
ESCR = 1.2
SCR= 2.2
SCR = 1.8
ESCR = 1.7
ESCR = 1.3
Obviously, for each increment in current order the stability limit is different, being
greater for those obtained by the largest increment. Later on, during the double infeed
analysis, it will be shown that the step of 10% is not valid for the aim of this thesis.
Comparing results from Figure 5.1 and Figure 5.2, it can be concluded that procedure 2
is the one that provides the safest stability limit. The explanation is supported by the
different voltage conditions that both procedures present just before the increment in
current.
34
y (p.u.)
y (p.u.)
Figure 5.3 Maximum Power Curves
Inverter AC Voltage (RMS)
Rectifier DC Current
step
Inverter AC Voltage (RMS)
Rectifier DC Current
step
1.100
1.050
1.000
0.950
0.900
0.850
1.100
1.050
1.000
0.950
0.900
0.850
Figure 5.4 In prodecure 1, step down in current order: 10% above and 5% below
Figure 5.3 shows how a step down in current order makes the voltage increase. It entails
that the voltage level before the step up is larger in procedure 1 than in procedure 2,
where it is 1 pu. Consequently, in procedure 1 it is easier for the system to withstand the
voltage drop after the increase in current order. The consequence is that the stability
limit obtained by procedure 1 is always larger than the one obtained by procedure 2, as
is shown in Table 5. 1.
For increments of 5%, the voltage levels are not so different between procedures and the
stability limits are close together as we see from Figure 5.2. But when the step up grows
till 10%, the difference between procedures becomes larger.
35
y (p.u.)
Rectifier DC Current
step
1.100
1.050
1.000
0.950
0.900
0.850
y (p.u.)
Inverter AC Voltage (RMS)
1.100
1.050
1.000
0.950
0.900
0.850
Figure 5.5 Procedure 1, increase in current order with ESCR = 1.5
y (p.u.)
Rectifier DC Current
step
1.100
1.050
1.000
0.950
0.900
0.850
y (p.u.)
Inverter AC Voltage (RMS)
1.100
1.050
1.000
0.950
0.900
0.850
Figure 5.6 Procedure 2, increase in current order with ESCR = 1.5
In order to get a better stability limit, we will only use the procedure 2 in the remaining
analysis.
5.2 Double Infeed HVDC system
5.2.1 Symmetrical configuration
As was pointed out in the methodology, developing mathematically the MESCR
definition for a symmetrical configuration, we see that the index does not depend on the
mutual impedance between converters. Consequently, the stability limit should be the
same regardless of the junction. In order to check it, two cases summarized in Table 5.2
were studied.
36
Table 5.2 Simulation cases for symmetrical Double Infeed HVDC systems
Self ESCR1 = Self ESCR2
Z12
Case 1
Variable
5
Case 2
Variable
0,1
The results are presented in the following graphs:
Z12 = 5 pu
100% limit
Z12 = 0.1 pu
stability limit 1
stability limit 2
200%
180%
160%
overshoot
140%
120%
100%
80%
60%
40%
20%
0%
1,1
1,2
1,3
1,4
1,5
1,6
1,7
1,8
1,9
2
MESCR2
Figure 5.7 Stability limit with 10% step in current
37
2,1
2,2
Z12 = 5 pu
100% limit
Z12 = 0.1 pu
stability limit 1
stability limit 2
200%
180%
160%
overshoot
140%
120%
100%
80%
60%
40%
20%
0%
1,1
1,2
1,3
1,4
1,5
1,6
1,7
1,8
1,9
2
MESCR2
Figure 5. 8 Stability limit with 5% step in current in converter 2
Z12 = 5 pu
100% limit
Z12 = 0.1 pu
stability limit
200%
180%
160%
overshoot
140%
120%
100%
80%
60%
40%
20%
0%
1,1
1,2
1,3
1,4
1,5
1,6
1,7
1,8
1,9
MESCR2
Figure 5. 9 Stability limit with 5% step in current in both converters
38
2
Table 5.3 Stability limits for the symmetrical case
10% step in
Z12
5% step in current 5% step in current
current 2
2
in both
5 pu
ESCR = 1.5
ESCR = 1.2
ESCR = 1.3
0.1 pu
ESCR = 2
ESCR = 1.3
ESCR = 1.3
The results indicate that an increment in 10% is too large to be used to check the risk of
voltage instability, because it is likely that this causes at the same time any other kind of
problem in the system. This point is further exemplified in the figures below:
y (p.u.)
y
y (p.u.)
Rectifier DC Current_1
Rectifier DC Current_2
CO_1
1.100
1.050
1.000
0.950
0.900
0.850
25.0
20.0
15.0
10.0
5.0
0.0
Gamma_1
Gamma_2
Inverter AC Voltage (RMS)_1
Inverter AC Voltage (RMS)_2
1.100
1.050
1.000
0.950
0.900
0.850
Figure 5. 10 10% Step up for MESC = 1.4229 and Z12 = 5 pu
Figure 5. 10 shows how the system behaves when the link is weak. Here, the
disturbance in converter 2 because of the current increment should be almost totally
withstood by itself. However, since the stability limit here is 1.5, lower than the one
obtained for the single infeed system, the converter 2 is helping to withstand the
disturbance as well, regardless of the weak link.
39
y (p.u.)
y
y (p.u.)
Rectifier DC Current_1
Rectifier DC Current_2
CO_1
1.100
1.050
1.000
0.950
0.900
0.850
25.0
20.0
15.0
10.0
5.0
0.0
Gamma_1
Gamma_2
Inverter AC Voltage (RMS)_1
Inverter AC Voltage (RMS)_2
1.100
1.050
1.000
0.950
0.900
0.850
Figure 5. 11 10% Step up for MESC = 1.4229 and Z12 = 0.1 pu
When the link is stronger, converter 1 influences converter 2 in a higher way, but the
reciprocal is true as well. This means that now converter 1 is more affected by a
disturbance in 2, being even the one that becomes instable before (see Figure 5.11).
However, this behaviour could be easily triggered by some other causes, not just by a
higher risk of voltage instability in 1. This is because if the strength of the system is
identical in both converters, the risk of voltage instability too, and then, when we
applied the disturbance in 2, the collapse would appear in 2.
At the same time, the fact that the stability limit here is larger than the one calculated in
the single infeed case (compare Table 5. 1 with Table 5.3) is another argument to
support that the tendency to voltage instability cannot be the only reason for the
collapse.
For instance, the commutation margin’s drop after the current increment in addition
with the higher current set in 1 make this inverter prone to commutation failures. Upsets
in control systems at such a high increment in current could cause the behaviour in
Figure 5. 11 too.
40
Analysing the results for the 5% step, we can see that increasing the current order just in
one converter, the stability limit change, depending on the mutual impedance. However,
we do not consider that this implies a problem with the MESCR definition. This is
because both limits are almost the same and equal to the one obtained for the single
infeed case. At the same time, the definition should work well for asymmetrical cases,
since it will take into account the mutual impedance (Section 3.2).
When the increase in current is applied in both converters at the same time, the
symmetry in the simulation is complete, even in the operating conditions in both
stations. It explains that here the mutual impedance does not influence at all, being the
stability limit equal to the one obtained for the single infeed HVDC system.
5.2.2 Asymmetrical configuration
As was mentioned in the previous chapter, the cases are selected in such a way that we
could cover as many critical situations as possible in order to evaluate the quality of
MESCR to define the strength of the system for different extreme cases. The cases are
divided into two blocks and presented in Table 5.4.
Table 5.4 Simulation cases for asymmetrical Double Infeed HVDC systems
Self ESCR1
Self ESCR2
Z12
Case A.I
2.5
0.5
Variable
Case A.II
2.5
1
Variable
Case B.I
2.5
Variable
5
Case B.II
2.5
Variable
1
For each case, we obtain the trend curve as in the previous cases. Then they will be
grouped in the same graph in order to enhance the proximity between each other.
41
Case A.I
Case A.II
Case B.I
Case B.II
100% limit
stability limit
200%
180%
160%
overshoot
140%
120%
100%
80%
60%
40%
20%
0%
1,1
1,2
1,3
1,4
1,5
1,6
1,7
1,8
1,9
2
MESCR2
Figure 5.12 Stability limit with 5% step in current in converter 2
When the increase is in converter 2, all the cases studied has a trend curve that achieves
the 100% overshoot when MESCR in the weak converter is around 1.2. The figure
below presents the curves when the increase is applied in both converters. For this case
the stability limit is around 1.3.
Case A.I
Case A.II
Case B.I
Case B.II
100% limit
stability limit
200%
180%
160%
overshoot
140%
120%
100%
80%
60%
40%
20%
0%
1,1
1,2
1,3
1,4
1,5
1,6
MESCR2
1,7
1,8
1,9
Figure 5.13 Stability limit with 5% step in current in both converters
42
2
5% Increment in current order in 2
5% Increment in current order in both
1,4
Stability limit
1,3
1,2
1,1
1
Figure 5.14 Comparison between stability limit from both current increments
Table 5. 5 Stability limits for Double Infeed HVDC sytems analysis
5% Step in current in 2
MESCR
5% Step in current in
1.2
both
1.3
5.3 Final discussion
In the analysis above, we have outlined and elucidated the procedure to obtain the
stability limit regarding risk of voltage and power instability.
From the single infeed HVDC system analysis, we identified procedure 2 was the one
that provide the safest stability limit, and proceeded using it.
Checking the results from the symmetrical case in Double Infeed HVDC systems, we
realised that by applying an increment in current order of 10% it is likely to induce
other failures in the system as control upsets or commutation failures. Then, we
discarded this increment because it could not provide me reliable information since we
was not sure about the phenomenon that detonated the instability.
43
For the asymmetrical cases, we selected those that we considered more suitable to mark
a tendency. The study provides that for a particular current increment, the stability limit
is almost the same in all the simulated cases. It points to MESCR as a valid index to
define the strength of a double HVDC system.
The limits from Table 5. 5 are very close together but they are different. This is because
the effect of an increment just in one converter seems to be softer than if it is applied in
both converters simultaneously. At the same time, it is reasonable to think that a
disturbance in a single infeed HVDC system is more critical than if it takes place in a
converter linked to a stronger one that could help it to withstand the disequilibrium.
According to everything mentioned before, the conditions of simulation in the single
infeed HVDC link analysis should be closer to those in the double infeed HVDC case
when we apply a 5% step in both converters at the same time. Comparing trend curves
we can see the likeness among them in Figure 5.15.
Case A.I
Case A.II
Case B.I
Case B.II
100% limit
stability limit
single infeed HVDC
200%
180%
160%
overshoot
140%
120%
100%
80%
60%
40%
20%
0%
1,1
1,2
1,3
1,4
1,5
1,6
MESCR2
1,7
1,8
1,9
Figure 5.15 Comparison between trend curves with the single infeed HVDC (dashed curve)
44
2
Since the stability limit in both cases is identical, we find enough reasons to state that
the MESCR definition is perfectly valid for double infeed HVDC systems, and it
provides a normalized strength of the system in a particular node. It entails that all the
effects related to the interactions between converters seem to be included within the
definition, and this is a good reason to consider that this validation and, thus, the
stability limit could be extended to a generic multiple infeed HVDC system regardless
the number of stations.
45
Chapter 6
Conclusions and Forward Researches
The work in this thesis has been focused on the evaluation of the Multiple Infeed Short
Circuit Ratio as a valid index to define the strength of the system in a particular point.
More specifically, this study was done looking at the risk of voltage instability in the
system. In order to force this phenomenon, we employed two different procedures until
we found the most suitable to exclude any other induced problem that could mask the
main phenomena of interest and interfere with the correct interpretation of the results
and, thus, the conclusions.
From the simulations, we could create the curves of trend shown in Chapter 5 for
different cases that provided me enough information to expose the following
conclusions:
•
The MESCR is a valid definition of the system strength for double infeed
HVDC systems. It implies MESCR includes all the influences between
converters, providing a value that is not dependent on the number of stations.
•
Based on the criterion that the maximum allowed overshoot is 100%, the
stability limit has been set in 1.3. This limit is suitable just to prevent voltage
instabilities, since the remaining phenomena have not been included within the
research.
46
•
The procedure 2 exposed in this thesis is the most suitable way to study the risk
of voltage instability in a system, since it induces the most critical situation. The
size of the increment in current order is another important aspect to take into
account in order to prevent unexpected phenomena in our simulations.
It should also be pointed out that the conclusions in this thesis are based on some
assumptions. We suggest the following tasks for future work in this research field:
•
Extending the study presented in this thesis to systems with more than two
HVDC stations in order to ensure the validation of the MESCR definition for a
multiple infeed HVDC system.
•
Setting the stability limit by adjusting the stability criterion according to
practical requirements.
•
Studying different operating control modes. In this work the HVDC link
operates with a Constant Current Control, but it can also be operated in constant
DC Power Control. This controller can have a fast or slow response time
•
Using a more detailed benchmark model closer to the existing HVDC links
already in operation in the real world.
•
Including, within the research, new issues as:
⇒ Study all the aspects related to the interactions between converters, such
as:
− commutation failures interaction between converters
− overvoltage
− harmonics instability
⇒ Study the influence of the rectifier AC-network
⇒ Investigate improvements in the control system in order to stabilize the
AC-network
47
References
[1] Åke Ekstrom, “High Power Electronics HVDC and SVC”, Compendium, The
Royal Institute of Tehcnology, Stockholm, Sweden, June 1990
[2] N.Mohan, T.Underland, W.Robbins, “Power Electronics: Converters,
Applications and Designs”, John Wiley and Sons, INC, 2003
[3] Paulo Fischer de Toledo, Bernt Bergdhal, Gunnar Asplund, “Multiple Infeed
Short Circuit Ratio – Aspects related to Multiple HVDC into one AC
Network”, 2005 IEEE/PES Transmission and Distribution Conference &
Exhibition: Asia and Pacific, Dalian, China.
[4] M-Szechtman, T. Wess, C.V. Thio, “A Benchmark Model for HVDC System
Studies”, International Conference on AC and DC Power Transmission, 1991
[5] L.A.S. Pilotto, M. Szechtman, A.E. Hammad, “Transient AC voltage related
phenomena for HVDC schemes connected to weak AC systems”, IEEE
Transactions on Power Delivery, Vol. 7, No. 3, July 1992
[6] Frankén, G. Andersson, “Analysisis of HVDC converters connected to weak
AC Systems”, IEEE Transaction of Power Sysytems, Vol. 5, No. 1, February
1990
[7] “Transients
simulation
Software”,
(September, 2006)
48
<http://www.pqsoft.com/pscad
>
[8] Paulo Fischer de Toledo, Gunnar Asplund, Erik Jansson, “Aspects on infeed of
multiple HVDC into one ac network”
[9] Liu Peng, “Study on the Transmission Capacity and Voltage Stability of Weak
Back-to-Back HVDC System”,IEEE, Power Engineering Society General
Meeting, 2004
[10] N. Kaul, R.M. Mathur, “Solution to the problem of low order harmonic
resonance from HVDC converters”, IEEE Transaction on Power systems,
November 1990
[11] M. Sato, K. Yamaji, N. Honjo, T. Yoshino, “HVDC Converter Control for
Fast Power Recovery alter AC System Fault”, IEEE Transactions on Power
Delivery, Vol. 12, No. 3, July 1997
49
Table of Figures
Figure 2.1 An HVDC transmission system [2] ................................................................ 6
Figure 2.2. Cigre Benchmark model ................................................................................ 8
Figure 2.3. ac-networks.................................................................................................... 9
Figure 2.4 The control system........................................................................................ 10
Figure 2.5 Steady State Vd-Id characteristic [4] ............................................................ 11
Figure 2.6 The benchmark model for a double infeed HVDC system........................... 12
Figure 2.7 Alpha variation just after an increase in the current order............................ 15
Figure 2.8 Maximum power curves: Pd-U and Id-Pd [5] ................................................ 15
Figure 3.1 Simplified model of an HVDC connected to an AC network [3]................. 18
Figure 3.2 Simplified model for 2-HVDC systems........................................................ 19
Figure 3.3 Simplified model for 3-HVDC systems........................................................ 19
Figure 4.1 Cigre Benchmark model ............................................................................... 24
Figure 4.2 Cigre Benchmark model, extended version.................................................. 24
Figure 4.3 Overshoot below 100%................................................................................. 25
Figure 4.4 Overshoot close to 100% .............................................................................. 25
Figure 4.5 Voltage collapse............................................................................................ 25
Figure 4.6 Flowchart of obtaining stability limit for the Single Infeed HVDC model .. 26
Figure 4. 7: Flowchart of Procedure 1............................................................................ 28
Figure 4.8: Flowchart of Procedure 2............................................................................. 28
Figure 4.9: Flowchart of obtaining stability limit for the double infeed HVDC system.
Symmetrical cases .......................................................................................................... 30
Figure 4. 10: Flowchart of obtaining stability limit for the double infeed HVDC system.
Asymmetrical cases, block A ......................................................................................... 31
50
Figure 4.11: Flowchart of obtaining stability limit for the double infeed HVDC system.
Asymmetrical cases, block B ......................................................................................... 31
Figure 4.12: Flowchart of procedure 1........................................................................... 32
Figure 4.13: Flowchart of procedure 2........................................................................... 32
Figure 5.1 Stability limits with increase in current of 10% ........................................... 33
Figure 5.2 Stability limits with increase in current order of 5% .................................... 34
Figure 5.3 Maximum Power Curves .............................................................................. 35
Figure 5.4 In prodecure 1, step down in current order: 10% above and 5% below ....... 35
Figure 5.5 Procedure 1, increase in current order with ESCR = 1.5.............................. 36
Figure 5.6 Procedure 2, increase in current order with ESCR = 1.5.............................. 36
Figure 5.7 Stability limit with 10% step in current ........................................................ 37
Figure 5. 8 Stability limit with 5% step in current in converter 2.................................. 38
Figure 5. 9 Stability limit with 5% step in current in both converters ........................... 38
Figure 5. 10 10% Step up for MESC = 1.4229 and Z12 = 5 pu..................................... 39
Figure 5. 11 10% Step up for MESC = 1.4229 and Z12 = 0.1 pu.................................. 40
Figure 5.12 Stability limit with 5% step in current in converter 2................................. 42
Figure 5.13 Stability limit with 5% step in current in both converters .......................... 42
Figure 5.14 Comparison between stability limit from both current increments ............ 43
Figure 5.15 Comparison between trend curves with the single infeed HVDC (dashed
curve).............................................................................................................................. 44
51