Order this data sheet
by 9342ZD
MOTOROLA
SEMICONDUCTOR
TECHNICAL DATA
TTL 256 x 4-Bit
Random Access Memory
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The 93422 Series are 1024-bit ReadWrite RAMs, organized 256 words by 4
bits, designed for high performance main memory and control storage
applications,
They have full decoding on-chip, separate data input and data output lines, an
active low-output enable, write enable, and two chip selects, one active high,
one active low. These memories are fully compatible with standard TTL logic
families. A three-state output is provided to drive bus-organized systems and/or
highly capacitive loads.
*
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●
●
●
●
●
●
w
9
●
PIN ASSIGNMENT
A3
A22
Al
AO
A5
A6
Al
GND
DO
00
Vcc = PIN 22
GND = PIN 8
r
n
Vcc
1*
22
21
A4
3
20
m
4
19
m
5
18
m
6
17
Csl
7
16
03
8
15
D3
9
14
02
10
13
02
#
PIN NAMES
~,
ml m
A3
@MOTOROU
A4
A5 A6 Al
INC., 1989
AO Al
A2
CSI . . . . . . . . . Chip Selects
AO-A7
=.,
WE . .
DO-D3
.
.
.
.
00-03
. . . . . . . . . . .
m
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
. . Address Inputs
.. Output Enable
. .. Write Enable
. . . . Data Inputs
Data Outputs
MOTOROLA
DS9722
FUNCTIONAL
DESCRIPTION
.,
The 93422 Series are fully decoded 1024-bit random
access memories organized 256 words by 4 bits. Word
selections are achieved by means of an 8-bit address,
ABSOLUTE MAXIMUM
RATINGS*
AO-A7.
Operating Junction Temperature, TJ
The Chip Select (CSO and CSI ) inputs provide for memory array expansion. For large memories, the fast chip
select time permits the decoding of chip select from the
address without increasing address access time.
The read and write operations are controlled by the
state of the active low Write Enable (WE, Pin 20). With
WE and CSO held low and the CSI held high, the data at
Dn is written into ‘the addressed location. To read, WE
and CSI are held high and CSO is held low. Data in the
specified location is presented at the output (00-02)
and
is non-inverted.
The three-state outputs provide drive capability for
higher speeds with capacitive load systems, The third
state (high impedance) allows bus-organized systems
where multiple outputs are connected to a common bus.
During writing, the output is held in a high-impedance
state.
~
VCC Pin Potential to Ground Pin
–o.5vto
input Voltage (de)
–0.5
Voltage Applied to Outputs
(Output High)
Output Current (de) (Output Low)
Input Current (de)
– .$$’$~~~
TRUTH T*
High
High
High
High
High
00-03
%
x
Part Number
93422/BWAJC
93 L422/BWAJC
93 L422WBWAJC
Min
Nom
x
4.5 v
Max
5.0 v
H
L
Ambient
Temp. (TA)
5.5 v
,.
00-03
x
OPERATING RANGES
Supply Voltage (Vcc)
+5.0 mA
output
x
GUARANTEED
+7.OV
v to +5.5~u.~}.,
*
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.ct::\>
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– 0.5 vt@;+&$
v
~,+~$<~~””
,.\+*:.\\
Z
Z
Z
Z
Z
Mode
Not Selected
Not Selected
Write “O”
Write “1”
Output Disabled
Read
=M
%Itage Level
SW
!$ D@rt Care (High or Low)
– 55°c to
+ 125°C
*>Y
DC OPERATING CO@jTIONS
AND CHARACTERISTICS
(FuII operatifl@~~Rge
and temperature
,!,,,’,.
,,.... .,t.,,..
,g!.+
‘.~-=’
..,.$ Limits
..)::
, ,‘ ,j.#
‘“ , “
;’~;z$“ Min
Max
Units
~ ~:
~<,!
S.t
:.1:..,...~
,\,.~~
~
‘$*““t
::,
—
.3,:\,
‘,,,
0.45
Vdc
~w,,
\.~,.
I
range)
.Y
Symbol
Characteristic
VOL
Output Low Voltage
vlH
Input High Voltage
v[L
Input Low Voltage
IIL
IIH
Ioff
Ios
vOH
,F:J‘k~$t~
‘k” ~~
.t#*2stt?..
.:<\t
Input Low Current ~i:,&.,<E
,.,.,.,.l
...\ .,,.,..,.,.
Input High Curr~~V,}
,,:
.\r* ,,,,p
‘‘
Output ~~,~$,~igh
.,.. ., ~.
,.
Ou~~h~j$&nt
,.
,:,,&$u~High
Z)
Shoti Circuit to Ground
Voltage
vlK - ?:
In$ut
Diode Clamp Voltage
.+l,
., ~,
:.,..*.
. !,
!>-;, ,, .,
,’ ,..l,:,,
~??<:,,
,,,(.. .>,.
...t*..
-.
.,+*
$$:N\y.,,,,\
.,,,.,,.!,:
l{<;:
Icc
93422
—
Vdc
VCC = Min, 10L = 8.0 mA
Guaranteed
Input High Voltage for All Inputs
Guaranteed
Input Low Voltage for All Inputs
—
0.8
Vdc
–0.01
– 300
pAdc
VCC = Max, ~n
—
40
~Adc
VCC = Max, Vin = 5.5 V
—
—
50
– 50
pAdc
VCC = Max, Vout = 2.4 V
VCC = Max, Vout = 0.45 V
–lo
– 70
mAdc
VCC = Max (Note 1)
2.4
—
Vdc
—
–1.5
Vdc
—
130
mAdc
TA = +12YC
= 0,45 V
VCC = Min, IOH = –5.2
mA
VCC = Max, Iin = –10 mA
—
155
mAdc
TA = + 25°C
—
170
mAdc
TA = – 5YC
—
70
mAdc
TA = +12WC
—
80
mAdc
TA = +25°C
—
90
mAdc
TA = – 55°C
Power Supply Current
93 L422A
93L422
MOTOROLA
2
2.1
Conditions
Vcc = 5.5 v,
All Inputs Grounded
93422
●
93 L422,A
AC OPERATING CONDITIONS
AND CHARACTERISTICS
(Full operating voltage and temperature
range)
AC TEST LOAD AND WAVEFORMS
@
INPUT PULSES
LOADING CONDITIONS
ALL INPUTPULSES
Vcc
300Q
D.U,T,
“ ‘out}y:
:30pF
=
m;p’
=
.*’
Charatieristic
Symbol
[Notes 1,2,3,4,
READ MODE
tACS
tzRCS
tAOS
tzROS
t~
WRITE MODE
tzws
tWR
5)
934221~~A~;;
T
Mi~r$~~~.~ax
..,~ :$
:.$,,
.’.i&
, ‘.<.. *.?
,,.,&,+. ““
~?.:)-~~-’
!;>’i~:,.,
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‘$‘
—
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,* “$:~;,
,
—
1$~.
~~:
./.,
;t,Qw,\,i~,>e.t,\l,,t
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.>+.!*,
DELAY TIMES
~ < ‘:”:J.
:?~.F$,,$.
~<+
—
Write Disable to High Z
‘“’
.?5,L,.,+, >W
—
Write Recovery Time ...4..+.,:.
&;t.;u’
,. \.. ,..
DELAY TIMES
Chip Select Time
Chip Select to High Z
Output Enable Time
Output Enable to High Z
Address Access Time
..>
..
.
93L4221BWAJC
93L422WBWAJC
Min
Mex
Min
Max
45
45
45
45
60
—
—
—
—
—
45
45
45
45
75
—
—
—
—
—
40
40
40
40
55
45
50
—
—
45
50
—
—
45
45
ns
ns
tw
INPUT TIMING REQUti@TS
~.:~.,
Write Pulse Widt~: $~t3+a$
30
—
30
—
40
—
twSD
(to guarante~,$ri[~}”
Data Setup$*W$br
5.0
—
5.0
—
5.0
—
5.0
10
—
—
5.0
10
—
—
5.0
10
—
—
10
5.0
5.0
—
—
—
10
5.0
5.0
—
—
—
5.0
5.0
5.0
—
—
—
to Write,
f$,
Data ~d~~~~
Ad~res&$~~p
twHD
tWSA
Unit
ns
,,$
Afier Write
Tme
,,i@~tw
tWHA
twscs
tWHCS
-7.6.
Ulra;
= Min)
Hold Time
.<?:~$~p ‘Select Setup Time
,, ?Fj$,
~],~,,ChipSelect Hold Time
“~::..,
,., t>,.
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,..,,!
t!,
.)$$: ~
1. Outp@fsh~~ ~ircuit conditions must not exceed 1.0 second duration,
2, T@&t@m
address access time is guaranteed to be the worst-case bit in the memory.
. ~,,,......’
3, ~?.$;.~.~sed to measure transitions betieen logic levelsandfrom High Z state to logic Low state.
Lq, ~ used to meaaure transitions between High Z state to logic High state.
~~}~d
C used to measure transitions from either logic High or Low state to High Z state.
~+(~11 time measurements are referenced to + 1.5 Vdc except transitions into the High Z state where outputs are referenced to a delta of 0.5 Vdc
‘+~rom the logic level using Load C.
5. See test circuit and waveforms.
3
READ OPERATION TIMING
(All ~me
PROPAGATION
CS1
Measurements
DIAGRAM
Referenced to 1.5 V)
DELAY FROM CHIP SELECT
PROPAGATION
DELAY FROM ADDRESS
INPUTS
~“
AO-A7
AODRESSINPUTS
‘HI;Z—
;E
tAcs
3-STATE
00-03
DATAOUTPUT
LOAOB
HIGHZ
————
—
PROPAGATION
F
00-03
OATAOUTPUT
DELAY
Wscs4
LOADA
——-—
HIGHZ
_
HIGHZ
———-
+
~R
-r>~
LOADB
~HCS
--
IALL
ABOVEMEASUREMENTSREFERENCE
TO 1.5
V)
MOTOROLA
4
93422
●
93 L422,A
WRITE ENABLE TO HIGH Z DELAY
5V
Y
DATA
OUTPUT
&
D.U,T,
750Q
4500
30pF
=
LOADC
PROPAGATION
DELAY FROM CHIP SELECT TO HIGH Z
Csl
CHIPSELECT
915V
m
CHIPSELECT
00-03
DATAOUTPUT
&
<
“O”LEVEL
“l”LEVEL
00-03
OATAOUTPUT
HIGHZ
-
0.5v
——
‘L
0.5v
----
w ,$~a~,
*50@/ine&
93422
●
93 L422,A
HIGHZ
$ 5WCW
75°cw
15°cw
I
h. per minute blown air.
MOTOROLA
5
OUTLINE
DIMENSIONS
..;. {~,,, ~,{$~
.J ,\<>>,,\!
~~.~
Y14.5M, 1982.
2, CONTROLLING OIMENSION: INCH.
3. OIMENSION L TO CENTER OF LEAD w#EN
,:.t?~.:.,
FORMED PARALLEL.
,,~’ t-,~..
4. DIMENSION F FOR FULL LEAQ&WF
E@S
OPTIONAL AT LEAD POSITl~$
$$,
1, ?ft12, AND 22.
5, DIM F MAY NARROW T@~~@~~HERE
THE
LEAD ENTERS THE CW~$~by.
.’.,
,J\
\ ~,,,.
.,.,,
:Si
~. v.+’~
‘t~l
. . ..
,{3;.$‘
*:
..,,,
“$,w?~la
reserves
the right to make
@es
not assume
any liability
arising
&der
its patent rights
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intended
for
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implant
whereupon
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shall
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-
0
A
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or design.
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out of the application
or use of any product
or circuit described
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products
are not authorized’for
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MOrOROLA
93422
●
93 L422,A