Some background Status Roadmap White Rabbit status and roadmap Javier Serrano CERN BE-CO Hardware and Timing section Geneva, 23 June 2015 J. Serrano White Rabbit status and roadmap 1/16 Some background 1 Some background 2 Status 3 Roadmap Status J. Serrano White Rabbit status and roadmap Roadmap 2/16 Some background Status Roadmap Outline 1 Some background 2 Status 3 Roadmap J. Serrano White Rabbit status and roadmap 3/16 Some background Status Roadmap White Rabbit Switch Central element of WR network Original design optimized for timing, designed from scratch 18 1000BASE-BX10 ports Open design (H/W and S/W) Commercially available J. Serrano White Rabbit status and roadmap 4/16 Some background Status Roadmap White Rabbit Switch inside Debug ports Cooling FANs 0 I Back panel Power supply 12V DC 80W 1-PPS in/out 10 MHz in/out clocking resources Management ports 18 SFP cages Xilinx Virtex6 FPGA 1 Power Status 2 3 4 5 6 7 8 64MB DDR2 256MB NAND ARM CPU 8MB boot flash 9 10 11 12 13 14 15 16 17 18 Front panel J. Serrano White Rabbit status and roadmap 5/16 Some background Status Roadmap WR Node example : SPEC board FMC-based Hardware Kit All carrier cards are equipped with a White Rabbit port. Mezzanines can use the accurate clock signal and “TAI” (synchronous sampling clock, trigger time tag, ...). J. Serrano White Rabbit status and roadmap 6/16 Some background Status Roadmap Example White Rabbit node J. Serrano White Rabbit status and roadmap 7/16 Some background Status Roadmap WR PTP Core SFP GTP PHY src snk snk src S src Fabric redirectorsnk Endpoint 1-Wire Pipelined WB MAC I/F White Rabbit PTP Core snk src src snk S (v)UART S M SysCon S M M M WB Crossbar M M M S Mini-NIC S Dual-port RAM (1 x 7) S Soft PLL S Tunable oscillators M 1-PPS gen S S WB Crossbar M S (3 x 2) S Lattice M Micro 32 M M J. Serrano Gn4124 core White Rabbit status and roadmap 8/16 Some background Status Roadmap White Rabbit Node Core J. Serrano White Rabbit status and roadmap 9/16 Some background Status Roadmap Outline 1 Some background 2 Status 3 Roadmap J. Serrano White Rabbit status and roadmap 10/16 Some background Status Roadmap Switch status Version 4.1.2 of gateware/software released in December 2014. Supports 3.4 hardware. Supports VLANs and statistics. Still some bugs visible at high loads. J. Serrano White Rabbit status and roadmap 11/16 Some background Status Roadmap Snake test for the switch J. Serrano White Rabbit status and roadmap 12/16 Some background Status Roadmap Node status Several applications operational, using SPEC and SVEC, e.g. LHC instability studies. The WR Node Core makes application development faster and easier. Ironing out a few bugs in PPSi. J. Serrano White Rabbit status and roadmap 13/16 Some background Status Roadmap Outline 1 Some background 2 Status 3 Roadmap J. Serrano White Rabbit status and roadmap 14/16 Some background Status Roadmap Switch roadmap Short term Fix all bugs uncovered by snake test. Complete SNMP support. Add monit support to detect and restart stopped processes. Update documentation. Release in July 2015. Medium term End of Summer: support for MTTF/MTBF estimation. Logging up time, temperatures. . . Q4 2015: update buildroot to latest version. 2016: clock and data switch-over, clock hold-over. J. Serrano White Rabbit status and roadmap 15/16 Some background Status Roadmap Node roadmap Short term Fix PPSi bugs. Improve WR Node Core and offer it as a documented service. RF distribution over WR. Medium term Integrate WR into CERN’s General Machine Timing system. Integrate new RISC-V processor core into WRNC. J. Serrano White Rabbit status and roadmap 16/16
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