STH240N10F7-2,
STH240N10F7-6
N-channel 100 V, 0.002 Ω typ., 180 A STripFET™ F7
Power MOSFETs in H2PAK-2 and H2PAK-6 packages
Datasheet - production data
Features
Order codes
STH240N10F7-2
TAB
TAB
STH240N10F7-6
2
7
3
1
2
H PAK-2
1
H2PAK-6
VDS
RDS(on)max.
ID
100 V
0.0025 Ω
180 A
• Ultra low on-resistance
• 100% avalanche tested
Applications
• High current switching applications
Description
Figure 1. Internal schematic diagram
These N-channel Power MOSFETs utilize the
STripFET™ F7 technology with an enhanced
trench gate structure that results in very low onstate resistance, while also reducing internal
capacitance and gate charge for faster and more
efficient switching.
Table 1. Device summary
Order codes
Marking
240N10F7
STH240N10F7-6
This is information on a product in full production.
Packaging
H2PAK-2
STH240N10F7-2
July 2014
Package
DocID026115 Rev 2
H2PAK-6
Tape and reel
1/17
www.st.com
Contents
STH240N10F7-2, STH240N10F7-6
Contents
1
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3
Test circuits
4
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5
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.............................................. 8
4.1
H2PAK-2, STH240N10F7-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.2
H2PAK-6, STH240N10F7-6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
DocID026115 Rev 2
STH240N10F7-2, STH240N10F7-6
1
Electrical ratings
Electrical ratings
Table 2. Absolute maximum ratings
Symbol
Parameter
Value
Unit
VDS
Drain-source voltage
100
V
VGS
Gate-source voltage
± 20
V
ID (1)
Drain current (continuous) at TC = 25°C
180
A
(1)
Drain current (continuous) at TC=100°C
120
A
Drain current (pulsed)
720
A
PTOT
Total dissipation at TC = 25°C
300
W
EAS(3)
Single pulse avalanche energy
500
mJ
Tj
Operating junction temperature
- 55 to 175
°C
Value
Unit
ID
IDM
(2)
Tstg
Storage temperature
1. Current limited by package.
2. Pulse width limited by safe operating area.
3. Starting Tj=25°C, Id=45A, Vdd=50V
Table 3. Thermal data
Symbol
Parameter
Rthj-case
Thermal resistance junction-case
0.5
°C/W
Rthj-pcb(1)
Thermal resistance junction-pcb
35
°C/W
1. When mounted on 1 inch² FR-4, 2 Oz copper board
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Electrical characteristics
2
STH240N10F7-2, STH240N10F7-6
Electrical characteristics
(TCASE = 25 °C unless otherwise specified).
Table 4. On/off states
Symbol
V(BR)DSS
Parameter
Test conditions
Drain-source breakdown
voltage
VGS= 0, ID = 250 µA
Min.
Typ.
Max.
100
Unit
V
VGS = 0, VDS= 100 V
1
µA
IDSS
Zero gate voltage drain
current
VGS = 0, VDS= 100 V,
TC= 125°C
100
µA
IGSS
Gate body leakage current VDS = 0, VGS = +20 V
100
nA
4.5
V
0.0025
Ω
VGS(th)
Gate threshold voltage
VDS= VGS, ID = 250 µA
RDS(on)
Static drain-source
on-resistance
VGS= 10 V, ID= 60 A
2.5
0.002
Table 5. Dynamic
Symbol
Parameter
Ciss
Input capacitance
Coss
Output capacitance
Crss
Reverse transfer
capacitance
Qg
Total gate charge
Qgs
Gate-source charge
Qgd
Gate-drain charge
Test conditions
VGS = 0, VDS = 25 V,
f = 1 MHz
VDD = 50 V, ID = 180 A,
VGS = 10 V
(see Figure 14)
Min.
Typ.
Max.
Unit
-
11550
-
pF
-
2950
-
pF
-
217
-
pF
-
160
-
nC
-
48
-
nC
-
38
-
nC
Min.
Typ.
Max.
Unit
-
49
-
ns
-
139
-
ns
-
110
-
ns
-
112
-
ns
Table 6. Switching times
Symbol
td(on)
tr
td(off)
tf
4/17
Parameter
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Test conditions
VDD = 50 V, ID = 90 A
RG = 4.7 Ω VGS = 10 V
(see Figure 13,
Figure 18)
DocID026115 Rev 2
STH240N10F7-2, STH240N10F7-6
Electrical characteristics
Table 7. Source drain diode
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
ISD
Source-drain current
-
180
A
ISDM(1)
Source-drain current
(pulsed)
-
720
A
VSD(2)
Forward on voltage
VGS=0, ISD=180 A
-
1.2
V
trr
Reverse recovery time
-
108
ns
Qrr
Reverse recovery charge
-
315
nC
IRRM
Reverse recovery current
ISD=180 A,
di/dt = 100 A/µs,
VDD=64 V, Tj=150°C
(see Figure 15)
-
5.8
A
1. Pulse width limited by safe operating area.
2. Pulse duration = 300µs, duty cycle 1.5%
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Electrical characteristics
2.1
STH240N10F7-2, STH240N10F7-6
Electrical characteristics (curves)
Figure 2. Safe operating area
Figure 3. Thermal impedance
*,3*6$
,'
$
į LV
HD
DU RQ
LV '6
LQ
[5
Q PD
WLR
UD GE\
H
2S PLWH
/L
WK
*,3*6$
.
—V
PV
PV
6LQJOHSXOVH
7M ƒ&
7F ƒ&
6LQJOHSXOVH
9'69
Figure 4. Output characteristics
9*6 9
9
9
WSV
9
*,3*6$
,'
$
Figure 5. Transfer characteristics
*,3*6$
,' $
9'6 9
Figure 6. Gate charge vs gate-source voltage
*,3*6$
9*6
9
9'' 9
,' $
9'69
9*69
Figure 7. Static drain-source on-resistance
*,3*6$
5'6RQ
Pȍ
9*6 9
6/17
4JQ&
DocID026115 Rev 2
,'$
STH240N10F7-2, STH240N10F7-6
Electrical characteristics
Figure 8. Capacitance variations
Figure 9. Normalized gate threshold voltage vs
temperature
*,3*6$
&
S)
*,3*6$
9*6WK
QRUP
,' —$
&LVV
&RVV
&UVV
9'69
Figure 10. Normalized on-resistance vs
temperature
*,3*6$
5'6RQ
7-ƒ&
Figure 11. Normalized V(BR)DSS vs temperature
*,3*6$
9%5'66
QRUP
QRUP
9*6 9
,' $
,' P$
7-ƒ&
7-ƒ&
Figure 12. Source-drain diode forward
characteristics
*,3*6$
96' 9
7- ƒ&
7- ƒ&
7- ƒ&
,6'$
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Test circuits
3
STH240N10F7-2, STH240N10F7-6
Test circuits
Figure 13. Switching times test circuit for
resistive load
Figure 14. Gate charge test circuit
VDD
12V
47kΩ
1kΩ
100nF
3.3
μF
2200
RL
μF
IG=CONST
VDD
VGS
100Ω
Vi=20V=VGMAX
VD
RG
2200
μF
D.U.T.
D.U.T.
VG
2.7kΩ
PW
47kΩ
1kΩ
PW
AM01468v1
Figure 15. Test circuit for inductive load
switching and diode recovery times
A
A
AM01469v1
Figure 16. Unclamped inductive load test circuit
L
A
D
G
D.U.T.
FAST
DIODE
B
B
VD
L=100μH
S
3.3
μF
B
25 Ω
1000
μF
D
VDD
2200
μF
3.3
μF
VDD
ID
G
RG
S
Vi
D.U.T.
Pw
AM01470v1
AM01471v1
Figure 17. Unclamped inductive waveform
Figure 18. Switching time waveform
ton
V(BR)DSS
tdon
VD
toff
tr
tdoff
tf
90%
90%
IDM
10%
ID
VDD
10%
0
VDD
VDS
90%
VGS
AM01472v1
8/17
0
DocID026115 Rev 2
10%
AM01473v1
STH240N10F7-2, STH240N10F7-6
4
Package mechanical data
Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
DocID026115 Rev 2
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Package mechanical data
4.1
STH240N10F7-2, STH240N10F7-6
H2PAK-2, STH240N10F7-2
Figure 19. H²PAK-2 drawing
8159712_C
10/17
DocID026115 Rev 2
STH240N10F7-2, STH240N10F7-6
Package mechanical data
Table 8. H²PAK-2 mechanical data
mm
Dim.
Min.
Typ.
Max.
A
4.30
4.80
A1
0.03
0.20
C
1.17
1.37
e
4.98
5.18
E
0.50
0.90
F
0.78
0.85
H
10.00
10.40
H1
7.40
7.80
-
L
15.30
15.80
L1
1.27
1.40
L2
4.93
5.23
L3
6.85
7.25
L4
1.5
1.7
M
2.6
2.9
R
0.20
0.60
V
0°
8°
DocID026115 Rev 2
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Package mechanical data
STH240N10F7-2, STH240N10F7-6
Figure 20. H²PAK-2 recommended footprint (dimensions are in mm)
8159712_C
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STH240N10F7-2, STH240N10F7-6
4.2
Package mechanical data
H2PAK-6, STH240N10F7-6
Figure 21. H²PAK-6 drawing
8159693_Rev_F
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Package mechanical data
STH240N10F7-2, STH240N10F7-6
Table 9. H²PAK-6 mechanical data
mm
Dim.
Min.
Typ.
Max.
A
4.30
4.80
A1
0.03
0.20
C
1.17
1.37
e
2.34
2.74
e1
4.88
5.28
e2
7.42
7.82
E
0.45
0.60
F
0.50
0.70
H
10.00
10.40
-
14/17
H1
7.40
7.80
L
14.75
15.25
L1
1.27
1.40
L2
4.35
4.95
L3
6.85
7.25
L4
1.5
1.75
M
1.90
2.50
R
0.20
0.60
V
0°
8°
DocID026115 Rev 2
STH240N10F7-2, STH240N10F7-6
Package mechanical data
Figure 22. H²PAK-6 recommended footprint (dimensions are in mm)
footprint_Rev_F
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Revision history
5
STH240N10F7-2, STH240N10F7-6
Revision history
Table 10. Document revision history
16/17
Date
Revision
Changes
07-May-2014
1
First release.
23-Jul-2014
2
– Modified: title and description
– Added: Section 2.1: Electrical characteristics (curves)
– Minor text changes
DocID026115 Rev 2
STH240N10F7-2, STH240N10F7-6
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