INNOVATIVE PC Data Acquisition Solutions
PCI-20428W-1A, -2A, -3A
MULTIFUNCTION BOARDS
and
MASTER LINK SOFTWARE LIBRARIES
MANUAL
855M467
3.0
Copyright 1994-97 by Intelligent Instrumentation Inc., Tucson, Arizona, USA
All rights reserved.
Warranty and Repair Policy Statement
General
Seller warrants that its products furnished hereunder will, at the time of delivery, be free from defects in material and
workmanship and will conform to Seller's published specifications applicable at the time of sale. Seller's obligation or liability to
Buyer for products which do not conform to above stated warranty shall be limited to Seller, at Seller's sole discretion, either
repairing the product, replacing the product with a like or similar product, or refunding the purchase price of the nonconforming
product, provided that written notice of said nonconformance is received by Seller within the time periods set forth below:
a) for all software products, including licensed programs, ninety (90) days from date of initial delivery to Buyer;
b) for all hardware products, including complete systems, one year from date of initial delivery to Buyer, subject to the
additional conditions of paragraphs c) and d) below;
c) all PCI-20000, PCI-600, PCI-700 series circuit card assemblies shall be warranted for the "lifetime" of the product,
subject to the limitations of paragraph d) below. For the purposes of this warranty, "lifetime" is defined to mean:
FROM THE DATE OF PURCHASE UNTIL FIVE YEARS AFTER THE DATE THAT INTELLIGENT
INSTRUMENTATION DISCONTINUES MANUFACTURING SAID PRODUCT AND LISTS THE PRODUCT IN ITS
PUBLISHED LIST OF DISCONTINUED PRODUCTS. Electro-mechanical items such as, but not limited to, batteries,
relays and switches, which are purchased separately or included as part of the above products, are warranted for a
period of one year.
d) In the event that Buyer's returned product is a Discontinued product and is unrepairable for any reason, Seller may
elect to replace it with like or similar product that is, in Seller's sole judgment, the closest equivalent to the returned
product. Seller does not warrant that such replacement product will be an exact functional replacement of the
returned product.
Further, all products warranted hereunder for which Seller has received timely notice of nonconformance must be returned FOB
Seller's plant no later than thirty (30) days after the expiration of the warranty periods set forth above.
These warranties provided herein shall not apply to any products which Seller determines have been subjected, by Buyer or
others, to operating and/or environmental conditions in excess of the limits established in Seller's published specifications or
otherwise have been the subject of mishandling, misuse, neglect, improper testing, repair, alteration or damage. THESE
WARRANTIES EXTEND TO BUYER ONLY AND NOT TO BUYER'S CUSTOMERS OR USERS OF BUYER'S PRODUCT AND
ARE IN LIEU OF ALL OTHER WARRANTIES WHETHER EXPRESS, IMPLIED OR STATUTORY INCLUDING IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL SELLER
BE LIABLE FOR INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES. Seller's liability for any claim of any kind shall in
no case exceed the obligation or liability specified in this Warranty clause.
Technical Assistance and Service
Seller's warranty as herein set forth shall not be enlarged, diminished or affected by, and no obligation or liability shall arise or
grow out of, Seller's rendering of technical advice, facilities or service in connection with Buyer's order of the goods furnished
hereunder. Products returned for warranty service, but which are found to be fully functional and in conformance with
specifications may be subject to a nominal service charge and return freight charges. Periodic re-calibration of products, if
required, is the responsibility of Buyer and is not provided under this Warranty.
Static Sensitivity
Seller ships all static-susceptible products in anti-static packages. Seller's Warranty as herein set forth shall not cover warranty
repair or replacement for products damaged by static due to Buyer's failure to use proper protective procedures when handling,
storing, or installing products.
IBM PC, XT, AT are registered trademarks of International Business Machines Corporation.
Microsoft C, Microsoft Windows and MS DOS are registered trademarks of Microsoft Corporation.
PCI-20428W Series Multifunction Boards
Use of Equipment
Intelligent Instrumentation Inc., assumes no responsibility for any direct, indirect or consequential loss or damages
resulting from misuse of the equipment or for improper or inadequate maintenance of the equipment or for any
such damage or loss resulting from the use of other equipment, attachments, accessories, and repairs at any time
made to or placed upon the equipment or any replacement thereof. Furthermore, Intelligent Instrumentation Inc.,
makes no representations or warranties, either expressed or implied, in connection with the use of the equipment
in the event it is improperly used, repaired or maintained.
WARNING
Lethal voltages exist inside computers. Always ensure that power is removed before opening the case.
Only qualified technicians should install, modify, or adjust equipment inside any computer unit.
CAUTION
Failing to turn off the power when inserting or removing boards will damage the boards and possibly
the computer as well.
FCC Radio Frequency Interference Statement
This equipment generates and uses radio frequency energy, and may cause interference to radio or television
reception.
Per FCC rules, Part 15, Subpart J, operation of this equipment is subject to the conditions that no harmful
interference is caused and that interference must be accepted that may be caused by other incidental or restricted
radiation devices, industrial, scientific or medical equipment, or from any authorized radio user.
The operator of a computing device may be required to stop operating his device upon a finding that the device is
causing harmful interference and it is in the public interest to stop operation until the interference problem has
been corrected.
The user of this equipment is responsible for any interference to radio or television reception caused by the
equipment. It is the responsibility of the user to correct such interference.
i
PCI-20428W Series Multifunction Boards
PCI-20428W SERIES MULTIFUNCTION BOARDS MANUAL
REVISION HISTORY
Version
Date
Revision
1.0
1.1
940718
940824
2.0
940914
2.1
2.2
960905
970325
2.3
970822
3.0
970822
Original Release
Various typographic corrections made, corrected references
to PCI-20369S utility functons which are included with libraries
and not supplied as separate source code.
Updated manual for addition of the PCI-20428W-3 model to the
PCI-20428W Series Boards. Added information on Visual Basic
and Pascal software support provided by the Windows based
Master Link Software Libraries.
Section B.5.2, pg B-8, changed rate generator to prescaler.
Appendix A, added reset parameter to CTR8254ReadGroup call,
added revised legend for PCI-20429T-1 Termination Panel in
Appendix E.
ECO 97051901, added notes on 1/4 amp fuse on +5V power out
pins. Corrected write function description of Offset Register 01 in
Appendix B.
Updated for Master Link V3.0, and “-xA” hardware revisions
(inclusion of analog input and output FIFO buffers and rate
generator option jumper). Updated description of Offset Register 01
in Appendix for addition of latch functions and replaced layout
drawing and jumper table in Chapter 2 for new jumper W39.
Declaration of Conformity
Application of Council Directive(s)
Standard(s) to which Conformity is Declared
Manufacturer’s Name
Manufacturer’s Address
Type of Equipment
Model # (s)
73/23/EEC, 89/336/EEC
EN60950, EN55022, EN50082-1
Intelligent Instrumentation, Inc.
6550 S. Bay Colony Drive, MS130
Tucson, Arizona 85706 USA
Data Acquisition and Control Boards
PCI-20428W-1, -2, -3 Series Multifunction
Boards
We, the undersigned, hereby declare that the equipment specified above conforms to the above
Directive(s) and Standard(s).
6550 S. Bay Colony Drive,
Place :
MS130
Tucson, Arizona USA
ii
Date :
5/14/96
Place :
Esslinger Strasse 7
70771 Leinfelden-Echterdingen,
Germany
Date :
5/14/96
Richard A. Daniel
Jochen Weiland
V.P. General Manager
Geschäftsführer (II GmbH)
Table of Contents
Table of Contents
Preface........................................................................................................................................
ix
Chapter 1: Introduction
1.1 About this Manual .................................................................................................... 1
1.2 The PCI-20428W Series Low Cost Multifunction Boards........................................ 1
Figure 1.1 PCI-20428W-1, -2 and -3 Multifunction
Boards Block Diagram....................................................................... 2
1.2.1 Analog Inputs........................................................................................... 3
1.2.2 Analog Outputs ........................................................................................ 3
1.2.3 Rate Generators ...................................................................................... 3
1.2.4 Counter .................................................................................................... 3
1.2.5 Digital I/O ................................................................................................. 4
1.3 The Master Link Software Libraries......................................................................... 4
1.4 System Requirements ............................................................................................. 4
Chapter 2: Configuration and Installation
2.1 Chapter Overview .................................................................................................... 5
2.2 Setting the Board's Base Address ........................................................................... 5
2.2.1 The PC's I/O Map .................................................................................... 5
2.2.2 Switch Settings ........................................................................................ 5
Figure 2.1 Example Base Address DIP Switch Settings ..................... 5
Figure 2.2 PCI-20428W-1 and -2 Board Layout Diagram
and Jumper Locations ....................................................................... 6
Figure 2.3 PCI-20428W-3 Board Layout Diagram
and Jumper Locations ....................................................................... 7
2.3 Analog Input Configuration ...................................................................................... 8
Table 2.1 Single-Ended and Differential Configurations................................... 8
Table 2.2 Analog Input Range Configurations................................................. 8
2.4 Analog Output Configuration ................................................................................... 8
Table 2.3 Analog Output Range Configurations.............................................. 8
Table 2.4 Analog Output Rate Generator Selection ......................................... 9
2.5 DMA Channel Selection........................................................................................... 9
Table 2.5 DMA Channel Selection Jumper Settings (-1 and -2 models).......... 9
Table 2.6 DMA Channel Selection Jumper Settings (-3 model)....................... 9
2.6 Interrupts ................................................................................................................. 9
Table 2.7 Interrupt Source and IRQ Jumpers .................................................. 10
2.7 Installing the Board in Your PC................................................................................ 10
2.8 Connecting Your Board to the Outside World ......................................................... 11
Table 2.8 50-pin I/O Connector Signals ........................................................... 11
Figure 2.4 PCI-20428W I/O Connector Diagram ................................ 12
Chapter 3: Master Link Software Libraries
3.1 Introduction .............................................................................................................. 13
3.2 System Configuration Requirements....................................................................... 13
3.2.1 DOS Environment - Programming Language Support ............................ 13
3.2.2 Microsoft Windows 3.x Environment Programming Language Support ................................................................... 13
3.2.3 Win32 Environment - Programming Language Support ......................... 14
3.3 The Software License Agreement ........................................................................... 14
3.4 Installing the DOS Based Libraries.......................................................................... 14
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Table of Contents
3.5 DOS Based Library Files..........................................................................................15
3.5.1 C Language Software Library Files ..........................................................16
3.5.2 Turbo Pascal Language Software Library Files .......................................16
3.5.3 Microsoft QuickBASIC Language Software Library Files .......................17
3.6 Using the DOS Based Software Interface Library....................................................18
3.6.1 Interface Files and Your Program ............................................................18
C and QuickBASIC ...............................................................................18
Turbo Pascal.........................................................................................18
3.6.2 Summary of Steps for Using the DOS Based Interface Files ..................20
3.7 Installing the Microsoft Windows 3.x Based Software Libraries ...........................21
3.8 The Microsoft Windows 3.x Based Software Interface Files ................................23
3.8.1 Microsoft Visual Basic Language Files ..................................................23
3.8.2 C Language Software Files......................................................................24
3.8.3 Pascal Language Software Files..............................................................25
3.9 Using the Microsoft Windows 3.x Based Software Interface Files .......................26
3.9.1 The Master Link Dynamic Link Library.....................................................26
3.9.2 Other Interface Files and Your Program ..................................................26
3.9.3 Programming Language Notes ................................................................26
Visual Basic...........................................................................................26
C............................................................................................................27
Turbo Pascal for Windows....................................................................27
3.10 Installing the Win32 Based Software Libraries ......................................................28
3.11 The Win32 Based Software Interface Files ...........................................................31
3.11.1 C Language Software Files....................................................................32
3.11.2 Microsoft Visual Basic Language Files ................................................33
3.12 Using the Win32 Based Software Interface Files...................................................33
3.12.1 The Master Link Win32 Dynamic Link Library .......................................33
3.12.2 Other Interface Files and Your Program ................................................34
3.12.3 Programming Language Notes ..............................................................34
C............................................................................................................34
Visual Basic...........................................................................................34
3.13 Communicating with the Libraries ..........................................................................35
Chapter 4: Initialization
4.1 Introduction ..............................................................................................................37
4.2 Initialization Functions ..............................................................................................37
4.2.1 Hardware and Software Initialization Functions .......................................37
4.2.2 Hardware Support Functions ...................................................................37
4.2.3 Slot Assignment and Inquiry Functions....................................................38
Slot Assignment Functions ...................................................................38
Slot Inquiry Functions............................................................................38
4.3 Function Call Sequence ...........................................................................................39
Chapter 5: Analog Input
5.1 Introduction ..............................................................................................................41
5.2 Analog Input Circuit Description...............................................................................41
5.3 Modes of Operation for Acquiring Analog Input Data...............................................41
5.3.1 Software Controlled Acquisition ...............................................................42
Software Controlled Analog Input Programming Procedures ...............42
Figure 5.1 Flow Chart: Software Controlled Analog Input Read .........43
5.3.2 Hardware Controlled Acquisition..............................................................43
Primary Function Calls ..........................................................................43
Pacing Signals ......................................................................................43
DMA Start and Stop Modes ..................................................................44
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Table of Contents
Start on Command - Stop on Terminal Count ...................................... 44
Start on Command - Stop on Command.............................................. 45
Figure 5.2 Operation of a Circular Buffer ........................................... 45
Start on Trigger - Stop on Terminal Count ........................................... 45
Start on Trigger - Stop on Command ................................................... 46
Buffers .................................................................................................. 46
Summary .............................................................................................. 47
5.3.4 Multiple Channel Analog Input DMA Programming Procedures.............. 48
Figure 5.3 Flow Chart: Example DMA Analog Input
Acquisition (1 of 2)............................................................................. 50
Figure 5.3 Flow Chart: Example DMA Analog Input
Acquisition (2 of 2)............................................................................. 51
Chapter 6: Analog Output
6.1 Introduction .............................................................................................................. 53
6.2 PCI-20428W-1 and -2 Analog Output Circuit Description ....................................... 53
6.3 Modes of Operation for Transferring Analog Output Data....................................... 53
6.3.1 Software Controlled Analog Output ......................................................... 54
Software Controlled Analog Output Programming Procedures............ 54
Figure 6.1 Flow Chart: Software Controlled Single
Channel Analog Output ..................................................................... 55
Figure 6.2 Flow Chart: Software Controlled Dual
Channel Analog Output ...................................................................... 56
6.3.2 Hardware Controlled Analog Output........................................................ 56
Primary Function Calls ......................................................................... 56
Pacing Signals ...................................................................................... 57
DMA Start and Stop Modes.................................................................. 57
Start on Command - Stop on Terminal Count ...................................... 57
Start on Command - Stop on Command.............................................. 57
Buffers .................................................................................................. 58
Summary .............................................................................................. 59
6.3.3 Analog Output DMA Programming Procedures ...................................... 60
Figure 6.3 Flow Chart: Example DMA Analog Output
Process (1 of 2) ................................................................................. 62
Figure 6.3 Flow Chart: Example DMA Analog Output
Process (2 of 2) ................................................................................. 63
Chapter 7: Counter
7.1 Introduction .............................................................................................................. 65
7.2 Counter Circuit Description...................................................................................... 65
7.3 Operational Modes .................................................................................................. 65
7.3.1 Principal 8254 Counter Function Calls .................................................... 65
7.3.2 Counter Mode Descriptions ..................................................................... 66
Mode 0: Interrupt on Terminal Count ................................................... 66
Figure 7.1 Counter Mode 0: Interrupt on Terminal Count ................... 66
Mode 1: Hardware Retriggerable One-Shot ......................................... 66
Figure 7.2 Counter Mode 1: Hardware Retriggerable One-Shot ......... 67
Mode 2: Rate Generator....................................................................... 67
Figure 7.3 Counter Mode 2: Rate Generator....................................... 67
Mode 3: Square-Wave Generator. ....................................................... 67
Figure 7.4 Counter Mode 3: Square-Wave Generator ........................ 68
Mode 4: Software Triggered Strobe .................................................... 68
Figure 7.5 Counter Mode 4: Software Triggered Strobe ..................... 68
Mode 5: Hardware Triggered Strobe .................................................... 68
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Table of Contents
Figure 7.6 Counter Mode 5: Hardware Triggered Strobe ....................69
Mode Summary Table...........................................................................69
7.4 Reading Counter Values and Status........................................................................69
7.5 Programming Procedures ........................................................................................70
Figure 7.7 Flow Chart: Programming and Reading Counter 0...........70
Chapter 8: Digital I/O
8.1 Introduction ..............................................................................................................71
8.2 Digital I/O Circuit Description ...................................................................................71
8.3 Programming Procedures ........................................................................................71
8.3.1 Reading Digital Input Data .......................................................................71
Figure 8.1 Flow Chart: Reading Digital Input Data.............................72
8.3.2 Writing Digital Output Data ......................................................................72
Figure 8.2 Flow Chart: Writing to a Digital Output Port......................72
Chapter 9: Rate Generators
9.1 Introduction ..............................................................................................................73
9.2 Rate Generator Circuit Description ..........................................................................73
9.3 Rate Generator Operation........................................................................................73
9.3.1 Pulse Mode ..............................................................................................73
9.3.2 Square-Wave Operation ..........................................................................74
Figure 9.1 Pulse and Square-Wave Output Waveforms ....................74
9.3.3 Enabling and Disabling a Generator's Output..........................................74
9.4 Programming Procedures ........................................................................................74
Figure 9.2 Flow Chart: Rate Generator Programming .......................75
Appendix A: Master Link Software Libraries Function Call Reference
A.1 General Information .................................................................................................77
A.2 General Description and Preliminary Notes.............................................................77
A.2.1 Call Format ..............................................................................................78
A.2.2 Common Call Parameters and Data Types.............................................78
The Slot Parameter...............................................................................78
The Module Parameter .........................................................................78
The Channel/Port Parameters ..............................................................79
Data Types............................................................................................79
A.3 System Configuration Summary..............................................................................80
A.4 Function Call Summary ...........................................................................................80
A.5 Function Call Specifications.....................................................................................81
A.5.1 Analog Input.............................................................................................83
AIConfigureList......................................................................................83
AIRead ..................................................................................................85
A.5.2 Analog Output..........................................................................................86
AOConfigure .........................................................................................86
AOWrite ................................................................................................87
AOWriteGroup ......................................................................................87
A.5.3 Buffer Management .................................................................................88
BUFAllocate ..........................................................................................89
BUFAttachProcess................................................................................91
BUFDeallocate ......................................................................................93
BUFDecode...........................................................................................93
BUFEncode...........................................................................................94
BUFMoveIn ...........................................................................................95
BUFMoveOut ........................................................................................96
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Table of Contents
BUFSeek .............................................................................................. 97
A.5.4 Counters, 8254-Based ............................................................................ 99
CTR8254Configure............................................................................... 99
CTR8254Disable .................................................................................. 100
CTR8254Enable ................................................................................... 100
CTR8254Read...................................................................................... 101
CTR8254ReadGroup............................................................................ 101
A.5.5 Digital Input/Output.................................................................................. 103
DIOConfigure........................................................................................ 103
DIORead............................................................................................... 104
DIOReadBit .......................................................................................... 104
DIOWrite............................................................................................... 105
DIOWriteBit .......................................................................................... 105
A.5.6 Direct Memory Access (DMA)................................................................. 107
DMAConfigureList ................................................................................ 108
DMAFreeHandle................................................................................... 111
DMAGetHandle .................................................................................... 111
DMAHugeGetHandle............................................................................ 112
DMASetOptions.................................................................................... 112
DMASetPacer....................................................................................... 112
DMAStart .............................................................................................. 113
DMAStatus ........................................................................................... 114
DMAStop .............................................................................................. 114
DMASwap............................................................................................. 115
A.5.7 Initialization.............................................................................................. 116
HWInit................................................................................................... 117
RegisterClient ....................................................................................... 117
SWInit................................................................................................... 117
SWReset .............................................................................................. 118
SlotAssignIO......................................................................................... 118
SlotInquire ............................................................................................ 118
SlotSearchIO ........................................................................................ 119
UnregisterClient.................................................................................... 120
IncludeXXXX ........................................................................................ 120
A.5.8 Rate Generator ....................................................................................... 121
RGConfigure......................................................................................... 121
RGDisable ............................................................................................ 122
RGEnable ............................................................................................. 123
A.5.9 Thermocouple Measurement .................................................................. 124
TCLinearize .......................................................................................... 124
TCMeasure........................................................................................... 125
A.5.10 Utility Functions ..................................................................................... 127
CountsToVolts ...................................................................................... 127
FrequencyToRGCounts........................................................................ 128
VoltsToCounts ...................................................................................... 128
Appendix B: PCI-20428W Hardware Technical Reference
B.1 Introduction............................................................................................................... 129
B.2 PC/XT Bus Interface ............................................................................................... 129
B.2.1 General Description ................................................................................ 129
B.2.2 Detailed Description ................................................................................ 130
Base Address ....................................................................................... 130
DMA Channels ..................................................................................... 130
Interrupts .............................................................................................. 130
Board IDs.............................................................................................. 130
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Table of Contents
Board Reset ..........................................................................................131
B.3 Analog Inputs ...........................................................................................................131
B.3.1 General Description .................................................................................131
B.3.2 Detailed Description.................................................................................131
Channel Selection and Configuration....................................................131
Analog-to-Digital Converter (A/D) Operation.........................................132
Analog Input DMA .................................................................................132
B.4 Analog Outputs ........................................................................................................134
B.4.1 General Description .................................................................................134
B.4.2 Detailed Description.................................................................................134
Digital-to-Analog (DAC) Converter Operation .......................................134
Analog Output DMA ..............................................................................134
B.5 Rate Generators ......................................................................................................135
B.5.1 General Description .................................................................................135
B.5.2 Detailed Description.................................................................................135
B.6 Counter ....................................................................................................................136
B.7 Digital I/O .................................................................................................................137
B.3 Offset Register Descriptions....................................................................................137
Appendix C: Specifications
Appendix D: Analog Input and Output Calibration Procedures
D.1 PCI-20428W-1 and -2 Analog Input Circuit Calibration Procedures .......................145
Figure D.1 Analog Input Adjustment Potentiometer
Location Diagram ...............................................................................146
D.2 PCI-20428W-3 Analog Input Circuit Calibration Procedures...................................149
D.3 PCI-20428W-1 and -2 Analog Output Circuit Calibration Procedure ......................151
Figure D.1 Analog Output Adjustment Potentiometer
Location Diagram ...............................................................................152
Appendix E: Termination Panel and Cable Adapter Products
E.1 Introduction ..............................................................................................................155
E.2 PCI-20429T-1 Termination Panel............................................................................155
Figure E.1 PCI-20429T-1 Termination Panel Installation ....................155
Figure E.2 PCI-20429T-1 Termination Panel Connections..................156
Figure E.3 PCI-20429T-1 Physical Dimensions...................................156
Figure E.4 PCI-20429T-1 Schematic Diagram ....................................157
E.3 PCI-20430A-1 Adpater Board..................................................................................158
Figure E.5 PCI-20430A-1 Adapter Board.............................................158
Figure E.6 PCI-20430A-1 Adapter Board Connectors P2,
P3 and P4 ..........................................................................................158
Figure E.7 PCI-20430A-1 Physical Dimensions...................................159
Figure E.8 PCI-20430A-1 Schematic Diagram ....................................160
E.3.1 Cables......................................................................................................161
E.3.2 3-U Sized Termination Panels .................................................................161
E.3.3 3-U Card Enclosures ...............................................................................161
E.4 Making Your Own Connections ...............................................................................162
Table E.1 Example 50-Pin I/O Connectors .......................................................162
Appendix F: Memory Manager, DMA Device Driver, Initialization Options and Interrupt Notes
F.1 Memory Manager Notes for DOS and Windows 3.x................................................163
F.1.1 386MAX ................................................................................................163
F.1.2 EMM386...................................................................................................163
viii
Table of Contents
F.1.3 QEMM .................................................................................................. 164
F.1.4 EMMExclude Notes................................................................................. 164
F.2 Notes on Performing DMA in Windows................................................................... 165
F.2.1 Windows 3.x and DMA............................................................................ 165
F.2.2 Windows 95 and DMA........................................................................... 165
16-bit DMA Applications ....................................................................... 165
32-bit DMA Applications ....................................................................... 166
F.2.3 Windows NT and DMA......................................................................... 166
F.3 Initialization Options ................................................................................................ 166
F.4 Interrupts and Segment Locking (Windows 3.x only).............................................. 167
Index
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PCI-20428W Series Multifunction Boards
Preface
Intelligent Instrumentation Products
Intelligent Instrumentation products include a wide range of computer instrumentation, boards, software,
termination and signal conditioning. All our products are intended to simplify the interface of your computer to
the real world. Most major bus systems are supported: PC/XT/AT/EISA, PS/2 (Micro Channel), Macintosh II
NuBus and MultiBus. Application areas for these products include data acquisition, test, measurement and control
functions. The range of users includes enterprises involving research, education, industry and commerce.
Each bus family is supported by both unique and "universal" products. "Universal" products include compatible
items which can be shared by the separate bus groups. These include Modules, Termination Panels, Cables,
Enclosures, and Expansion Boxes.
A key feature of Intelligent Instrumentation computer instrumentation products is modularity. The products
include both stand alone Board products, designed for specific applications, and user configurable components
consisting of Carriers, Multifunction Boards and Modules. Carriers and Multifunction Boards provide the
interface between the desired input/output functions and the host computer. In addition, Carriers and
Multifunction Boards provide the physical mounting mechanism, power and internal communications for the
Modules. Multifunction Boards also include on-board input/output functions.
Modules add or expand input/output functionality when physically plugged into a Carrier or Multifunction Board.
I/O Modules communicate with Carriers or Multifunction Boards via the Intelligent Instrumentation Interface (I3)
BusTM (U.S. Patent No. 4,683,550). The I3 Bus allows for standard memory and I/O accesses to the host
computer. In addition, the I3 Bus allows the "chaining" of analog signals between the Modules and a Carrier or a
Multifunction Board. This unique "daisy-chaining" of analog signals allows one Module to process a signal and
then pass it on to another Module or Carrier/Multifunction Board. The Bus provides a path for both
synchronization and trigger signals to pass between the Modules. These signals provide coordination of the
various system components to insure proper system performance.
Available I/O Module functions include analog input, channel expansion, simultaneous sample/hold, hardware
trigger/alarm, digital I/O, analog output, and counter/timer/pulse generator. Combinations can be created to meet
specific application requirements. This approach allows the user to optimize the components of a system for a
specific application. Cost is minimized since only the necessary components need be purchased.
Various Termination Panels and rack-mountable enclosures provide convenient screw-terminal connections for
field wiring, including thermocouples and RTDs. Most panels have board space for user-installed signalconditioning components or modules, while others include these functions. Signal conditioners comprise filters,
signal translators, bridge networks, power switches, and isolators.
Software Libraries provide high-level language support for a variety of system functions. The most useful
hardware-level functions of the individual Modules and Carriers are supported, as well as various system
configurations such as multiple-channel high-speed analog acquisition. Menu Driven general purpose data
acquisition software packages, and high-level language code generation utilities are also available. Although you
can write your own software, the software support packages can save a great deal of time.
Each Intelligent Instrumentation computer instrumentation product comes with complete user documentation. Of
additional interest is the Intelligent Instrumentation Handbook of Personal Computer Instrumentation. The
Handbook is an excellent source of information on computers, signal conditioning, data acquisition and control.
Basic concepts, hardware and software techniques, data conversion principles, and application descriptions are
provided. Included as well are configuration guidelines and data sheets for all Intelligent Instrumentation PCbased and universal products.
ix
PCI-20428W Series Multifunction Boards
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Chapter 1: Introduction
Chapter 1: Introduction
1.1 About this Manual
Congratulations on your purchase of a PCI-20428W Series Low Cost Multifunction Board, a member of a line of
high technology products designed and developed by Intelligent Instrumentation Inc. This manual is a
combination User Guide and Technical Reference for the PCI-20428W-1, PCI-20428W-2 and PCI-20428W-3
Boards and the accompanying Master Link Software Libraries. The Master Link Software Libraries provide easy
to use driver functions which you can incorporate into your own programs to operate a PCI-20428W Series
Board.
Chapter 1 provides an introduction to the hardware and software products you have received. A
functional description of the PCI-20428W Series Boards is presented as well as a general description
of the Master Link Software Libraries.
Chapter 2 will instruct you how to install and configure the PCI-20428W Board in your system. I/O
Connections and jumpers are also identified.
Chapter 3 covers installation of the Master Link Software Libraries.
Chapters 4-9 describe the I/O and control functions of the PCI-20428W and how they can be
programmed using Master Link Software Libraries function calls. Each chapter provides:
A description of the function and relevant concepts and terms
Information on the hardware which performs the function.
Flowchart(s) showing the steps necessary to program that function using the Master Link
Software Libraries.
Appendix A describes the Master Link Software Libraries in detail. A complete description of each
software call is presented.
Appendix B is a detailed hardware technical reference for the PCI-20428W Series Boards, with
information on all programming registers (called offset registers), and board functions.
Appendix C contains specifications of the PCI-20428W Series Boards.
Appendix D provides analog input and output calibration procedures.
Appendix E has information on termination panel and cable adapter products.
Appendix F contains important notes on DMA operations, memory manager usage and software
initialization options.
1.2 The PCI-20428W Series Low Cost Multifunction Boards
The PCI-20428W-1 and -2 Multifunction Boards can be used for Analog Input, Analog Output, Digital
Input/Output (I/O) and Counting applications. Except for Analog Output, the PCI-20428W-3 Board supports
these applications also. Figure 1.1 is a block diagram of the PCI-20428W-1, -2 and -3. A listing of the features
offered by the PCI-20428W Series Multifunction Boards is given below:
Analog Input
•
•
Inputs:
PCI-20428W-1: 16 single-ended or 8 differential analog input channels.
PCI-20428W-2: 16 single-ended or 8 differential analog input channels.
PCI-20428W-3: 16 single-ended analog input channels.
Software programmable gains:
PCI-20428W-1: 1, 10 or 100
PCI-20428W-2: 1, 2, 4 or 8
1
Chapter 1: Introduction
•
•
•
•
•
The PCI-20428W-3 has a fixed analog input gain of 1.
Jumper selectable input ranges: ±5 V, ±10 V, 0 - 5 V and 0 - 10 V.
12-bit A/D resolution with up to 100 kHz throughput.
A DMA controller for transferring analog input data to the PC's memory.
A sequential "0 to N" analog input channel scanner.
A/D conversions can be started by software, an on-board rate generator, or through an external input.
Analog Output (-1 and -2 models only)
•
•
•
Dual voltage output channels. Each output channel has 12-bit resolution and throughput
up to 100 kHz.
Jumper selectable output ranges: ±5 V, ±10 V, or 0 - 10 V.
Analog output data transfer through software control, or under DMA control using an on-board rate
generator.
Rate Generator
•
•
•
•
Programmable rate generator for pacing A/D conversions.
Programmable rate generator for pacing D/A conversions (-1 and -2 models only).
Synchronized A/D and D/A DMA conversions through rate generator jumper option.
A prescaler is provided allowing rates from 0.00186 Hz to 2 MHz (with prescaler), or 120 Hz to
4 MHz (without prescaler).
Counter
•
A 16-bit counter is available for general use on each board. The counter's inputs and output are
provided at the I/O connector. (This counter is not available if the rate generator prescaler is used.)
Digital I/O
•
An 8-channel digital input port and an 8-channel digital output port are provided on each board.
Rear
Connector
PC
Bus
(50 pin)
16 Analog
Inputs
Ext.
in
Input
Channel
Selector
and
Scanner
Aout
**
DAC 0
Aout
**
DAC 1
*
PGA
ADC
Control
ADC
PC Bus Interface,
Analog In DMA,
RG
out
Analog Out DMA,
Rate
Generators
and
Counter
CLK
Gate
Out
and
Interrupt Control
Circuitry
* Gains:
8 chns.
Digital In
PCI-20428W-1 1, 10, or 100
PCI-20428W-2 1, 2, 4 or 8
8 chns.
Digital Out
PCI-20428W-3 1
**Analog Outputs not provided on PCI-20428W-3
Figure 1.1
2
PCI-20428W-1, -2 and -3 Multifunction Boards Block Diagram
Chapter 1: Introduction
1.2.1 Analog Inputs
The PCI-20428W-1 has 16 single-ended or 8 differential input channels and provides analog input gains of 1, 10
or 100. The PCI-20428W-2 has 16 single-ended or 8 differential input channels and provides analog input gains
of 1, 2, 4, or 8. Single-ended or differential input configuration is jumper selectable. The PCI-20428W-3 has 16
single-ended input channels and has a fixed gain of 1.
All PCI-20428W Boards have jumper-selectable input ranges of ±5V, ±10V, 0-5V and 0-10V. The A/D
converter used on all boards is a 12-bit converter with a throughput rate of 100 kHz. All analog input signals are
available on a board's I/O connector at the back of the computer.
A/D conversions can be started with software, an on-board rate generator or the external TTL compatible input (if
not used as a trigger input). The External Input signal is available on a board's I/O connector at the back of the
computer. The results of the A/D conversion can be transferred to the computer under software or DMA control.
Multiple channels can be scanned using the on-board channel scanner when transferring data under DMA.
Channels 0 - N can be scanned sequentially at a single gain, where N is the last channel in the list. The analog
input DMA process is enhanced with a 1Kword FIFO to buffer the data from the A/D converter to the PC’s bus.
1.2.2 Analog Outputs
Two voltage output channels are provided on the PCI-20428W-1 and -2 models. Each output channel can be
jumper-configured for ±5V, 0-10V, or ±10V output ranges. A dual 12-bit D/A (digital-to-analog) converter (or
DAC) is used. The analog output throughput rate is 100 kHz. Both output channels are available on a board's I/O
connector at the back of the computer.
Analog output data can be transferred with software commands or under DMA control using the analog output
rate generator or through the analog input rate generator to synchronize input and output transfers. Transfers to
one or both analog output channels are allowed in a single DMA process. The analog output DMA process is
enhanced with a 1 kword FIFO to buffer data from the bus to the D/A converters.
1.2.3 Rate Generators
All versions of the PCI-20428W have a rate generator for pacing A/D conversions for DMA data acquisitions. In
addition to the A/D rate generator, PCI-20428W-1 and -2 Boards provide a second rate generator for pacing for
pacing D/A conversions. Through a jumper setting (W39), both A/D and D/A conversions can be paced from the
same rate generator for synchonized DMA input and output processes.
Rate generators may be clocked from either the on-board 8 MHz oscillator or a rate generator prescaler. This
gives an output range from either 120 Hz to 4 MHz (8 MHz clock) or 0.00186 Hz to 2 MHz if the rate generator
prescaler is used. The rate generator prescaler option is not supported by the Master Link Software Library
functions. The analog input rate generator's output is available on a board's connector at the back of the computer.
1.2.4 Counter
One 16-bit counter channel is provided by the PCI-20428W boards for general use. This 16-bit counter channel is
available when the rate generator prescaler is disabled. The counter's clock input, gate input, and output signal are
available on a board's I/O connector at the back of the computer. The counter can be programmed in a variety of
modes.
3
Chapter 1: Introduction
1.2.5 Digital I/O
Each PCI-20428W Board provides an 8-channel digital input port and an 8-channel digital output port. All 16
digital I/O signals are TTL-compatible and are available on a board's I/O connector at the back of the computer.
1.3 The Master Link Software Libraries
The Master Link Software Libraries (provided with your purchase) offer an uncomplicated interface between a
number of the most popular programming languages and your PCI-20428W. The Master Link Libraries provide
support for DOS, Microsoft Windows 3.x and Win32 (32-bit) platforms. All supported compilers are listed in
Chapter 3 and Appendix A.
The use of the software libraries greatly simplifies the interface between the programmer and the hardware: long
sequences of bit-oriented, register-specific set up calls are replaced with simple high-level calls. All library
function calls return an integer result, or error code, indicating the success or failure of the action taken.
As an illustration of the simplicity of Master Link, consider the following example:
.
.
AIRead (slot, module, channel, AZchannel, gain, range, input_config, (int
far *) &counts);
CountsToVolts (counts, gain, range, &volts);
.
.
The top program line shows a function (AIRead) call which reads an analog input channel, returning the data
value in "counts" (an integer). The second line calls a simple function that converts the counts value to a voltage
value. Procedures such as these allow you to interface with the hardware in a straightforward and painless way.
The parameter variable names we use in the function calls describe the relevant action or data involved. However,
you may substitute these with any variable names which do not conflict with constant or other names defined by
the software, or with the requirements of your programming language. Appendix A covers complete call
specifications for the functions, and valid function call parameters used to control the PCI-20428W.
1.4 System Requirements
In order to use this product successfully, the following are recommended as a minimum:
1. A PCI-20428W Series Board and accessories as required for your application's configuration. These
accessories may include the PCI-20429T-1 Termination Panel or a PCI-20430A-1 Adapter Board plus cables
and appropriate PCI 3-U Termination Panels (see Appendix E).
2. An IBM PC\XT\AT\386\486\Pentium, ... or compatible personal computer, with one or more available
ISA type expansion slots.
3. The accompanying Master Link Software Libraries and a supported compiler (see Chapter 3 or Appendix
A), or another suitable programming language of your choice if you are going to write your own hardware
interface software (as described in Appendix B).
4
Chapter 2: Configuration and Installation
Chapter 2: Configuration and Installation
2.1 Chapter Overview
This chapter provides information on changing the base address (if needed), selecting jumper configurations,
installing the board in your computer, and where to make signal I/O connections.
2.2 Setting the Board's Base Address
If the PCI-20428W's factory default base address (320 Hex) conflicts with the base address of any other board in
your system, one of the base addresses must be changed prior to installation of the PCI-20428W. This section
discusses how you can change the base address of a PCI-20428W Board.
2.2.1 The PC's I/O Map
All of a PCI-20428W Board's programming and data registers are accessed as I/O locations, and are mapped into
a 16 byte section of the PC's I/O space. You can select the base address of this block (address lines A4-A9) by
setting the switches on the board's 6-position DIP switch. This allows the base address to be set on 16-byte
boundaries between I/O offsets 000 - 3FF Hex. The registers of a board are written to or read from various offset
addresses relative to this base address. Appendix B of this manual contains descriptions of the board's offset
registers. See Figure 2.2 or 2.3 to locate the DIP switch.
If you need to change the base address from its factory setting (320 Hex), we recommend that you use an address
which falls between 100 (Hex) and 3E0 (Hex). Specifically, the Hex addresses listed below are recommended as
possible alternatives (as these are searched by the Master Link Software Libraries for the presence of PCI20428W Boards).
100, 110, 120, 130, 140, 150, 160, 170, 180, 190, 1A0, 1B0, 1C0, 1D0, 1E0, 220, 230, 240, 250, 260, 280, 290,
2A0, 330, 340, 350, and 3E0.
2.2.2 Switch Settings
The DIP switch has switches numbered 1 through 6 as shown in Figure 2.1. Switch 1 corresponds to address bit
4, and switch 6 corresponds to address bit 9. A switch setting of "off" corresponds to a bit value of 1, and a
setting of "on" determines a bit value of 0. The first diagram illustrates the switch setting for a base address of
320 (Hex), the factory setting. The others illustrate addresses 220, 350, and 3E0 (Hex).
Figure 2.1 Example Base Address DIP Switch Settings
5
LEFT
LEFT
LEFT
W5
W6
W18
LEFT
W17
W21
W10
W3
W20
W8
W9
W13
W19
W1
W2
RIGHT
W7
RIGHT
W16
RIGHT
W15
RIGHT
W4
Chapter 2: Configuration and Installation
W22
0
0
0
0
0
0
TOP
W39
BOTTOM
W23
W24
W31
TOP
W35
W34
W26
W33
W27
W25
W36
W37
BOTTOM
NOTE: FACTORY CONFIGURATION SHOWN FOR JUMPER SETTINGS.
Figure 2.2 PCI-20428W-1 and -2 Board Layout Diagram and Jumper Locations
6
Chapter 2: Configuration and Installation
W4 W7 W5 W6
RIGHT
W1
W2
W15
W16
W19 W20W17 W21
LEFT
0
0 0
0
0 0
TOP
BOTTOM
W26W27W33 W34 W35
W36 W37
NOTE: FACTORY CONFIGURATION SHOWN FOR JUMPER SETTINGS.
Figure 2.3 PCI-20428W-3 Board Layout Diagram and Jumper Locations
7
Chapter 2: Configuration and Installation
2.3 Analog Input Configuration
The analog input configuration for the PCI-20428W-1 or -2 is jumper-selectable for either single-ended or
differential inputs. Single-ended and differential jumper options do not apply to the PCI-20428W-3 since this
board operates in single-ended mode only. An input configuration jumper table is given below. The factory
default jumper settings (shown in bold) are for single-ended operation. Input signal connections for single-ended
and differential modes are shown on the connector diagram in Figure 2.4.
Table 2.1 Single-Ended and Differential Configurations (-1 and -2 models)
Jumper
SE
DIFF
W13
W18
W22
W23
W24
W31
IN
IN
OUT
IN
OUT
IN
OUT
OUT
IN
OUT
IN
OUT
The analog input ranges for all PCI-20428W Boards are jumper-selectable. Whenever a new input range is
selected, the analog input circuit must be recalibrated. A calibration procedure is given in Appendix D. The
factory default jumper settings (shown in bold below) are for the ±10 V input range.
Table 2.2 Analog Input Range Configurations
Jumper
±10 V
±5 V
0-10 V
0-5 V
W4
W5
W6
W7
W15
W16
W17
W19
W20
W21
IN
OUT
IN
OUT
OUT
IN
OUT
OUT
IN
OUT
OUT
IN
OUT
IN
OUT
IN
OUT
IN
OUT
OUT
OUT
IN
OUT
IN
IN
OUT
OUT
IN
OUT
OUT
OUT
IN
OUT
IN
OUT
OUT
IN
OUT
OUT
IN
2.4 Analog Output Configuration
Each PCI-20428W-1 and -2 Board provides two voltage output channels. These channels can be independently
jumper-configured for output ranges of ±5V, 0-10V, or ±10V. Whenever a new analog output range is selected,
the analog output circuit must be recalibrated. A calibration procedure is given in Appendix D. On power-up,
both analog output channels will initialize to negative full scale. The actual initial output voltage will depend on
the output range selected. The factory default jumper settings (shown in bold below) are for the ±10 V output
ranges.
Table 2.3 Analog Output Range Configurations
Channel 0
8
±5 V
Channel 1
Jumper
±10 V
W3
W9
LEFT RIGHT RIGHT
RIGHT LEFT
OUT
0-10 V
Jumper
±10 V
±5 V
W8
W10
RIGHT LEFT
RIGHT LEFT
0-10 V
OUT
LEFT
Chapter 2: Configuration and Installation
Table 2.4 Analog Output Rate Generator Selection
Jumper
AO Rate Gen.
AI Rate Gen.
W39
TOP
BOTTOM
Please refer to Figure 2.2 for jumper locations and placement.
2.5 DMA Channel Selection
All versions of the PCI-20428W support analog input DMA transfers on one of two PC/XT bus DMA channels (1
or 3). The PCI-20428W-1 and -2 Boards also provide support for simultaneous input and output DMA transfers
on two PC/XT bus DMA channels (1 and 3). Either DMA channel can be jumper-selected for input or output
DMA processes. For all models, the factory default configuration is for no DMA (all DMA jumpers OUT). You
will need to install the appropriate jumpers if you want to perform DMA transfer of data. DMA is discussed in
greater detail in the chapters on analog input and analog output.
Table 2.5 DMA Channel Selection Jumper Settings (-1 and -2 models)
Analog Input DMA Channel
Jumper
DMA Chan 1
W1
W36
W2
W37
LEFT
BOTTOM
Analog Output DMA Channel
DMA Chan 3
Jumper
DMA Chan 1
RIGHT
TOP
LEFT
BOTTOM
W1
W36
W2
W37
DMA Chan 3
RIGHT
TOP
Table 2.6 DMA Channel Selection Jumper Settings (-3 model)
Jumper
DMA Chan 1
DMA Chan 3
W1
W36
W2
W37
IN
IN
OUT
OUT
OUT
OUT
IN
IN
If a DMA channel is not used, leave jumpers out of the corresponding jumper locations. Please refer to Figures
2.2 and 2.3 for jumper locations and placement.
2.6 Interrupts
PCI-20428W Boards can generate an active-high interrupt signal on one of three PC interrupt lines: IRQ2, IRQ3
or IRQ5. The interrupt sources are A/D end of convert (EOC), analog input rate generator and in the case of a
PCI-20428W-1 or a -2 unit the analog output rate generator. Interrupt sources and levels are both selected with
jumpers. For proper operation, only one interrupt source and one interrupt level should be selected at a time.
During hardware paced A/D conversions (such as during a DMA acquisition) A/D EOC interrupts are not
generated. Operation of the interrupt circuitry is discussed in Appendix B: Hardware Technical Reference. No
interrupt jumpers are installed in the factory configuration.
9
Chapter 2: Configuration and Installation
Table 2.7 Interrupt Source and IRQ Jumpers
Interrupt Source
IRQ Line Select
Jumper
Source (-1 and -2 models)
Source (-3 model)
Jumper
IRQ Line
W25
W26
W27
Analog Out Rate Gen.
A/D EOC
Analog In Rate Gen.
N/A
A/D EOC
Analog In Rate Gen.
W33
W34
W35
IRQ5
IRQ3
IRQ2
Please refer to Figures 2.2 and 2.3 for jumper locations.
2.7 Installing the Board in Your PC
[1]
Turn off the power to your computer, and unplug it.
Warning
Lethal voltages exist inside computers. Always ensure that power is removed before opening the case.
Only qualified technicians should install, modify, and adjust equipment inside any computer unit.
Caution
Failing to turn off the power when inserting or removing boards will damage the boards and possibly the
computer as well.
10
[2]
Remove the case of the computer according to the instructions provided in your computer's Owner's
Guide.
[3]
Be sure to carefully set aside any screws you have removed from the case.
[4]
Select an empty expansion slot.
[5]
Remove the slot cover from the expansion slot, and save the fastening screw that held it in place.
[6]
Before installing the board, double check the board's jumper settings to make sure the configuration is
what you want. Align the board above its expansion slot connector, with the 50-pin I/O connector
toward the rear of the computer, and the card edge fingers on the board aligned with the connector in
the expansion slot.
[7]
Gently push the board down toward the slot connector. Press on the top of the board at each end, and
with a gentle rocking motion, insert the board into the connector. Do not force the board, as this could
break the connector.
[8]
Secure the board's mounting bracket to the computer's chassis using the fastening screw removed from
the expansion slot cover.
[9]
Replace the computer's cover, using the screws previously removed.
[10]
At this time you may want to wire input and or output test signals to the board's 50-pin I/O connector
(see Section 2.8 for information on making connections). When making connections, make sure any
external devices you are connecting to these inputs or outputs are not powered-up.
Chapter 2: Configuration and Installation
Caution
For applications where these boards are being used to generate output signals for control
or other sensitive purposes, the status or level of outputs during power-up may be of critical importance.
During this brief period, while power supply voltages are making the transition from
zero to their steady-state values, the integrated circuits and other devices powered by the supply voltages
are subject to possible transients or indeterminate status. In critical applications of this type, the user is
advised to take special precautions, such as external protective circuitry, to assure safe conditions during
power-up.
[11]
Plug in the computer and turn on the power.
[12]
You should now use the SYSCHECK software (system assurance utility) included with your board to
verify that you have correctly installed the board and that it is fully operational. Follow the instructions
on the card provided with the SYSCHECK diskette to install and run the software.
2.8 Connecting Your Board to the Outside World
The PCI-20428W's 50-pin I/O connector may be interfaced to external devices by direct connection, or through a
PCI-20429T-1 Termination Panel which plugs directly into the I/O connector. The PCI-20430A-1 Adapter Board
and appropriate interconnecting cables allows you to use other Termination Panels. The PCI-20429T-1
Termination Panel and the PCI-20430A-1 Adapter Board, as well as other Intelligent Instrumentation Termination
Panels and cables, are sold separately.
A table showing the I/O connector's pin definitions is given below.
Table 2.8 50-pin I/O Connector Signals
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
Signal
AI0
AI8
AGND
AI9
AI1
AGND
AI2
AI10
AGND
AI11
AI3
AGND
AI4
Pin
14
15
16
17
18
19
20
21
22
23
24
25
26
Signal
AI12
AGND
AI13
AI5
AGND
AI6
AI14
AO0 *
AI15
AI7
AGND
AO1 *
+5V **
Pin
27
28
29
30
31
32
33
34
35
36
37
38
39
Signal
DI0
DI1
DI2
DI3
DI4
DI5
DI6
DI7
DO0
DO1
DO2
DO3
DO4
Pin
40
41
42
43
44
45
46
47
48
49
50
Signal
DO5
DO6
DO7
CLK
GATE
OUT
AIRG
EXTIN
+5V **
DGND
DGND
* Pins 21 and 25 are not used on the PCI-20428W-3 Board
** The maximum current available from +5V power is 0.25A total (fused).
A drawing of the connector, which lists the pin functions for single-ended and differential analog input operation
is shown on the following page. Descriptions of the PCI-20429T-1 Termination Panel and the PCI-20430A-1
Adapter Board, and information for making your own cables can be found in Appendix E.
11
Chapter 2: Configuration and Installation
50-pin I/O Connector (P1)
Differential*
Function
Single-Ended
Function
Single-Ended
Function
Analog In Chan 0
Analog In Chan 0
Analog In Chan 8
Chan 0 Return
Analog Ground
Analog In Chan 9
Chan 1 Return
Differential*
Function
Analog In Chan 1
Analog In Chan 1
Analog Ground
Analog In Chan 2
Analog In Chan 2
Analog In Chan 10
Chan 2 Return
Analog Ground
Analog In Chan 11
Chan 3 Return
Analog In Chan 3
Analog In Chan 3
Analog Ground
Analog In Chan 4
Analog In Chan 4
Analog In Chan 12
Chan 4 Return
Analog Ground
Analog In Chan 13
Chan 5 Return
Analog In Chan 5
Analog In Chan 6
Analog In Chan 7
Analog In Chan 5
Analog Ground
Analog In Chan 6
Analog In Chan 14
Chan 6 Return
Analog Out Chan 0*
Analog In Chan 15
Chan 7 Return
Analog In Chan 7
Analog Out Chan 1*
Analog Ground
+ 5 Volts **
Digital In Chan 0
Digital In Chan 1
Digital In Chan 2
Digital In Chan 3
Digital In Chan 4
Digital In Chan 5
Digital In Chan 6
Digital In Chan 7
Digital Out Chan 0
Digital Out Chan 1
Digital Out Chan 2
Digital Out Chan 3
Digital Out Chan 4
Digital Out Chan 5
Digital Out Chan 6
Digital Out Chan 7
Counter Clock Input
Counter Output
Counter Gate Input
Analog Input Rate Generator Out
External Input
+ 5 Volts **
Digital Ground
Digital Ground
* Differential input operation and analog output channels are provided by the PCI-20428W-1 and -2 only.
** P1-26 and P1-48 are fused at 0.25A total.
Figure 2.4 PCI-20428W I/O Connector Diagram (P1)
12
Chapter 3: Master Link Software Libraries
Chapter 3: Master Link Software Libraries
3.1 Introduction
All the Software Libraries and interface files for communicating with the various compilers supported, as well as a
variety of sample programs are contained on the supplied Master Link disks in compressed form.
Use of the Libraries consists of installing the libraries and interface files for your compiler, and making the
necessary connections between the interface files and your application program.
The remainder of Chapter 3 is divided into the following topics. Section 3.2 lists system configuration
requirements and supported compilers. Section 3.3 points you to the program license agreement. Section 3.4
provides information on installing the PCI-20369S DOS based Software Library files. Section 3.5 lists and briefly
describes the PCI-20369S DOS based Software Libraries. Section 3.6 summarizes how the Libraries are used.
Sections 3.7, 3.8 and 3.9 cover the same topics for the Microsoft Windows 3.x compatible PCI-20369S
Libraries. Sections 3.10, 3.11 and 3.12 cover the same topics for the Win32 PCI-20485S Master Link Libraries.
3.2 System Configuration Requirements
For DOS based applications your personal computer system can be an XT/AT/286/386/486/Pentium/... or
compatible, or an EISA Bus computer, and use IBM-DOS or MS-DOS version 3.1 or higher. If you are
programming Windows 3.x based applications, you will also need Microsoft Windows 3.x (version 3.1 or 3.11
is recommended). For Win32 based applications using the Master Link Software Libraries you need to be running
a 32-bit operating system (such as Windows 95 or Windows NT 4.0 etc). In addition you will need one or
more PCI-20000 Series Carriers, Multifunction Boards, or Single Board products and appropriate I/O Modules
for your application.
If you wish to use extended memory (above 1 Mbyte) with DOS and Windows 3.x applications with the Master
Link Software Libraries, you will also need HIMEM.SYS, QEMM, 386MAX, 386EMM or a similar
extended memory driver. See Appendix F for details on properly configuring your memory manager.
3.2.1 DOS Environment - Programming Language Support
To write programs using the Master Link DOS based Software Libraries, you will need one of the supported
language compilers listed below:
•
•
•
•
•
Borland C++, 4.5 or higher
Microsoft C++, 7.0 or higher
Borland Turbo Pascal, 6.0
Borland Pascal, 7.0
Microsoft QuickBASIC, 4.5
Using the Software Libraries with your chosen compiler is discussed in section 3.6 and the README.TXT file.
3.2.2 Microsoft Windows 3.x Environment - Programming Language Support
To write programs using the Master Link Microsoft Windows 3.x based Software Libraries, you will need one
of the supported language compilers listed below:
•
•
•
•
•
Borland C++, 4.5 or higher
Microsoft C++, 7.0 or higher
Microsoft Visual Basic, 4.0 or higher
Borland Pascal, 7.0
Borland Turbo Pascal for Windows, 1.5
13
Chapter 3: Master Link Software Libraries
Using the Software Libraries with your chosen compiler is discussed in section 3.9 and the READMEW.TXT file.
3.2.3 Win32 Environment - Programming Language Support
To write programs using the Master Link Win32 based Software Libraries, you will need one of the supported
language compilers listed below:
•
•
•
Borland C++, 4.5 or higher
Microsoft Visual C++, 4.0 or higher
Microsoft Visual Basic, 4.0 or higher
Using the Software Libraries with your chosen compiler is discussed in section 3.12 and the README32.TXT
file.
3.3 The Software License Agreement
Read the PROGRAM LICENSE AGREEMENT, printed on the envelope containing the PCI-20369S Master Link
Software Libraries diskettes, and make sure you fully understand it. If you have any questions, contact your sales
representative before continuing.
3.4 Installing the DOS Based Libraries
First, make back-up copies of the distribution diskettes - and store the originals in a safe place. Never use the
original masters for everyday purposes.
The DOS based Software Libraries are compressed onto the PCI-20369S DOS support diskettes. To install the
software onto a hard disk, or other drive, you need to run the SETUP.EXE program. Note: If you are running
Windows of any type you must first exit Windows to DOS before installing the DOS support Libraries. To run
SETUP, follow these steps:
[1]
Place the first PCI-20369S Master Link Software Libraries DOS version diskette in an available 3.25”
floppy drive on your system.
[2]
If you placed the diskette in drive A: (for example), run SETUP, from the DOS prompt by typing:
A:\SETUP<ENTER>
Note, if your current drive is the drive holding the installation disk, you can start the SETUP program,
just by typing:
SETUP<ENTER>
After you have pressed <ENTER>, the SETUP program will open with a welcome message, press a
key to start the installation process. (You may exit the SETUP program by pressing the CTRL and X
keys at the same time.)
[3]
14
The SETUP program will first ask you what supported language versions of the Libraries you want to
install. Use the <Space Bar> and arrow keys to select the language(s) support you wish to install
(C/C++, BASIC, Pascal), then press <ENTER>.
Chapter 3: Master Link Software Libraries
[4]
Next, SETUP asks onto which of your available drives would you like the Library files to be
transferred. Press the letter of the drive or use the arrow keys to select the drive. After you select a
drive, and press <ENTER>, you will have the option to specify a "Base Directory" under which various
subdirectories will be created, and filled with appropriate files (depending on the language support you
have chosen). Unless you specify otherwise, the default "Base Directory" is located on the selected
drive and given the name PCIMASTR. After deciding on a directory, press <ENTER> to start the
extraction and transfer process. Note: Installation of all supported language files requires about 4.7
Mbytes of disk space.
[5]
When all files have been transferred, you will be asked if you want to examine the README
document. Please read this file by responding "Y". The README file contains important information
on the version of Master Link software you have just installed.
When you examine the contents of the extracted Master Link DOS based Software Libraries, you will find that
compiler specific files are located in separate subdirectories. These and all other files are described in Section 3.5
below.
3.5 DOS Based Library Files
Support for all specified compilers, along with sample programs in each language are supplied with the software
package. This section lists and briefly describes the files provided with the software package. Use of the Library
functions is discussed in the following chapters.
First, in the "Base Directory" (i.e. \PCIMASTR) there are at least two text files; README.TXT and
ERRORS.TXT. Additional text files, if present, contain information that is too recent to appear in this manual.
Any of these files may be read by typing TYPE filename at the DOS prompt, or through any ASCII text editing
program.
The README.TXT file contains important information for using the Master Link Software Libraries with all
supported DOS compilers. Always be sure be examine the README file for the latest information before
compiling and linking any program.
The ERRORS.TXT file contains a listing, in numerical order, of all reported error and warning codes. Names
and descriptions of each error or warning code are also provided. This file is useful as a quick disk-based
reference source for error information, or you may want to incorporate portions of this text data into your
programs for more descriptive error reporting.
Whenever you install any DOS based support library, the Base Directory is created, and loaded with the following
files:
Base Directory
README.TXT
ERRORS.TXT
TYPEJ.TC
TYPEK.TC
TYPET.TC
TYPEJ5B.TC
TYPEK5B.TC
TYPET5B.TC
See above for a description of this file.
See above for a description of this file.
Type J thermocouple conversion table used by thermocouple support functions.
Type K thermocouple conversion table used by thermocouple support functions.
Type T thermocouple conversion table used by thermocouple support functions.
Type J thermocouple conversion table for non-linearized 5B thermocouple block support.
Type K thermocouple conversion table for non-linearized 5B thermocouple block support.
Type T thermocouple conversion table for non-linearized 5B thermocouple block support.
The following sections briefly describe the files provided in the Base Subdirectories created when Master Link
DOS based support for each language is installed.
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Chapter 3: Master Link Software Libraries
3.5.1 C Language Software Library Files
When the DOS Master Link Software Libraries for C are installed, the following file structure is created:
C\INCLUDE
PCI.H
Contains the software function declarations. All program source files that use the constants,
type definitions, and functions must include this header file if you are using C. Note: PCI.H
includes PCICONS.H and PCTYPE.H.
PCICONS.H
PCIDATA.H
Contains the software library constants definitions.
Software initialization functions and local data block size header file. Master Link uses its own
local data block in the common data segment of the application program. Although you will
probably never need to alter this data block size, the size of the data block can be modified if
required (see error 300 in the ERRORS.TXT file). The associated source code file,
PCIDATA.C, for the local data block size and initialization functions is located in the
C\SAMPLE subdirectory.
C/C++ compiler support file.
C/C++ compiler support file.
C/C++ memory allocation support file.
Contains the software library variable type definitions.
PCIDECL.H
PCIDEF.H
PCIMEM.H
PCITYPE.H
C\LIB
PCI_BC.LIB
PCI_MC.LIB
Library file for Borland C++.
Library file for Microsoft C++.
C\SAMPLE
?????_C.C
?????.C
PCIDATA.C
?????.H
Sample program main source code filenames end with _C.C.
Utility function source code filenames have no underscore character.
Software Initialization Support source code file. PCIDATA.C must be compiled and linked with
the application program.
Utility function header files.
3.5.2 Turbo Pascal Language Software Library Files
When the DOS Master Link Software Libraries for Turbo Pascal are installed, the following file structure is
created:
PASCAL\INCLUDE
PCI.P
PCICONS.P
PCIDATA.P
PCITYPE.P
16
Contains software library function declarations. This file is for reference only; it does not need
to be textually included in any source file. Note, PCI.P includes PCICONS.P and PCITYPE.P.
Contains software library constants definitions. This file is for reference only; it does not need
to be textually included in any source file.
Internal software initialization function and local data block size header file. Master Link uses
its own local data block in the common data segment of the application program. Although
you will probably never need to alter the local data block size, the size of the data block can
be modified if required (see error 300 in the ERRORS.TXT file). The associated source code
file, PCIDATA.PAS, for the local data block size and initialization functions is located in the
PASCAL\SAMPLE subdirectory.
Contains the software library variable type definitions. This file is for reference only; it does
not need to be textually included in any source file.
Chapter 3: Master Link Software Libraries
Note: In Turbo Pascal, the "uses" statement is used to include function support. All *.P files (except PCIDATA.P)
are provided in this directory for your reference only. They do not need to be included in any program source
files.
PASCAL\SAMPLE
?????_P.PAS
?????.PAS
PCIDATA.PAS
?????.P
Sample program main source code filenames end with _P.PAS
Utility function source code filenames have no underscore character.
Software Initialization Support source code file. PCIDATA.PAS must be compiled with the
application program as well as listed in its “uses” statement..
Utility function interface files.
PASCAL\TPU
I???????.TPU
PCI.TPU
Turbo Pascal Unit files. Note: These files do not need to be listed in the "uses" statement of
the program - they are internally used by PCI.TPU.
Main Turbo Pascal Unit file. Add the data unit name (PCIDATA) and main library unit name
(PCI) to the "uses" statement in the main program module. Add PCI to the "uses" statement
of any other module that uses the library functions, constants, or type definitions. See Section
3.6.1 for a listing of library unit files (.TPU).
PASCAL\TPU70
I???????.TPU
PCI.TPU
Borland Pascal 7.0 Unit files. Note: These files do not need to be listed in the "uses"
statement of the program - they are internally used by PCI.TPU.
Main Borland Pascal 7.0 Unit file. Add the data unit name (PCIDATA) and main library unit
name (PCI) to the "uses" statement in the main program module. Add PCI to the "uses"
statement of any other module that uses the library functions, constants, or type definitions.
See Section 3.6.1 for a listing of library unit files (.TPU).
3.5.3 Microsoft QuickBASIC Language Software Library Files
When the DOS Master Link Software Libraries for QuickBASIC are installed, the following file structure is
created:
BASIC\INCLUDE
PCI.B
PCICONS.B
PCIDATA.B
PCIMEM.B
PCITYPE.B
Contains function declarations for each function call supported by the Software Library. All
QuickBASIC program source files that use the functions must include this header file.
Defines the various I/O type codes, gain, range and other constants used by various Software
Library function calls. All QuickBASIC program source files that use the constants and
functions must include this header file.
Internal software initialization function and local data block size header file. Master Link uses
its own local data block in the common data segment of the application program. Although
you will probably never need to alter the local data block size, the size of the data block can
be modified if required (see error 300 in the ERRORS.TXT file). The associated source code
file, PCIDATA.BAS, for the local data block size and initialization functions is located in the
BASIC\SAMPLE subdirectory.
Memory allocation support file.
Contains the software library variable type definitions. All QuickBASIC program source files
that use the type definitions and functions must include this header file.
17
Chapter 3: Master Link Software Libraries
BASIC\LIB
PCI_QB.LIB
I?????.LIB
Library file for Microsoft QuickBASIC. This library contains all hardware and other function
support.
Individual hardware and other function support libraries. These libraries can be used to build
a custom library with only the functions required by your application.
BASIC\SAMPLE
?????_B.BAS
?????.BAS
PCIDATA.BAS
?????.B
Sample program main source code filenames end with _B.BAS.
Utility function source code filenames have no underscore character.
Software Initialization Support source code file. PCIDATA.BAS must be compiled and linked
with the application program.
Utility function header or declaration files.
3.6 Using the DOS Based Software Interface Library
Each set of interface files; those for C, Turbo Pascal, and QuickBASIC, contains all of the necessary files for the
supported compiler(s) for that language. The interface files provide type and constant definitions and function
declarations (or interfaces), which allow you to make high-level language calls to the libraries, using your
programming language.
3.6.1 Interface Files and Your Program
The libraries can be linked with Microsoft C programs compiled for the medium, large, or huge memory model or
Borland C programs compiled for all memory models except tiny. Additionally, the libraries can be linked with
QuickBASIC and Turbo Pascal programs.
C and QuickBASIC
For use with C or QuickBASIC, simply link your application program with the compiled code from the Software
Initialization Support file (PCIDATA.C or PCIDATA.BAS) and the main library file (PCI_MC.LIB for
Microsoft, PCI_BC.LIB for Borland, PCI_QB.LIB for QuickBASIC). The appropriate header file (PCI.H or
PCI.B) must be included textually in your application source code.
Turbo Pascal
For use with Turbo Pascal, add the data unit name (PCIDATA - supplied as a source file) and main library unit
name (PCI). For example, the sample program AI_P.PAS (Analog Input) contains the following items in its
"uses" statement:
.
.
program AI_P;
{$N+,E+}
uses CRT, PCI, PCIdata, Config, Name, Err, Find;
.
.
18
Chapter 3: Master Link Software Libraries
CRT is a unit supplied with Turbo Pascal. The units; Config, Name, Err and Find are utility functions supplied
with the Master Link sample programs. PCI and PCIdata are the Master Link main and data units.
The following is a list of all supplied Turbo Pascal library units (.TPU files) and when they should be used.
Main and Data Units
All programs must include these two unit names in the "uses" statement.
PCI
PCIDATA
Main unit. It must be included in all source files that use the software library functions.
Software Initialization Support unit. This unit is supplied as a source file, it must be compiled
with the application source file(s). This file should only be included ("used") by the main
source file.
PCI-20000 Series I/O Module Support Units
These TPU files (units) are used internally by PCI.TPU - you need not reference the unit name(s) in the program's
"uses" statement to obtain function support for the particular I/O Module(s).
I17M
I19M
I20M
I21M
I23M
I2M
I31M
I341M
I363M
I364M
I368M
I3M
I4M
I5M
I6M
I7M
PCI-20017M Simultaneous Sample/Hold Module support unit (this I/O Module is no longer
available and has been replaced by the PCI-20363M SSH Module).
PCI-20019M High-Speed Analog Input Module support unit.
PCI-20020M Trigger/Alarm Module support unit.
PCI-20021M 8-Channel Analog Output Module support unit.
PCI-20023M High-Speed Analog Input Module support unit.
PCI-20002M Analog Input Module support unit.
PCI-20031M Analog Input Expander/Sequencer Module support unit.
PCI-20341M High-Resolution Analog Input Module support unit.
PCI-20363M 8-Channel Simultaneous Sample/Hold Module support unit.
PCI-20364M High-Accuracy Analog Input Module support unit.
PCI-20368M High-Speed Analog Input Expansion Module support unit.
PCI-20003M Analog Output Module support unit.
PCI-20004M 32 Channel Digital I/O Module support unit.
PCI-20005M Analog Input Expansion Module support unit (this I/O Module is no longer
available and has been replaced by the PCI-20031M and PCI-20368M Expansion Modules).
PCI-20006M 16-bit Analog Output Module support unit.
PCI-20007M Counter/Timer/Rate Generator with Quadrature Decoder support unit.
PCI-20000 Series Single Board Product Support Units
These TPU files (units) are used internally by PCI.TPU - you need not reference the unit name(s) in the program's
"uses" statement to obtain function support for the particular PCI I/O Module(s).
I87W
I89W
I91W
I93W
I377W
I378W
I428W
PCI-20087W
PCI-20089W
PCI-20091W
PCI-20093W
PCI-20377W
PCI-20378W
PCI-20428W
Digital Input/Output Board support unit.
Analog Input Board support unit.
High-Speed Analog Input Board support unit.
Analog Output Board support unit.
Low Power Multifunction Board support unit.
Series High-Density Digital I/O Boards support unit.
Series Multifunction Boards support unit.
PCI-20000 Series Boards Supporting PCI I/O Plug-In Function Modules.
These TPU files (units) are used internally by PCI.TPU - you need not reference the unit name(s) in the program's
"uses" statement to obtain function support for the particular PCI I/O Module(s).
I1C
I41C
I98C
I501C
PCI-20001C General-Purpose Carrier support unit.
PCI-20041C Series High-Performance Carriers support unit.
PCI-20098C Series Multifunction Boards support unit.
PCI-20501C Series High-Performance EISA Boards support unit.
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Chapter 3: Master Link Software Libraries
Special Functions Software Support
These TPU files (units) are used internally by PCI.TPU - you need not reference the unit name(s) in the program's
"uses" statement to obtain special function support.
IBUF
IDMA
ITC
Data buffer support unit.
Direct Memory Access (DMA) function support unit.
Thermocouple function call support unit.
Other Pascal Units
All other Pascal units not already mentioned are found in the PASCAL\TPU subdirectory. These units are used by
the function calls themselves, be sure to include these files in your unit directory.
Utility Functions
Every program using the utility functions supplied with the software must have the corresponding unit name(s) in
the program's "uses" statement. These functions are not supplied as library (.TPU) units, however, the source
code and headers are provided. You will find the following unit names mentioned throughout in sample program
"uses" statements.
CONFIG
ERR
FIND
HEX
NAME
Print hardware configuration utility.
General purpose error handing utility.
Hardware search utility.
Hexadecimal number format utility.
Report Intelligent Instrumentation hardware component name utility.
3.6.2 Summary of Steps for Using the DOS Based Interface Files
In summary, using the interface files consists of three basic steps:
[1]
First you must copy the appropriate interface files for your compiler into the location where your
compiler will look for these files. This may vary somewhat from compiler to compiler. Consult your
compiler documentation for specifics.
[2]
In the declaration section of your C or QuickBASIC applications program, you must add the
appropriate header file to your application.
If you are using Turbo Pascal, add the PCIdata unit name and PCI main library unit name to the "uses"
statement in the program module (see 3.6.1 under "Turbo Pascal").
[3]
For C or QuickBASIC, compile your application program and the PCIDATA file, then link your
application program with the interface library.
For Turbo Pascal, compile your application source files and the PCIDATA file.
Specific information on the various language compilers, including environment notes and command line
instructions are provided in the README file.
20
Chapter 3: Master Link Software Libraries
3.7 Installing the Microsoft Windows 3.x Based Software Libraries
First, make back-up copies of the distribution diskettes - and store the originals in a safe place. Never use the
original masters for every day purposes.
The Windows 3.x based Software Libraries are compressed onto the Master Link Microsoft Windows 3.x
support diskette. To install the software onto a hard disk, or other drive, you need to run the SETUP.EXE
program. To do this, follow these steps:
[1]
Place the Master Link Software Libraries for Microsoft Windows 3.x diskette in an available floppy
drive on your system.
[2]
If you placed the diskette in drive A: (for example), run SETUP, by typing the following in the
Program Manager File/Run command box:
A:\SETUP
Click on the “OK” push-button to start the SETUP program. (You may exit the SETUP program by
pressing the ESC Key.) The SETUP program will open with a welcome message, click on “OK” to
start the installation process.
[3]
As shown below, the SETUP program will first ask you what supported language versions of the
Libraries you want to install. To select the language(s) support you wish to install (C/C++, Visual
Basic, Pascal), click on the item(s). Click on “OK” when you are done selecting.
[4]
Next, SETUP asks onto which of your available drives you wish the Library files to be installed. To
select a drive, click on the desired drive item, then click on “OK”.
21
Chapter 3: Master Link Software Libraries
[5]
Next, you will have the option to specify a "Base Directory" under which various subdirectories will be
created, and filled with appropriate files (depending on the language support you have chosen). Unless
you specify otherwise, the default "Base Directory" is located on the selected drive and given the name
PCIMASTR. After deciding on a directory, click on "OK" or press <ENTER> to start the extraction
and transfer process. A status box will appear to inform you of the installation activity. Note:
Installation of all supported language files requires about 2 Mbytes of disk space.
When all files have been transferred, you will be asked if you want to examine the README document. Please
read this file by clicking on "OK" or pressing <ENTER>, as it contains important information on the version of
Master Link you have just installed.
When you examine the contents of the extracted Software Libraries, you will find that compiler specific files are
located in separate subdirectories. These and all other files are described in Section 3.8.
22
Chapter 3: Master Link Software Libraries
3.8 The Microsoft Windows 3.x Based Software Interface Files
Support for all compilers, along with sample programs in each language are supplied with the software package.
This section lists and briefly describes these files. Use of the Software Libraries functions in application programs
is discussed in the following chapters.
First, in the "Base Directory" directory (i.e. \PCIMASTR) there are at least two text files; READMEW.TXT and
ERRORS.TXT. Additional text files, if present, contain information that is too recent to appear in this manual.
Any of these files may be read through any ASCII text editing program.
The READMEW.TXT file contains important information for using the Windows 3.x Master Link Software
Libraries with all supported compilers. Always be sure be examine the READMEW.TXT file for the latest
information before compiling and linking any program.
The ERRORS.TXT file contains a listing, in numerical order, of all reported error and warning codes. Names
and descriptions of each error or warning code are also provided. This file is useful as a quick disk-based
reference source for error information, or you may want to incorporate portions of this text data into your
programs for more descriptive error reporting.
Whenever you install any Microsoft Windows 3.x based language support library set, the Base Directory is
created, and loaded with the following files:
Base Directory
READMEW.TXT
ERRORS.TXT
PCIVDMAD.386
See above for a description of this file.
See above for a description of this file.
Virtual DMA Driver for DMA operations with the Libraries in Windows 3.x. See Appendix F for
more information.
PCI_WIN.DLL
Master Link Windows 16-bit Based Dynamic Link Library (DLL).
TYPEJ.TC
Type J thermocouple conversion table used by thermocouple support functions.
TYPEK.TC
Type K thermocouple conversion table used by thermocouple support functions.
TYPET.TC
Type T thermocouple conversion table used by thermocouple support functions.
TYPEJ5B.TC
Type J thermocouple conversion table for non-linearized 5B thermocouple block support.
TYPEK5B.TC
Type K thermocouple conversion table for non-linearized 5B thermocouple block support.
TYPET5B.TC
Type T thermocouple conversion table for non-linearized 5B thermocouple block support.
MASTRLNK.VXD Hardware Driver support for operations with the Libraries under Windows 95. See Appendix F
for more information. This and the VDMAD.VXD file, instead of PCIVDMAD.386, are required
for DMA operations if you installed the Libraries on a Windows 95 machine.
VDMAD.VXD
Virtual DMA Driver support for DMA operations with the Libraries under Windows 95. See
Appendix F for more information.
The following sections briefly describe the files provided for each language supported by the software package.
3.8.1 Microsoft Visual Basic Language Files
VB\INCLUDE
PCICONSW.B
PCIDATAW.B
Defines constants used by various Software function calls. All Visual Basic application
programs must merge this file into the main global module.
Internal software initialization function and local data block size header file. Master Link uses
its own local data block in the common data segment of the application program. Although
you will probably never need to alter the local data block size, the size of the data block can
be modified if required (see error 300 in the ERRORS.TXT file). All Visual Basic application
programs must merge this file into the main global module. The associated source code file,
PCIDATAW.BAS, for the local data block size and initialization functions is located in the
VB\SAMPLE subdirectory.
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Chapter 3: Master Link Software Libraries
PCITYPEW.B
PCIW.B
Visual Basic Software Library type definitions. All Visual Basic application programs must
merge this file into the main global module.
Contains function declarations for each function call supported by the Software Library. All
Visual Basic application programs must merge this file into the main global module.
VB\SAMPLE
?????G.BAS
?????W.BAS
PCIDATAW.BAS
Sample program global modules.
Sample program utility modules.
Visual Basic Software Initialization Support source code file. PCIDATAW.BAS must be linked
in the application make file.
?????_BW.FRM Sample program forms.
?????_BW.MAK Sample program make files.
3.8.2 C Language Software Files
CW\INCLUDE
PCICONSW.H
PCIDATAW.H
PCIDECLW.H
PCIDEFW.H
PCITYPEW.H
PCIW.H
Contains the software library constants definitions.
Software initialization functions and local data block size header file. Master Link uses its own
local data block in the common data segment of the application program. Although you will
probably never need to alter this data block size, the size of the data block can be modified if
required (see error 300 in the ERRORS.TXT file). The associated source code file,
PCIDATAW.C, for initialization functions is located in the CW\SAMPLE subdirectory.
C/C++ compiler support file.
C/C++ compiler support file.
Contains the software library variable type definitions.
Contains the software function declarations. All program source files that use the constants,
type definitions, and functions must include this header file. Note, PCIW.H includes
PCICONSW.H and PCITYPEW.H.
CW\LIB
IPCI_WIN.LIB
Import library file. This library file must be linked with the application program.
CW\SAMPLE
?????_CW.C
?????W.C
PCIDATAW.C
?????_CW.DEF
?????_CW.H
?????W.H
?????.ICO
?????_CW.RC
24
C Sample program main source code files.
C Sample utility function source code files.
Software Initialization Support source code file. PCIDATAW.C must be compiled and linked
with the application program.
C Sample program module definition files.
C Sample program header files. Contains control IDs for the resource and main program files.
C Sample utility function header files.
C Sample program icon files.
C Sample resource files.
Chapter 3: Master Link Software Libraries
3.8.3 Pascal Language Software Files
PASCALW\INCLUDE
PCICONSW.P
PCIDATA.P
PCITYPEW.P
PCIW.P
Contains software library constants definitions. This file is for reference only; it does not need
to be textually included in any source file.
Internal software initialization function and local data block size header file. Master Link uses
its own local data block in the common data segment of the application program. Although
you will probably never need to alter the local data block size, the size of the data block can
be modified if required (see error 300 in the ERRORS.TXT file). The associated source code
file, PCIDATAW.PAS, for the local data block size and initialization functions is located in the
PASCALW\SAMPLE subdirectory.
Contains the software library variable type definitions. This file is for reference only; it does
not need to be textually included in any source file.
Contains software function declarations. This file is for reference only; it does not need to be
textually included in any source file. Note, PCIW.P includes PCICONSW.P and
PCITYPEW.P.
Note: In Turbo Pascal, the "uses" statement is used to include function support. All *.P files (except PCIDATA.P)
are provided in this directory for your reference only. They do not need to be included in any program source
files.
PASCALW\SAMPLE
????_PW.H
?????.ICO
???????.P
?????_PW.PAS
????W.PAS
PCIDATAW.PAS
?????_PW.RC
?????_PW.RES
These files contain the control IDs for the resource files.
Pascal Sample program icon files.
Pascal Sample utility function header files.
Pascal Sample program main source code files.
Pascal Sample utility function source code files.
Software Initialization Support source code file. PCIDATAW.PAS must be compiled with the
application program as well as listed in its “uses” statement..
Pascal Sample program resource files.
Pascal Sample compiled resource files.
PASCALW\TPU
PCIW.TPU
Pascal Run Time Library unit file. Every main source code file (????_PW.PAS) must use
PCIW. Every utility function source code file that uses the library functions, constants or type
definitions must use PCIW.
PASCALW\TPU70
PCIW.TPW
Pascal 7.0 Run Time Library unit file. Every main source code file (????_PW.PAS) must use
PCIW. Every utility function source code file that uses the library functions, constants or type
definitions must use PCIW.
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Chapter 3: Master Link Software Libraries
3.9 Using the Microsoft Windows 3.x Based Software Interface Files
Along with the Dynamic Link Library (PCI_WIN.DLL) and other files in the "Base Directory", each set of files;
those for C, Turbo Pascal, and Visual Basic, contains all of the necessary files for the supported compiler(s) for
that language.
The interface files provide type and constant definitions and function declarations which allow you to make highlevel language calls to the libraries, using your programming language.
3.9.1 The Master Link Dynamic Link Library
The Dynamic Link Library (PCI_WIN.DLL) must be made available to Microsoft Windows and your application
program, by installing it in the working directory of your application program, or by specifying its location in the
"PATH" environment variable, or in the WINDOWS directory.
The DLL is not "compiled" with the application, rather it is accessed by the application program during execution.
In general, this interface is achieved in one of several ways depending on the programming language:
For C applications, the C Import Library file IPCI_WIN.LIB must be linked with the application
program.
For Pascal applications, the Pascal Run Time Library unit file, PCIW.TPU, must be included in the
"uses" statement of the application program.
For Visual Basic, linkage to the PCI_WIN.DLL is achieved through the PCIW.B function declarations
“Lib” statement. All Visual Basic application programs must merge this file into the main global
module.
3.9.2 Other Interface Files and Your Program
Master Link uses its own local data block in the common data segment of the application program. The default
size of the local data block is 4 kbytes. The source code for this module is provided (in the language specific
SAMPLE subdirectories) so that the size of the data block can be modified, if needed (see error 300 in the
ERRORS.TXT file). The source file names are PCIDATAW.C for C, PCIDATAW.PAS for Turbo Pascal, and
PCIDATAW.BAS for Visual Basic. This module must be compiled and linked with the application program.
Compiler specific environment notes, command lines (when applicable) and programming notes are provided in
the READMEW file.
3.9.3 Programming Language Notes
Visual Basic
There are three important steps to creating and running programs in the Visual Basic environment when using the
Master Link Software Libraries for Windows 3.x:
First, you must install the dynamic link library, PCI_WIN.DLL, either in the PATH or in the directory
which will be current when your Visual Basic program runs, or in the WINDOWS directory.
The second step is merging the global PCI constants into the global module of your Visual Basic
program. Note, this step has already been performed for the sample programs.
26
Chapter 3: Master Link Software Libraries
The third step is ensuring that the software is initialized before any I/O calls are attempted. The sample
programs assure that this is the case by calling a separate subroutine called InitRoutine.
Additional details on the above procedures are provided in the READMEW file.
C
The C Import Library, IPCI_WIN.LIB, must be linked with Microsoft C++ and Borland C++ for Windows
programs compiled for the small, compact, medium, or large memory models.
Creating C executable programs entails:
Adding the CW\INCLUDE directory to the Include Search Path of your compiler.
Making a project file with the following items:
All application source files (*.C files)
The PCIDATAW.C source code file
The IPCI_WIN.LIB import library
Your application's definition file (.DEF file).
Your application's resource definition file (.RC file).
Compiling and linking the files.
Additional details on the above procedures are provided in the READMEW file.
Turbo Pascal for Windows
The basic steps for creating Pascal executables are:
Add the PASCALW\INCLUDE directory to the Include directories of your compiler.
Add the Pascal unit (PASCALW\TPU or PASCALW\TPU70) and PASCALW\SAMPLE directories to
the Unit and Include directories of your compiler.
Compile the application source files.
Additional details on the above procedures are provided in the READMEW file.
27
Chapter 3: Master Link Software Libraries
3.10 Installing the Win32 Based Software Libraries
First, make back-up copies of the distribution diskettes - and store the originals in a safe place. Never use the
original masters for every day purposes.
The Win32 based Software Libraries are compressed onto the Master Link Win32 support diskette. To install the
software onto a hard disk, you need to run the SETUP.EXE program. To do this, follow these steps:
[1]
Place the Master Link for Win32 diskette in an available floppy drive on your system.
[2]
If you placed the diskette in drive A: (for example), run SETUP, by typing the following after clicking
on the “Start” button and selecting Run…
A:\SETUP.EXE
Click on the “OK” push-button to start the SETUP program. (You may exit the SETUP program by
clicking the “Cancel” button or pressing the <ESC> Key.) The SETUP program will open with a
welcome message, recommending that you exit all Windows programs before running setup. If you
have other programs running, click “Cancel” to quit SETUP and close any other programs. When you
are ready, click on “Next” to continue.
28
[3]
After selecting “Next”, you will be asked if you want to examine the README32 document now.
Please read this file as it contains important information on the version of Master Link software you are
about to install. When you are ready, click “Next” to continue.
[4]
Next, enter your name and organization name in the entry boxes provided. When you are done typing
this information, click “Next” to continue.
[5]
As shown below, the SETUP program will ask you what type of setup you prefer. Select “Typical”.
The other options are for replacing damaged files or for installing a particular configuration. You will
also be able select the destination directory for your installation files or accept the default destination
directory “Master Link 3.0”. When you are ready, click “Next” to continue.
Chapter 3: Master Link Software Libraries
[6]
Now select the program folder for the Master Link drivers. Select “Next” to accept the default “Master
Link” folder. To select an existing folder click on the folder’s name in the “Exiting Folders” selection
box. When you are ready, click “Next” to continue.
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Chapter 3: Master Link Software Libraries
[7]
The next installation option allows to select the driver support you want installed. If you will be using
Windows 95 and creating applications that require DMA data transfer to and from data acquisition
hardware and memory, click on “Select All”. Note: For Windows NT systems the “Virtual DMA
Device Driver” is not required for DMA applications and does not need to be installed.
If you will not require DMA, you may only select the “Master Link Device Driver”- installation of this
driver is required in order to access hardware. If you later require DMA under Windows 95 and did
not install the “Virtual DMA Device Driver” option, you will need to run SETUP again and install the
option. (Note: Appendix F of this manual has additional information on the DMA driver.) When you
are ready, click “Next” to continue.
30
[8]
Before file installation is started, you will be given a chance to review the current settings. Use the
“Back” then “Next” buttons to locate the appropriate entry dialog if you need to change any settings.
Click the “Next” button in this dialog to begin installation. A status box will appear to inform you of
the installation activity. Note: Installation of all supported language files requires about 1.2 Mbytes of
disk space.
[9]
When installation is complete, you must restart your computer before using Master Link. Select the an
option (restart or restart computer later) and click the “Finish” button. This completes installation of
the Master Link 3.0 for Win32 Software Libraries.
Chapter 3: Master Link Software Libraries
When you examine the contents of the extracted Software Libraries, you will find that compiler specific files are
located in separate subdirectories. These and all other files are described in Section 3.11.
3.11 The Win32 Based Software Interface Files
Support for all compilers, along with sample programs in each language, is supplied with the Master Link for
Win32 Software Libraries. This section lists and briefly describes these files. Use of the Software Libraries
functions in application programs is discussed in the following chapters.
First, in the "Base Directory" directory (i.e. \Master Link 3.0) there are at least two text files; README32.TXT
and ERRORS.TXT. Additional text files, if present, contain information that is too recent to appear in this
manual. Any of these files may be read through any ASCII text editing program.
The README32.TXT file contains important information for using the Master Link Win32 Based Software
Libraries. Always be sure be examine the README32.TXT file for the latest information before compiling and
linking any program.
The ERRORS.TXT file contains a listing, in numerical order, of all reported error and warning codes. Names
and descriptions of each error or warning code are also provided. This file is useful as a quick disk-based
reference source for error information, or you may want to incorporate portions of this text data into your
programs for more descriptive error reporting.
Whenever you install Master Link Win32 based language support, the Base Directory is created, and loaded with
the following files:
Base Directory
README32.TXT
ERRORS.TXT
PCI_W32.DLL
See above for a description of this file.
See above for a description of this file.
Master Link Win32 Based Dynamic Link Library (DLL).
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Chapter 3: Master Link Software Libraries
TYPEJ.TC
TYPEK.TC
TYPET.TC
TYPEJ5B.TC
TYPEK5B.TC
TYPET5B.TC
Type J thermocouple conversion table used by thermocouple support functions.
Type K thermocouple conversion table used by thermocouple support functions.
Type T thermocouple conversion table used by thermocouple support functions.
Type J thermocouple conversion table for non-linearized 5B thermocouple block support.
Type K thermocouple conversion table for non-linearized 5B thermocouple block support.
Type T thermocouple conversion table for non-linearized 5B thermocouple block support.
If selected at installation time, the following driver files are installed in the directories indicated below.
For Windows
 95 Systems:
WINDOWS\SYSTEM
MASTRLNK.VXD Hardware Driver support for operations with the Libraries under Windows 95. See Appendix F
for more information. This and the VDMAD.VXD file are required for DMA operations if you
installed the Libraries on a Windows 95 machine.
WINDOWS\SYSTEM\VMM32
VDMAD.VXD
Virtual DMA Driver support for DMA operations with the Libraries under Windows 95. See
Appendix F for more information.
For Windows NT
 Systems:
WINNT\SYSTEM32\DRIVERS
MASTER_NT.SYS Master Link Windows NT hardware driver with DMA support.
The following sections briefly describe the files provided for each language supported by the software package.
3.11.1 C Language Software Files
CW32\INCLUDE
PCICONSW.H
PCIDATAW.H
PCIDECLW.H
PCIDEFW.H
PCITYPEW.H
PCIW.H
Contains the software library constants definitions.
Software initialization functions and local data block size header file. Master Link uses its own
local data block in the common data segment of the application program. Although you will
probably never need to alter this data block size, the size of the data block can be modified if
required (see error 300 in the ERRORS.TXT file). The associated source code file,
PCIDATAW.C, for initialization functions is located in the CW32\SAMPLE subdirectory.
C/C++ compiler support file.
C/C++ compiler support file.
Contains the software library variable type definitions.
Contains the software function declarations. All program source files that use the constants,
type definitions, and functions must include this header file. Note, PCIW.H includes
PCICONSW.H and PCITYPEW.H.
CW32\LIB
IPCI_W32.LIB
IPCI_W3V.LIB
Import library file for Borland C++. This library file must be linked with the application
program.
Import library file for Microsoft Visual C++. This library file must be linked with the application
program.
CW32\SAMPLE
?????_CW.C
?????W.C
PCIDATAW.C
32
C Sample program main source code files.
C Sample utility function source code files.
Software Initialization Support source code file. PCIDATAW.C must be compiled and linked
with the application program.
Chapter 3: Master Link Software Libraries
?????_CW.DEF
?????_CW.H
?????W.H
?????.ICO
?????_CW.RC
C Sample program module definition files.
C Sample program header files. Contains control IDs for the resource and main program files.
C Sample utility function header files.
C Sample program icon files.
C Sample resource files.
3.11.2 Microsoft Visual Basic Language Files
VB32\INCLUDE
PCICONSW.B
PCIDATAW.B
PCITYPEW.B
PCIW.B
Defines constants used by various Software function calls. All Visual Basic application
programs must merge this file into the main global module.
Software initialization function and local data block size header file. Master Link uses its own
local data block in the common data segment of the application program. Although you will
probably never need to alter the local data block size, the size of the data block can be
modified if required (see error 300 in the ERRORS.TXT file). All Visual Basic application
programs must merge this file into the main global module. The associated source code file,
PCIDATAW.BAS, for the local data block size and initialization functions is located in the
VB32\SAMPLE subdirectory.
Visual Basic Software Library type definitions. All Visual Basic application programs must
merge this file into the main global module.
Contains function declarations for each function call supported by the Software Library. All
Visual Basic application programs must merge this file into the main global module.
VB32\SAMPLE
?????G.BAS
?????W.BAS
PCIDATAW.BAS
Sample program global modules.
Sample program utility modules.
Visual Basic Software Initialization Support source code file. PCIDATAW.BAS must be linked
in the application make file.
?????_BW.FRM Sample program forms.
?????_BW.MAK Sample program make files.
3.12 Using the Win32 Based Software Interface Files
Along with the Dynamic Link Library (PCI_W32.DLL) and other files in the "Base Directory", each set of files
contains all of the necessary files for the supported compiler(s). The interface files provide type and constant
definitions and function declarations which allow you to make high-level language calls to the libraries, using your
programming language.
3.12.1 The Master Link Win32 Dynamic Link Library
The Win32 Dynamic Link Library (PCI_W32.DLL) must be made available to Windows 95 or Windows NT
and your application program, by installing it in the working directory of your application program, or by
specifying its location in the "PATH" environment variable, or in the WINDOWS directory.
The DLL is not "compiled" with the application, rather it is accessed by the application program during execution.
In general, this interface is achieved in one of several ways depending on the programming language:
For C applications, the C Import Library file IPCI_W32.LIB or IPCI_W3V.DLL must be linked with
the application program.
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Chapter 3: Master Link Software Libraries
For Visual Basic, linkage to the PCI_W32.DLL is achieved through the PCIW.B function declarations
“Lib” statement. All Visual Basic application programs must merge this file into the main global
module.
3.12.2 Other Interface Files and Your Program
Master Link uses its own local data block in the common data segment of the application program. The default
size of the local data block is 4 kbytes. The source code for this module is provided in the SAMPLE
subdirectories so that the size of the data block can be modified, if needed (see error 300 in the ERRORS.TXT
file). The source file names are PCIDATAW.C for C and PCIDATAW.BAS for Visual Basic. This module must
be compiled and linked with the application program.
3.12.3 Programming Language Notes
C
The IPCI_WV.LIB import library must be linked with Microsoft Visual C++ programs, while the IPCI_W32.LIB
import library must be linked with Borland C++ programs.
Creating C executable programs entails:
Adding the CW32\INCLUDE directory to the Include Search Path of your compiler.
Making a project file with the following items:
All application source files (*.C files)
The PCIDATAW.C source code file
The IPCI_W32.LIB or IPCI_W3V.LIB import library
Your application's definition file (.DEF file).
Your application's resource definition file (.RC file).
Compiling and linking the files.
Visual Basic
There are two steps to creating and running programs in the Microsoft Visual Basic environment when using the
Master Link Software Libraries for Win32:
First, you must install the dynamic link library, PCI_W32.DLL, either in the PATH or in the directory
which will be current when your Visual Basic program runs, or in the WINDOWS directory.
The next step is ensuring that the software is initialized before any I/O calls are attempted. The sample
programs assure that this is the case by calling a separate subroutine called InitRoutine.
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Chapter 3: Master Link Software Libraries
3.13 Communicating with the Libraries
For DOS, Microsoft Windows 3.x or Win32 applications, communication with the libraries is accomplished by
making simple function calls to the interface library as demonstrated in Section 1.3, Chapter 1. Before you begin
to work on your own application programs in any of the supported languages, you may wish to try out some of the
Sample Programs to familiarize yourself with the system, and the operation of the Software Libraries.
A complete description of each of the referenced calls, including, syntax, and information on valid parameter
values, is provided in Appendix A, Section A.5. A complete listing of all software error codes is provided in the
ERRORS.TXT file.
Note: For the purpose of consistency, the syntax for all software call specifications is presented in a generic C
function prototype format. Type differences and differences in record structures may exist between C and your
chosen programming language. Language-specific information is provided at the beginning of each function call
group in Appendix A in order for you to translate parameters into formats appropriate to your application program
and the compiler you are using.
The following chapters describe, in general, how the calls in the various functional call groups should be
sequenced in an application program to perform a specific task.
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Chapter 3: Master Link Software Libraries
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36
Chapter 4: Initialization
Chapter 4: Initialization
4.1 Introduction
Software and hardware initialization routines are the first components of an application program. The PCI20369S Master Link Software Libraries initialization functions are used to initialize the software library, define
hardware support, define special function support (DMA, Thermocouple, etc.), and detect and initialize your data
acquisition hardware components.
4.2 Initialization Functions
A brief description of the initialization functions provided with the Libraries are presented in the following
sections. The calls you use to initialize your system are categorized into hardware and software initialization
functions, hardware and software support functions, and expansion slot assignment and inquiry functions.
Special Windows Note: For Windows 3.x and Win32 applications, the functions RegisterClient and
UnregisterClient are provided in the Initialization group for the purpose “registering” and “unregistering”
program instances with the Master Link Dynamic Link Library (.DLL) driver. These function calls, which are not
discussed in this section, are the first and last required driver calls for Windows applications. Please refer to the
“Initialization Functions” section of Appendix A and the Windows based sample programs for information on
using these functions.
4.2.1 Hardware and Software Initialization Functions
The Software Libraries provide three function calls in this category:
HWInit
SWInit
SWReset
hardware initialization
software initialization, and
a function call to reset or cancel the configuration established by the other two calls.
HWInit is the final system function that should be called in the initialization section of program. It establishes the
software configuration, performs system timer calibration, and initializes the Intelligent Instrumentation hardware
components. Descriptions of the initialized states of all Intelligent Instrumentation Data Acquisition Devices after
a HWInit call are given at the end of the “Initialization Functions” section in Appendix A.
SWInit initializes the software library. This call should precede all other Master Link function calls in your
program (also see the “Special Windows Note” in section 4.1 above). You can alter the SWInit call to customize
driver initialization. You do this by replacing the last parameter of the InitSW function call (found in the
PCIDATA source file in the SAMPLE directory) with the desired flag(s). For more information on this topic
please consult the “Initialization Options” section of Appendix F.
SWReset resets the Software Library. This function, which can be called any time after SWInit, cancels the
software and hardware initialization.
4.2.2 Hardware and Software Support Functions
IncludeXXXX calls comprise the hardware and software support function call group. IncludeXXXX function
calls are provided to link software support for the hardware used by the application. In addition, they are used to
include special software support for functions like buffer allocation and DMA operations.
There is a unique IncludeXXXX call for each PCI-20000 Series Board, Carrier and I/O Module product. The
hardware support call for the PCI-20428W-1, -2 or the -3 Board is:
Include428W
hardware support function for all versions of the PCI-20428W Board
37
Chapter 4: Initialization
Two example software function support calls are:
IncludeBUF
IncludeDMA
buffer support
Direct Memory Access (DMA) support
All IncludeXXXX calls pertaining to the operation of PCI-20428W Boards are listed in Appendix A.
To load support for a PCI-20428W, the beginning of an initialization routine might look like this:
int InitRoutine (void)
{
int err;
if (err = SWInit ())
return err;
if (err = Include428W ())
return err;
if (err = IncludeBUF ())
return err;
if (err = IncludeDMA ())
return err;
.
.
.
4.2.3 Slot Assignment and Inquiry Functions
Slot Assignment Functions
Slot assignment functions are used to identify the PCI hardware configuration installed in your computer to the
Software Libraries. All I/O addressing by the software is related to the "slot number" of the device. For the
functions to properly identify a hardware element, it must have a designated "slot" number.
The function used to assign a slot number for a PCI-20428W Board is the SlotAssignIO call.
SlotAssignIO
assigns a slot number to an installed I/O mapped ISA bus device (like the PCI-20428W)
When using this call you must specify the base I/O address of the board and the slot number you wish to assign.
Chapter 2 describes how to set a PCI-20428W's base I/O address DIP switch. The assigned slot number (which
must be from 16 to 31), along with the module number (which is always 0 for the PCI-20428W) and channel (or
port) number parameters, are used in all subsequent driver I/O type function calls. The SlotAssignIO call must be
made for each PCI-20428W Board in the system, and must be made between the SWInit and HWInit calls.
Slot Inquiry Functions
Slot inquiry functions are used to return information about the Intelligent Instrumentation hardware configuration
installed in your computer. These functions are:
SlotInquire
SlotSearchIO
returns configuration information about a specific "slot".
searches the PC's I/O map for installed I/O mapped ISA devices and returns configuration
information.
SlotInquire can be used to obtain information about the hardware configuration installed in a specific slot of the
host computer. An array of data about the installed PCI-20000 Series device is returned. Data includes a
hardware present flag, an ID code, and the device's segment address.
SlotSearchIO searches the I/O map for I/O-mapped boards and returns the number of units found along with
information about each device. Note, only those devices with software support already loaded (using a
38
Chapter 4: Initialization
IncludeXXXX function call) will be detected. For each device found, the ID code and base I/O address are
returned. This information may be used to generate SlotAssignIO calls for those boards which are found.
4.3 Function Call Sequence
The order in which you should organize initialization function calls in your programs is summarized below.
Initialization function calls are also demonstrated in the sample programs supplied with the software package.
[1]
SWInit must be the first library function call. Note: The SWReset function can be called any time
after SWInit to cancel all software and hardware initializations.
[2]
All of the necessary IncludeXXXX calls should be made next.
[3]
Optionally call SlotSerachIO to automatically detect I/O-mapped ISA boards (such as the PCI20428W or PCI-20377W Board)
[4]
Next, assign a slot number to each PCI-20428W Board in your system with the SlotAssignIO call.
[5]
HWInit should be the last required initialization function called. All installed boards which have been
assigned slot numbers by the SlotAssignIO call will be initialized.
[6]
HWInit should be the last required initialization function called. All installed I/O-mapped ISA boards
which have been assigned slot numbers by the SlotAssignIO call will be initialized. Note: SlotInquire
can be called any time after HWInit to obtain configuration information about a specific slot.
39
Chapter 4: Initialization
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40
Chapter 5: Analog Input
Chapter 5: Analog Input
5.1 Introduction
This chapter describes how to acquire analog input data with the on-board A/D of the PCI-20428W Low Cost
Multifunction Board using the Master Link Software Libraries. First an overview of the board's analog input
circuitry is presented, followed by information on programming analog input acquisitions in the various possible
modes.
5.2 Analog Input Circuit Description
The PCI-20428W provides an analog input section that processes and converts analog signals to digital data for
input to the PC. The A/D converter provides 12-bit resolution and has a maximum throughput rate of 100 kHz
(10.0 µsec/conversion). Through jumper settings the board supports 16 single-ended or 8 differential analog input
channels. The PCI-20428W-3 version of the board supports single-ended mode only. Prior to analog-to-digital
(A/D) conversion the analog input signals are amplified by a software programmable gain instrumentation
amplifier, or a unity gain amplifier in the case of the PCI-20428W-3. The set of gains this amplifier can be
programmed for depends on the model of the board. The PCI-20428W-1 provides analog input gains of 1, 10, or
100. Gains of 1, 2, 4 or 8 are available on the PCI-20428W-2. The PCI-20428W-3 supports a gain of 1. Jumper
selectable input ranges of ±5 V, ±10 V, 0 - 5 V and 0 - 10 V are provided. If the range is changed, the board must
be recalibrated (see Appendix D).
The analog input section also has an automatic channel scanner that can sequence through 16 channels in singleended mode or 8 channels in differential mode. The scanner can be programmed to scan channels 0 through N in
increasing sequential order, where N is the last channel in the list. The analog input circuit employs a 1 kword
FIFO (First-In-First-Out) buffer to accumlate conversion data in high-speed situations. This FIFO helps overcome
potentially long DMA latencies associated with some PCI Bus computers.
The start of each A/D conversion can be controlled by software means, or by one of two hardware sources. A
software start command, implemented through the AIRead call, will always start a conversion if one is not already
in progress. Hardware start convert signals are used when a DMA analog input data acquisition process is
desired. To achieve an accurate sampling rate, the board's internal Analog Input Rate Generator (Chapter 9) can
be programmed to generate a precisely timed pulse stream for controlling A/D conversions. In addition, an
external TTL-level signal connected to the External Input (pin 47 on the back connector) can be used to control
conversions.
A detailed discussion of the PCI-20428W's analog input circuitry can be found in the Hardware Technical
Reference section of this manual, Appendix B. Full specifications of the analog input section, as well as the
board's other functional areas, are given in Appendix C. The following sections discuss software vs. DMA
controlled data acquisition and the driver functions which support each mode.
5.3 Modes of Operation for Acquiring Analog Input Data
There are two different approaches for reading analog input data; software controlled acquisitions, and hardware
controlled acquisitions (i.e. DMA controlled). The mode of operation you require depends on your analog data
gathering needs.
Software controlled acquisitions are sufficient if you need to know input values on an occasional basis, without
respect to precise moments in time or to some rapidly changing external event. Temperature monitoring is a
typical application where software control is appropriate. This mode is also useful for verifying correct
connections to external signals. On the other hand, hardware controlled acquisitions are appropriate if you must
repeatedly sample a single input (or group of inputs), or when the data you are looking for starts or stops based on
some external event. Wave form capture and analysis is an example application requiring hardware control.
41
Chapter 5: Analog Input
Different library function calls support these two types of data acquisition tasks. The following sections discuss
how you can use these function calls in a program.
5.3.1 Software Controlled Acquisition
A read of a single analog input channel on a PCI-20428W Board can be performed using the AIRead call.
AIRead returns A/D conversion data from a selected input channel using specified parameter settings for input
range, gain, input mode, etc. Note that the parameter settings must match the jumper configuration of the board.
Analog conversion data is returned in "common analog data format":
16-bit 2's complement format (-32768 to 32767) for the Bipolar input ranges (e.g. ±5 V, ±10 V ),
or,
16-bit straight binary (0 to 65535) for Unipolar input ranges (e.g. 0-10 V).
After the proper system initialization calls have been made (see Chapter 4), only one call (AIRead) is required to
read an analog input channel. The Library supplied CountsToVolts function can be used to convert common
analog format data to floating point voltage data.
Software Controlled Analog Input Programming Procedures
The AIRead call description in Appendix A provides all information for using the function. This includes
syntax, a functional description, and a list of parameters and their possible values. Please refer to that list for gain,
range, and input type codes.
Using the AIRead call, a single read operation can be performed on any analog input channel.
A flow chart for this procedure is given in Figure 5.1
42
[1]
As with any program, you must initialize your system with the SWInit call, the proper IncludeXXXX
calls, SlotAssignIO, and the HWInit call (see Chapter 4 for more information on initialization
functions).
[2]
Call AIRead with the desired parameter settings for gain, range, and input type (single-ended or
differential). The parameters and any applicable jumper settings must match. The data is returned in
common analog data format. Optionally you can call CountsToVolts to convert the common format
values to floating point voltage values.
Chapter 5: Analog Input
START
Call AIRead with the desired settings for gain, input range
and single-ended or differential operation. An optional
auto-zero reference channel (shorted to ground) can
also be specified. The data read from the Board is
returned in common analog data format.
END
Figure 5.1 Flow Chart: Software Controlled Analog Input Read
5.3.2 Hardware Controlled Acquisition
Multiple channel analog input data acquisition is accomplished using Direct Memory Access (DMA) techniques.
DMA is a fast and efficient way to get large quantities of data into a personal computer. The PCI-20428W has a
built-in DMA controller, used in conjunction with the board's channel scanner and interface circuitry, which is
designed to transfer analog input data from the on-board A/D’s FIFO buffer directly to memory.
In the following paragraphs, the chief Library functions, acquisition hardware elements and signals for DMA
acquisition are discussed.
Primary Function Calls
The DMAGetHandle or the DMAHugeGetHandle call assigns a "process handle" to the DMA process you
are programming. See the "Buffers" section later in this chapter (or Appendix A) for information on which call
should be used in your application. Since you can have more than one DMA process in a program, such as
concurrent analog input and analog output, this handle is used to uniquely identify separate processes to other
function calls. After obtaining a "handle", you should then use DMASetOptions for each DMA process to
select the DMA channel(s). The DMA channels selected must match the jumper selected channel(s).
The AIConfigureList call is used to specify configuration parameters (gain, range, and input configuration) for
the list of analog input channels (0 to N) you want to acquire data from. The same gain must be used for all
channels. The range and input configuration specified must match the jumper selected configuration.
The DMAConfigureList call is used to specify the channel list to the board's DMA controller and set the
majority of other DMA input transfer parameters. The call specification for DMAConfigureList (see Appendix
A) discusses valid parameters and the various conditions allowed for analog input DMA transfer.
Pacing Signals
Multiple or single-channel DMA data acquisition requires the use of a pacing signal. Pacing signal pulses are
used to initiate A/D conversions on regular timed intervals. In turn, the A/D converter's End-Of-Convert (EOC)
output signal is internally used to generate a DMA transfer request to the PC for each conversion result. The
board's channel scanner will automatically increment to the next channel list element immediately after the start of
each conversion. Thus, for each pacer pulse, the current analog input channel's A/D results are transferred to the
43
Chapter 5: Analog Input
PC's memory and the next channel on the scanner list is readied for conversion. The A/D circuit’s FIFO serves to
buffer the transfer of conversion data to the PC’ bus, thus minimizing overrun errors.
The PCI-20428W allows one of two pacer signal sources; the on-board Analog Input Rate Generator, or the
External Input. The Analog Input Rate Generator must be disabled if the External Input is used as the pacer. A
rising-edge (TTL-level) on the External Input will start a conversion. When connected to the External Input,
Counter Channel 0's output may be used to pace the acquisition. Also, if the DMA Start on Trigger mode is
selected (see next topic), the External Input acts as a trigger input for starting the DMA process, and cannot be
used as a pacer.
If you have selected the Analog Input Rate Generator or Counter Channel 0, you will need to configure the device
for the desired sampling rate. Configuration details are covered in Chapters 7 and 9. Note: Through jumper
W39, both analog input and output conversions can be paced from the Analog Input Rate Generator for
synchonized DMA input and output processes.
DMA Start and Stop Modes
DMA start and stop modes are specified in the DMAConfigureList call's start and stop parameters. The
following start and stop combinations are supported by the PCI-20428W:
START MODE
Start on Command
Start on Command
Start on Trigger
Start on Trigger
STOP MODE
Stop on Terminal Count
Stop on Command
Stop on Terminal Count
Stop on Command
Start on Command - Stop on Terminal Count
When this mode combination is programmed, the DMA process will start when the DMAStart function is issued,
then stop when the programmed number of transfers per channel (the Terminal Count) have been made or may be
prematurely terminated if the DMAStop function is called. The allowable pacer signal sources, plus the DMA
start and stop processes are discussed below:
Allowable Pacer Sources
The Analog Input Rate Generator, an external source connected to the External Input, or Counter Channel 0's
output when connected to the External Input can be used as the pacer source for any "Start on Command" mode.
If Counter Channel 0 is used, the counter's output (pin-45 of the I/O connector) must connected to the External
Input line (pin-47). Also, if the External Input is used to pace the acquisition, then the Analog Input Rate
Generator must be disabled. Note that the Analog Input Rate Generator is always disabled on power-up.
Acquisition Start
The DMAStart call initiates the DMA process. Prior to issuing this call, the DMASetPacer function must be
used to identify the pacer source to enable as a result of a call to DMAStart. Note that if an external signal
connected the External Input is the pacer source, you must specify the constant NO_TYPE in the iotype
parameter of DMASetPacer call. This specifies that an unidentifiable external source will be used as the pacer.
Constants for the Analog Input Rate Generator or Counter Channel 0 are given in Appendix A.
Acquisition Stop
The "Terminal Count" value specifies the number of complete passes that will be made of all the channels
programmed on the channel list. One analog input sample is transferred per pacer pulse. You specify the
Terminal Count value in the clustercount parameter when you make your call to DMAConfigureList. The
clustercount is equivalent to the number of samples per channel you wish to acquire. This value is also used to
determine the minimum size of the buffer that must be allocated for the acquisition (described later in the section
on "Buffers"). Note: The DMAStop function can be used to terminate a DMA process started in any mode.
44
Chapter 5: Analog Input
Start on Command - Stop on Command
When this mode combination is programmed, the DMA process will start when the DMAStart call is issued, then
stop when the DMAStop function is called. The allowable pacer sources and the DMA start process are the same
as those described above. The DMA stop process is discussed below:
Acquisition Stop
After the start call is made and until the DMAStop call is issued, one analog input sample per pacer pulse is
transferred to a circular memory buffer. A circular buffer is a section of memory conceptually arranged as a
"ring". Data is first entered into the buffer at a beginning address pointer. Subsequent data enters the buffer at
an address pointer which advances around the ring. When the advancing pointer reaches the beginning point of
the buffer, old data is overwritten with new data. The figure below illustrates this process.
START OF BUFFER
START OF BUFFER
NEW DATA
POINTER
1
2
PRIOR TO ACQUISITION THE DATA BUFFER CONTENTS IS UNDEFINED
AFTER START OF ACQUISITION, NEW DATA BEGINS TO FILL THE BUFFER
NEW DATA
POINTER
START OF BUFFER
3
WHEN THE NEW DATA POINTER REACHES THE START OF THE BUFFER, OLD ACQUISITION DATA
IS OVERWRITTEN WITH NEW DATA
Figure 5.2 Operation of a Circular Buffer
You specify the number of samples per channel you wish to acquire in the clustercount parameter when you
make your call to DMAConfigureList. For each pass of the channel list, one sample from every channel
programmed on the list will be acquired. The size of the buffer must be large enough to hold the total number of
samples (i.e. the clustercount times the number of channels on the list) before wrapping around. Determining
the minimum size of the buffer is described in the section on "Buffers".
Start on Trigger - Stop on Terminal Count
When this mode combination is programmed, the DMA process will start after the DMAStart call is issued and
when a trigger signal (TTL-level Low-to-High transition) at the External Input occurs. The process is stopped in
the same manner discussed under the "Start on Command - Stop on Terminal Count" description given earlier.
The allowable pacer source and the DMA start process are discussed below:
45
Chapter 5: Analog Input
Allowable Pacer Sources
When "Start on Trigger mode" is used, the Analog Input Rate Generator is the only allowed pacer source.
Acquisition Start
When a "Start on Trigger mode" is used, the External Input functions as the trigger input. After calling
DMAStart (which enables the Analog Input Rate Generator and the DMA controller) a rising-edge (TTL-level)
on the External Input will trigger the DMA process. Prior to issuing DMAStart, the DMASetPacer function
must be used to identify the Analog Input Rate Generator as the pacer source to enable.
Start on Trigger - Stop on Command
When this mode combination is programmed, the DMA process will start after the DMAStart call is issued and
when a trigger signal (TTL-level Low-to-High transition) at the External Input occurs as described above. The
process is stopped using the DMAStop call. A circular buffer, described earlier, is also employed to store
acquisition data.
Buffers
Whenever you set up a DMA input operation, you must allocate buffer memory for storing acquired data. Once
you know how much memory you need, you can use the BUFAllocate call to create a buffer. The start address of
the data buffer is returned from this call if a conventional memory buffer is allocated. On 80286 machines (or
better) with extended memory (also called XMS memory), BUFAllocate can optionally create a buffer in
extended memory. In this case an extended memory "buffer handle" is returned from the call. Note that you can
allocate your own buffer, or array, for data storage if you prefer.
The amount of required buffer memory depends on the number of analog input channels you want to read and the
number of samples you want to take from each channel. The DMAConfigureList call returns a value, called the
clustersize, that you can use to determine the required buffer size. The clustersize value is the amount of data
acquired for one complete pass of the channel list specified in the DMAConfigureList call. Therefore, the
required minimum buffer size is the clustersize multiplied by the number of samples you want to collect from each
channel. Since you specify the number of samples per channel using the DMAConfigureList call's clustercount
parameter, the minimum buffer size is:
Buffer size (bytes) = clustersize x clustercount
For important additional details on allocating DMA buffers, please refer to the BUFAllocate and
DMAConfigureList call descriptions in Appendix A.
In addition to the BUFAllocate call, several other buffer related function calls are provided. Each of these calls
are briefly described in the following paragraphs.
The BUFAttachProcess call is used to assign the allocated buffer to the DMA process. A DMA process is
identified by a "process handle" which is obtained using one of the "DMAGetHandle" functions. Getting a DMA
process handle is always the first step in programming a DMA run. This process handle and the buffer handle (for
extended memory buffers) or buffer address (for conventional memory buffers in DOS applications) returned by
the BUFAllocate call are used by BUFAttachProcess to associate the buffer to the process. If the buffer requires
less than 65536 bytes (64 k) of data then the DMAGetHandle call should be used to obtain a process handle.
DOS-based applications requiring more than 64 kbytes of data are not supported. If you are programming any
Windows application requiring more than 64 kbytes of data then DMAHugeGetHandle must be used.
After the analog input DMA process is finished, you can use BUFDecode to translate the buffer's raw A/D
acquisition data into the common analog data format (this format is described in Section 5.3.1.) Prior to calling
the BUFDecode function, you may wish to use BUFSeek to locate specific data clusters within the buffer for
decoding. A structured variable, called info, which contains detailed information about the buffer is available
through both the BUFDecode and BUFSeek calls. This structure is also passed to the DMAStatus and
DMAStop calls where it is updated with information about the acquisition. The info structure is a source of
46
Chapter 5: Analog Input
detailed data you may wish to use for debugging and monitoring purposes (see Appendix A, under the Buffer
Management call section for details on buffer info).
Before exiting your program you should free your DMA acquisition buffer using the BUFDeallocate call. This
will free the buffer memory for use by other applications. (Note: The DMA handle should also be released using
the DMAFreeHandle call prior to exiting the program.)
Summary
The basic components for performing a DMA analog input acquisition have been briefly presented in the
preceding paragraphs. To summarize, you will need to:
GET a DMA PROCESS HANDLE using DMAGetHandle or DMAHugeGetHandle and set the
DMA channel using DMASetOptions.
SELECT the CHANNELS you want to sample and create CHANNEL LISTS for the AIConfigureList
and DMAConfigureList calls.
CONFIGURE and CONNECT (if required) a pacer source. For example, if you select the PCI20428W's on-board Analog Input Rate Generator as the pacer, you will want to configure it for the
desired sampling rate. (See Chapter 9 on the Rate Generator circuit for configuration details.) Specify
the Analog Input Rate Generator channel to the DMASetPacer call.
CHOOSE a DMA START and STOP mode. Start and stop modes are selected in the
DMAConfigureList call.
SET UP a DATA BUFFER of the proper size to receive the data you want to gather. The
BUFAllocate call can be used to do this. Call BUFAttachProcess to assign the buffer to the DMA
process
START the Analog Input DMA PROCESS (the DMAStart call enables the chosen "start" source and
the DMA control circuitry.)
After the DMA process has completed, (through calling DMAStop or if a Terminal Count has been
reached) you can use BUFDecode and BUFSeek to CONVERT the DATA FORMAT, and LOCATE
DATA CLUSTERS. (Note: The DMAStatus call can be used to detect when a Terminal Count
process has completed.)
Call BUFDeallocate to free buffer memory, and release the DMA handle with DMAFreeHandle prior
to exiting the program.
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Chapter 5: Analog Input
5.3.4 Multiple Channel Analog Input DMA Programming Procedures
This section addresses an actual Master Link Software call sequence you may follow for programming an analog
input DMA process. Information on each of the software calls, including syntax, a description, a list of
parameters and possible values is provided in Appendix A. (The steps listed below are presented in flow chart
style in Figure 5.3.)
IMPORTANT NOTE for Windows Users:
If you didn’t do so at installation time, you will need to install one of the following platform-dependent
driver files as described in Chapter 3 and in Appendix F:
1. Windows NT
 : Master Link NT Driver with DMA support, MASTER_NT.SYS.
2. Windows 95: Virtual DMA Device Driver, VDMAD.VXD.
3. Windows 3.x: Virtual DMA Device Driver, PCIVDMAD.386.
To program an acquisition, you will need to:
[1]
Initialize your system (see Chapter 4 on Initialization for more information on these functions).
[2]
Call DMAGetHandle or DMAHugeGetHandle (see Appendix A) to assign a "processhandle" to the
DMA process. The handle is a number returned by the call, you must use this handle when referencing
this process in subsequent DMA operations. Use DMAHugeGetHandle for any Windows
applications that require greater than 64 kbytes of acquisition data.
[3]
Call DMASetOptions to choose a host computer DMA channel for the transfer (see the
DMASetOptions call description in Appendix A for DMA channel options). The specified DMA
channel must match the DMA channel selected through board jumper settings (see Table 2.4 or 2.5,
Chapter 2).
[4]
Configure your pacer source. The pacer signal can come from the External Input line or the on-board
Analog Input Rate Generator.
[5]
Call DMASetPacer to identify your selected pacer source to the Software Library.
[6]
Call AIConfigureList to:
A. Program the analog channel scan list. Each element of the list passed to this call contains
the following data; slot number of the board, module number of A/D (must be module 0
(zero)), channel number, input range, gain, and differential or single-ended operation. The
elements of the list must be in sequential order from channels "0" to "N". Also, the specified
input range and input configuration (differential or single-ended) must match the board's
jumper settings (see Tables 2.1 and 2.2, Chapter 2).
B. Set the burstmode parameter to "0" (FALSE) - it does not apply to the PCI-20428W.
C. Specify the number of channel list elements in the count parameter.
D. Set the triggermode and triggerdelay parameters to "0". These parameters are reserved
for future use and are not related to DMA.
48
Chapter 5: Analog Input
[7]
Call DMAConfigureList to:
A. Program the DMA channel list. The list contains; slot number of the board, module
number of A/D (must be module 0 (zero)), channel number, and the I/O type=AI_TYPE. The
order of the list elements must match that of the channel scan list specified to
AIConfigureList.
B. Specify the number of channel list elements in count.
C. Select a start and stop mode.
D. Set startdelay and stopdelay to 0.
E. Set the clustercount (number of samples from each channel to be stored in the buffer). For
a Stop on Terminal Count, this is the terminal count.
F. Set the groupAI parameter to "0" (FALSE).
[8]
From the clustersize value returned in the DMAConfigureList call, determine the minimum buffer size
you will need (in bytes) from the following:
Buffer size (bytes) = clustersize x clustercount
where clustercount is the number of channel list passes you want to acquire (as specified through the
DMAConfigureList call in step [7]).
Call BUFAllocate to allocate a data buffer for receiving your analog input data. Set the buffersize
parameter to the value determined above. Also specify the general buffer location. The buffer start
location (address) is returned in the extended memory bufferhandle and conventional memory buffer
pointer parameters. Alternatively, you may allocate your own buffer or array through other means.
[9]
After allocating the buffer, call BUFAttachProcess to associate your buffer with the DMA process you
are performing. You do this by specifying the DMA processhandle, obtained from DMAGetHandle
or DMAHugeGetHandle, to BUFAttachProcess's processhandle parameter. You must also identify
the buffer's XMS bufferhandle, or conventional memory buffer pointer to the call.
[10]
To start your analog input DMA acquisition call DMAStart. This will enable your pacer source (if
specified to DMASetPacer).
[11]
The DMAStatus call can be used to check if a "Stop on Terminal Count" DMA process has finished.
For "Stop on Command" mode the DMA process must be stopped through the DMAStop call.
DMAStop can also be used to prematurely stop a Terminal Count mode process. DMA status and
buffer information is also returned after a call to DMAStop.
[12]
When the DMA process has terminated you can locate specific data in the data buffer with BUFSeek,
then transfer and decode (format) that data to a specified destination array or buffer using the
BUFDecode call.
[13]
Before exiting your program, you must deallocate any buffers by using the BUFDeallocate call, and
"free" any DMA processhandles using the DMAFreeHandle call.
49
Chapter 5: Analog Input
START
Call DMAGetHandle or DMAHugeGetHandle and
DMASetOptions to get a DMA process handle and to
set the DMA channel. The "process handle" is used in
many subsequent function calls.
Configure the desired pacer source (Analog In Rate
Generator, External Source, or Counter channel 0).
Call DMASetPacer to inform the software of which
pacer source to enable just prior to acquisition. *
Call AIConfigureList to program the analog input
channel list. You must specify the input range, input
configuration (SE or DIFF), and the desired gain.
Always set AIConfigureList's triggermode parameter
to FALSE and the triggerdelay parameter to 0.
Call DMAConfigureList to program the DMA channel
list. You must specify the analog input I/O type
(AI_TYPE), set the list count (number of list entries),
select the start/stop mode, and set the clustercount
(number of list passes for the acquisition). Use the
clustersize value returned by the call for use in
calculating required DMA buffer size in the next step.
Call BUFAllocate to allocate a data buffer for the
DMA acquisition. The buffersize, in bytes, must be
at least the clustersize*clustercount in length. Note
that the clustersize value is obtained from the previous
step and the clustercount (number of list passes) is the
clustercount value you specified in the previous call.
Call BUFAttachProcess to assign the buffer you have
just allocated to your DMA process.
A
Figure 5.3 Flow Chart Example DMA Analog Input Acquisition (1 of 2)
50
* Only the Analog In Rate Generator
or Counter channel 0 may be
specified. If Counter channel 0 is
the pacer, its output must be
externally connected to the Board's
External Input line.
Chapter 5: Analog Input
A
Call DMAStart to enable the pacer source and initiate
the analog input DMA process.
If the DMA process is configured for "Start on Trigger"
mode, a rising edge (TTL-Level) at the External Input
will start the acquisition. (Note that the Analog Input
Rate Generator is the A/D pacer source whenever a
"Start on Trigger" mode is used.)**
** Regardless of the start mode,
an A/D conversion result is transferred
to memory via DMA for every A/D
End of Convert (EOC) signal until the
DMA process is terminated.
If the DMA process is set for "Start on Command"
mode, the DMAStart call enables the pacer source
that was previously specified using DMASetPacer,
and enables data transfer.**
Command
Terminal Count
Stop on Command
or Stop on Terminal Count?
Call DMAStop to terminate
Call DMAStatus
the DMA process
No
Is the
DMA Process
Done?
Yes
If desired, call BUFSeek to locate specific data clusters.
If desired, call BUFDecode to convert the result data to
common format and transfer it to a different buffer.
Prior to exiting, call BUFDeallocate to free the DMA
acquisition buffer then call DMAFreeHandle to free the
DMA handle obtained in the first step of this procedure.
END
Figure 5.3 Flow Chart Example DMA Analog Input Acquisition (2 of 2)
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52
Chapter 6: Analog Output
Chapter 6: Analog Output
6.1 Introduction
This chapter describes how to output analog data with the PCI-20428W-1 and -2 Low Cost Multifunction Boards
using the Master Link Software Libraries. First an overview of the board's analog output circuitry is presented,
followed by information on performing analog output operations in the various possible modes.
6.2 PCI-20428W-1 and -2 Analog Output Circuit Description
Two voltage output channels are provided on the PCI-20428W-1 and -2. Each output channel can be jumperconfigured for ±5 V, 0-10 V, or ±10 V output ranges. The analog output circuit must be recalibrated whenever a
new range is selected (see Appendix D). Both analog output signals are available on the 50-pin I/O connector at
the back of the computer. On power-up, both analog output channels will initialize to negative full scale. The
actual output voltage (i.e. 0 V, -5 V or -10 V) will depend on which output range is selected.
The resolution of each Digital-to-Analog Converter (DAC or D/A converter) is 12-bits, and each channel supports
an analog output throughput rate of 100 kHz. Both output channels are available on the board's I/O connector at
the back of the computer.
Analog output data can be transferred from memory to a PCI-20428W Board then to the outside world under
software control, or under DMA control using the on-board Analog Output Rate Generator or the Analog Input
Rate Generator (through an optional W39 jumper setting) as a pacer or timebase. Using the Analog Input Rate
Generator allows synchonized analog input and output DMA processes. Analog output DMA operates in either
"Start on Command" or "Stop on Command" mode. Data can be transferred to one or both analog output
channels in a single DMA process. The analog output circuit employs a 1 kword FIFO (First-In-First-Out buffer)
to buffer output data in high-speed situations. When an analog output DMA process is started, the data from the
PC’s DMA memory buffer is transferred to the FIFO as quickly as possible.
A detailed discussion of the PCI-20428W's analog output circuitry can be found in the Hardware Technical
Reference section of this manual, Appendix B. Full specifications of the analog output section, as well as the
board's other functional areas, are given in Appendix C. The following sections discuss software vs. DMA
controlled analog output and the driver functions which support each mode.
6.3 Modes of Operation for Transferring Analog Output Data
Like the analog input processes discussed in Chapter 5, there are also two different approaches for transferring
analog output data; software controlled, and hardware controlled output (i.e. using DMA). The mode of
operation you require depends on your application needs.
Software controlled analog output is appropriate when the output signal is not required to change at a precise or
periodic rate. Generation of inputs for a slow closed-loop application such as temperature control is an example.
On the other hand, hardware controlled analog output is appropriate for an application such as accurate waveform
generation, which requires a fixed output sampling rate.
Different library function calls support these two types of analog output tasks. The following sections discuss how
you can use these function calls in a program.
53
Chapter 6: Analog Output
6.3.1 Software Controlled Analog Output
A write to a single analog output channel on a PCI-20428W Board can be performed using the AOWrite call.
Both channels can be written to simultaneously using the AOWriteGroup function. Prior to using either call, the
AOConfigure function must be called for each output channel you intend to output data. This call is used to
inform the Master Link software driver system of the output voltage range the analog output channel(s) are jumper
configured for. The range you specify to AOConfigure must match the board's jumper settings (see Chapter 2) to
obtain the expected output voltage. The format of the analog output data specified to AOWrite or
AOWriteGroup must be in "common analog data format". The allowable range of values depends on the output
voltage range as listed below:
For the Bipolar input ranges (±5 V or ±10 V ), the data must be signed 16-bit integer values
in the range of -32768 to 32767.
For the Unipolar input range (0-10 V), the data must be unsigned 16-bit integer values in the
range of 0 to 65535.
A voltage-to-counts conversion function, VoltsToCounts, is provided for converting floating point voltage values
to common analog data format counts values for use by the above function calls.
After the proper system initialization calls (see Chapter 4) and the required AOConfigure call(s) have been made,
only one call (AOWrite or AOWriteGroup) is required to output analog data.
Software Controlled Analog Output Programming Procedures
The AOConfigure, AOWrite and AOWriteGroup call descriptions in Appendix A provides all information for
using these functions. This includes syntax, functional descriptions, parameter lists and their possible values.
Please refer to the these lists for range codes, and other requirements.
Using the AOWrite call, a single write operation to either analog output channel (0 or 1) can be performed. A
flow chart for this procedure is given in Figure 6.1
54
[1]
As with any program, you must initialize your system with the SWInit call, the proper IncludeXXXX
calls, SlotAssignIO, and the HWInit call (see Chapter 4 for more information on initialization
functions).
[2]
Call AOConfigure for the analog output channel you wish to write data to with the correct output
range parameter setting. The range parameter and range jumper settings must match.
[3]
Call AOWrite for the desired channel with the data you wish to output. The data is must be in
common analog data format as described above. Note: You can optionally call VoltsToCounts to
convert floating point voltage values to common analog data format for use by the AOWrite call.
Chapter 6: Analog Output
START
Call AOConfigure for the desired channel using the correct
output range setting. The range parameter must match
the board's jumper settings.
Call AOWrite for the desired channel with the data value
you wish to output. The data value must be in common
analog format.
END
Figure 6.1 Flow Chart: Software Controlled Single Channel Analog Output
Using the AOWriteGroup call, both analog output channels can be written to simultaneously.
A flow chart for this procedure is given in Figure 6.2
[1]
As with any program, you must initialize your system with the SWInit call, the proper IncludeXXXX
calls, SlotAssignIO, and the HWInit call (see Chapter 4 for more information on initialization
functions).
[2]
Make an AOConfigure call for analog output channel 0 and analog output channel 1, with the correct
output range parameter setting. The range parameter and range jumper settings must match.
[3]
Call AOWriteGroup with the data you wish to output. The data is must be in common analog data
format as described above, and it must be in a two element array where the first element contains the
data value for channel 0 and the second element contains data for channel 1. Note: You can optionally
call VoltsToCounts to convert floating point voltage values to common analog data format for use by
the AOWriteGroup call.
55
Chapter 6: Analog Output
START
Call AOConfigure for the both output channels usng the
correct output range setting. The range parameter must
match the board's jumper settings.
Call AOWriteGroup with the data values you wish to output.
The data be contained in a two element array and be in
common analog format.
END
Figure 6.2 Flow Chart: Software Controlled Dual Channel Analog Output
6.3.2 Hardware Controlled Analog Output
Hardware controlled analog output is accomplished using Direct Memory Access (DMA) techniques. Through
DMA analog output data can be transferred to one or both channels using an accurate time base at rates up to 100
kHz. The PCI-20428W has a built-in DMA controller, used in conjunction with the board's analog output section
and the Analog Output Rate Generator (or optionally the Analog Input Rate Generator) to transfer data as quickly
as possible from memory to the on-board analog output FIFO then onto the D/A converters.
Single channel output DMA transfers data to output channel 0 only. Two bytes of data are sent to the channel 0's
D/A converter for each Analog Output Rate Generator pulse. If dual channel DMA output is programmed, data is
transferred to both channels for each rate generator pulse. The data for both analog output channels must be
interleaved in the same DMA buffer and four bytes are transferred for each pulse from the rate generator.
In the following paragraphs, the chief Library functions, hardware components and operating modes for analog
output DMA are discussed.
Primary Function Calls
The DMAGetHandle or the DMAHugeGetHandle call assigns a "process handle" to the DMA process you
are programming. Since you can have more than one DMA process in a program, such as concurrent analog
input and analog output, this handle is used to uniquely identify separate processes to other function calls. See
the "Buffers" section later in this chapter (or Appendix A) for information on which call should be used in your
application. After obtaining a "handle", you should then use DMASetOptions to set a DMA channel (the DMA
channel selected must match the jumper selected channel).
The AOConfigure call is used for the same purpose as previously described. Each analog output channel used
in the DMA process must have its range configuration set by this call. The range specified to this call must
match the board's jumper settings (see Chapter 2).
The DMAConfigureList call is used to specify the analog output channel or channels used in the DMA process,
as well as other DMA parameters. If a single channel transfer is desired then only analog output channel 0 may
56
Chapter 6: Analog Output
be entered on the list. The call specification for DMAConfigureList (see Appendix A) discusses valid
parameters and the various conditions allowed for analog output DMA transfer.
Pacing Signals
Dual or single-channel DMA analog output requires the use of the on-board Analog Output or Analog Input Rate
Generator as the DMA pacing signal. Refer to Chapter 2 for setting W39 to select the desired rate generator (the
default setting is for the Analog Output Rate Generator). For each rate generator pulse, a single output value or
both output values (if dual analog output is desired) are transferred to the appropriate D/A converter(s) from the
PC's memory. The selected rate generator must be configured for the desired output sampling rate. Configuration
details are covered in Chapter 9.
DMA Start and Stop Modes
DMA start and stop modes are specified in the DMAConfigureList call's start and stop parameters. The
following start and stop combinations are supported by the PCI-20428W for analog output:
START MODE
Start on Command
Start on Command
STOP MODE
Stop on Terminal Count
Stop on Command
Start on Command - Stop on Terminal Count
When this mode combination is programmed, the DMA process will start when the DMAStart function is
issued, then stop when the programmed number of transfers per channel (the Terminal Count) have been made.
The DMAStop function can be called to prematurely stop the transfer.
Output Transfer Start
The DMAStart call initiates the DMA output process. Prior to issuing this call, the DMASetPacer function
must be used to identify the pacer source to enable as a result of a call to DMAStart. You must specify the
constant RG_TYPE in the iotype parameter and the channel number of the rate generator in the channel
parameter of the DMASetPacer call. Channel 1 is the Analog Output Rate generator and channel 0 is the
Analog Input Rate Generator. The Analog Input Rate Generator should be choosen if you want to synchronize
the analog output DMA process with an analog input DMA process (note, separate “DMA handles” are required
for each process).
Output Transfer Stop
The "Terminal Count" value specifies the number of complete passes that will be made of all the channels
programmed on the channel list before the process stops. You specify the Terminal Count value in the
clustercount parameter when you make your call to DMAConfigureList. The clustercount is equivalent to the
number of samples per channel you wish to output. This value is also used to determine the size of the buffer
that must be allocated and filled with output data (described later in the section on "Buffers"). Note: The
DMAStop function can be used to terminate a DMA process started in any mode. The process is not actually
stopped until the analog output circuit’s FIFO is empty.
Start on Command - Stop on Command
When this mode combination is programmed, the DMA process will start when the DMAStart call is issued, then
stop when the DMAStop function is called.
Output Transfer Start
The DMAStart call initiates the DMA output process. Prior to issuing this call, the DMASetPacer function
must be used to identify the pacer source to enable as a result of a call to DMAStart. You must specify the
constant RG_TYPE in the iotype parameter and the channel number of the rate generator in the channel
parameter of the DMASetPacer call (as described in the previous mode’s Output Transfer Start description).
When the process starts the analog output circuit’s FIFO is filled as quickly as possible with data from the
circular memory buffer holding the DMA data. One or two analog output samples (depending on whether
channel 0 or channels 0 and 1are used) per rate generator pulse are transferred from the FIFO to the analog
57
Chapter 6: Analog Output
output circuit and converted. If the FIFO empties, it is automatically refreshed with new data from the circular
buffer. Data is continually output until the stop command is issued.
Output Transfer Stop
The DMAStop function must be called to terminate the DMA process. After DMAStop is called, any
remaining data in the analog output circuit’s FIFO is output before the process is actually over. The number of
samples per channel you wish to output is specified in the DMAConfigureList clustercount parameter. For
example, if you want to output 100 samples (to channel 0 or to both channels) specify 100 for the clustercount.
Note that a data "cluster" is either two bytes long or four bytes long depending on whether one or both channels
are used.
The circular buffer used in this mode operates in the same manner as that described in Chapter 5 for analog
input. In the analog output case, however, data is continuously transferred out of the buffer rather than into the
buffer until the DMAStop command is issued. The output buffer must hold the total number of samples you
wish to output before wrapping occurs. Allocating and loading the buffer with data is described in the following
section on "Buffers".
Buffers
Whenever you set up a DMA output operation, you must allocate buffer memory for storing the output data. You
can use the BUFAllocate call to create a buffer. The start address of the data buffer is returned from this call if a
conventional memory buffer is allocated. On 80286 machines (or better) with extended memory (also called
XMS memory), BUFAllocate can optionally create a buffer in extended memory. In this case an extended
memory "buffer handle" is returned from the call. Note that you can allocate your own buffer, or array, for data
storage if you prefer.
The amount of required buffer memory depends on the number of channels and the number of samples you want
to write to each channel. The DMAConfigureList call returns a value, called the clustersize, that you can use to
determine the required buffer size. The clustersize value is the amount of data (in bytes) for one complete pass of
the channel list specified in the DMAConfigureList call. Since the number of samples per channel is set using
the DMAConfigureList call's clustercount parameter, the required buffer size is:
Buffer size (bytes) = clustersize x clustercount
When allocating the buffer, specify the above result to the BUFAllocate buffersize parameter. For important
additional details on allocating DMA buffers, please refer to the BUFAllocate and DMAConfigureList call
descriptions in Appendix A.
To load output data into the buffer, use the BUFEncode function. This function is used to encode your data into
the form actually used by the output hardware (the D/A converters) and place it in the DMA output buffer. The
source data may originate from an array of values you have created programmatically, or the source data can come
from another buffer (which you may have allocated with another BUFAllocate call and filled with other data). In
either case, the source data must be in the common analog data format corresponding to analog output voltage
range being used (see Section 6.3.1). Note: An example of encoding data into a DMA buffer is given the sample
program AODMR_C.C.
In addition to the above functions, several other buffer related functions are provided. Each of these calls are
briefly described in the following paragraphs.
The BUFAttachProcess call is used to assign the allocated buffer to the DMA process. A DMA process is
identified by a "process handle" which is obtained using one of the "DMAGetHandle" functions. Getting a DMA
process handle is always the first step in programming a DMA run. This process handle and the buffer handle (for
extended memory buffers) or buffer address (for conventional memory buffers) returned by the BUFAllocate call
are used by BUFAttachProcess to associate the buffer to the process. If the buffer requires less than 65536 bytes
(64 k) of data then the DMAGetHandle call should be used to obtain a process handle. DOS-based applications
requiring more than 64 kbytes of data are not supported. If you are programming any Windows application
requiring more than 64 kbytes of data then DMAHugeGetHandle must be used.
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Chapter 6: Analog Output
Before exiting your program you should free your DMA output buffer using the BUFDeallocate call. This will
free the buffer memory for use by other applications. The DMA handle should also be released using the
DMAFreeHandle call prior to exiting the program.
Summary
The basic components for performing a DMA analog output process have been briefly presented in the preceding
paragraphs. To summarize, you will need to:
GET a DMA PROCESS HANDLE using DMAGetHandle or DMAHugeGetHandle, and set the
DMA channel using DMASetOptions.
CONFIGURE the selected rate generator for the desired rate and specify its channel number (channel 1
for the Analog Output Rate Generator, channel 0 for the Analog Input Rate Generator) to the
DMASetPacer call.
CONFIGURE the analog output range of each channel you will use with AOConfigure.
CREATE a CHANNEL LIST for the DMAConfigureList call and CHOOSE a DMA START and
STOP mode. Start and stop modes are selected in the DMAConfigureList call.
SET UP an output DATA BUFFER of the proper size to hold the data you want to output. The
BUFAllocate call can be used to do this. Call BUFAttachProcess to assign the buffer to the DMA
process. Use BUFEncode to translate and transfer your source data to the output buffer.
START the analog output DMA PROCESS with the DMAStart call.
After the DMA process has completed, (through calling DMAStop, or if a Terminal Count has been
reached), use BUFDeallocate to free the buffer memory, then use DMAFreeHandle to release the
DMA handle prior to exiting the program. (Note: The DMAStatus call can be used to detect when a
Terminal Count process has completed.)
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Chapter 6: Analog Output
6.3.3 Analog Output DMA Programming Procedures
This section addresses an actual Master Link Software call sequence you may follow for programming an analog
output DMA process. Information on each of the software calls, including syntax, a description, a list of
parameters and possible values is provided in Appendix A. (The steps listed below are presented in flow chart
style in Figure 6.3.)
IMPORTANT NOTE for Windows Users:
If you didn’t do so at installation time, you will need to install one of the following platform-dependent
driver files as described in Chapter 3 and in Appendix F:
1. Windows NT
 : Master Link NT Driver with DMA support, MASTER_NT.SYS.
2. Windows 95: Virtual DMA Device Driver, VDMAD.VXD.
3. Windows 3.x: Virtual DMA Device Driver, PCIVDMAD.386.
To program an analog output process, you will need to:
[1]
Initialize your system (see Chapter 4 on Initialization for more information on these functions).
[2]
Call DMAGetHandle or DMAHugeGetHandle (see Appendix A) to assign a "processhandle" to the
DMA process. The handle is a number returned by the call, you must use this handle when referencing
this process in subsequent DMA operations. Use DMAHugeGetHandle for any Windows
applications that require greater than 64 kbytes of acquisition data.
[3]
Call DMASetOptions to choose a host computer DMA channel for the transfer (see the
DMASetOptions call description in Appendix A for DMA channel options). The specified DMA
channel must match the DMA channel selected through board jumper settings (see Table 2.5 in Chapter
2).
[4]
Configure the selected on-board rate generator. The selected rate generator match the one selected
through board jumper settings (see Table 2.4 in Chapter 2).
[5]
Call DMASetPacer to identify the selected rate generator as the pacer source to the Software Library.
[6]
Call AOConfigure for each channel used to specify the output voltage range. The range must match
the board jumper settings.
[7]
Call DMAConfigureList to:
A. Program the DMA channel list. Each list element contains the slot number of the board,
module number of the D/A converters (must be module 0 (zero)), channel number (0 or 1),
and the I/O type=AO_TYPE.
B. Specify the number of channel list elements (1 or 2) in count.
C. Set the start mode to DMA_START_COMMAND.
D. Select a stop mode (stop on terminal count or stop on command).
D. Set startdelay and stopdelay to 0.
E. Set the clustercount (number of output samples for each channel to be stored in the buffer).
For a Stop on Terminal Count, this is the terminal count.
F. Set the groupAI parameter to "0" (FALSE).
60
Chapter 6: Analog Output
[8]
From the clustersize value returned in the DMAConfigureList call, determine the buffer size you will
need (in bytes) from the following:
Buffer size (bytes) = clustersize x clustercount
where clustercount is the number of output samples per channel (as specified through the
DMAConfigureList call in step [7]).
Call BUFAllocate to allocate a data buffer for holding your analog output data. Set the buffersize
parameter to the value determined above. Also specify the general buffer location. The buffer start
location (address) is returned in the extended memory bufferhandle and conventional memory buffer
pointer parameters. After allocating the output buffer, call BUFAttachProcess to associate the buffer
with the DMA process you are performing. You do this by specifying the DMA processhandle,
obtained from DMAGetHandle or DMAHugeGetHandle, to BUFAttachProcess's processhandle
parameter. You must also identify the buffer's XMS bufferhandle, and conventional memory buffer
pointer to the call.
[9]
Use BUFEncode to translate and transfer your source data to the output buffer. The source data may
originate from an array of values you have created programmatically, or the source data can come from
another buffer which you may have allocated through another BUFAllocate call and filled with output.
The source data must be in common analog data format.
[10]
To start your analog output DMA process call DMAStart.
[11]
Next, the DMAStatus call can be used to check if a "Stop on Terminal Count" DMA process has
finished. For "Stop on Command" mode the DMA process must be stopped through the DMAStop
call. DMAStop can also be used to stop a Terminal Count mode process. DMA status and buffer
information is also returned after a call to DMAStop.
[12]
Before exiting your program, you must deallocate any buffers by using the BUFDeallocate call, and
"free" any DMA processhandles using the DMAFreeHandle call.
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Chapter 6: Analog Output
START
Call DMAGetHandle or DMAHugeGetHandle and
DMASetOptions to get a DMA process handle and to
set the DMA channel. The "process handle" is used in
many subsequent function calls.
Configure the selected Rate Generator
Call DMASetPacer to inform the software that the
selected Rate Generator is the pacer source.
To set the output voltage range(s), call AOConfigure
for each channel you will use. The range(s) specified
must match the board's jumper settings.
Call DMAConfigureList to program the DMA channel
list. You must specify the analog output I/O type
(AO_TYPE), set the list count (1 or 2), set the start
mode (DMA_START_COMMAND), select the stop
mode, set the clustercount (number of output
samples per channel). Use the clustersize value
returned by the call for calculating the size of the
DMA output buffer in the next step.
Call BUFAllocate to allocate a data buffer to hold
DMA output data. The buffersize, in bytes, must be
at least the clustersize*clustercount in length.
Call BUFAttachProcess to assign the buffer you have
just allocated to your DMA process.
Call BUFEncode to translate and transfer your source
data to the buffer just allocated. The source data must
be in common analog data format.
A
Figure 6.3 Flow Chart Example DMA Analog Output Process (1 of 2)
62
Chapter 6: Analog Output
A
Call DMAStart to enable the rate generator and initiate
the analog output DMA process.
Command
Terminal Count
Stop on Command
or Stop on Terminal Count?
Call DMAStop to terminate
Call DMAStatus
the DMA process
No
Is the
DMA Process
Done?
Yes
Prior to exiting, call BUFDeallocate to free the DMA
output buffer then call DMAFreeHandle to free the
DMA handle obtained in the first step of this procedure.
END
Figure 6.3 Flow Chart Example DMA Analog Output Process (2 of 2)
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Chapter 6: Analog Output
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64
Chapter 7: Counter
Chapter 7: Counter
7.1 Introduction
This chapter describes how to operate the PCI-20428W's 16-bit general purpose counter channel (Counter channel
0) using the Master Link Software Libraries. First an introduction to the counter circuitry is presented, followed
by information on programming the counter in its various modes.
7.2 Counter Circuit Description
PCI-20428W Low Cost Multifunction Boards contain an IntelR 8254 chip-based counter section. Two of the
three counter circuits on this chip are used for the Analog Input and Analog Output Rate Generators (discussed in
Chapter 9) and the third is available for general purpose use (Counter channel 0).
This general purpose counter channel has a clock input, a gate input, and an output line. All three of these TTLLevel compatible lines are available at the I/O signal connector of the board. The counter itself is a 16-bit
presettable down counter (i.e. a range of 0 to 65535), whose contents can be loaded and read back via software
function calls. A variety of counting, pulse and periodic output functions can be performed by the counter. A
brief listing of these functional modes is given in the following table. Detailed explanations are provided in
Section 7.3.
Table 7.1 Counter Modes
Mode
0
1
2
3
4
5
Description
Interrupt On Terminal Count
Hardware Retriggerable One-Shot
Rate Generator
Square Wave Generator
Software Triggered Strobe
Hardware Triggered Strobe
Note: When programmed at the hardware register level (see Appendix B), this counter can be used as a
"prescaler" to extend the lower end of the output pulse rate of the PCI-20428W's rate generator circuit(s). Master
Link software functions do not support the rate generator prescaler option. If you write your own code to use this
option, Counter channel 0 is not available for general purpose use.
7.3 Operational Modes
The various counter modes listed above are described in detail a little later in this section. First, the main 8254based counter Master Link Software calls are introduced.
7.3.1 Principal 8254 Counter Function Calls
The primary function calls used to control the board's general purpose counter are CTR8254Configure,
CTR8254Disable, CTR8254Enable and CTR8254Read.
CTR8254Configure is used to set the operating mode of the counter, and to define its initial count value. The
counter is left disabled (inactive) after the CTR8254Configure call is made.
The CTR8254Enable function writes the initial count value you specified in CTR8254Configure to the
counter. Writing the initial count value activates (enables) the programmed counter mode.
CTR8254Disable disables the counter by rewriting the mode information you specified in CTR8254Configure.
This produces the same end result as a CTR8254Configure call. The counter will be disabled until the initial
count value is reloaded by a call to the CTR8254Enable function. The proper external logic levels must be
65
Chapter 7: Counter
applied to the counter gate inputs for the CTR8254Disable and CTR8254Enable calls to work (see section
7.3.2).
CTR8254Read returns the counter's count value.
7.3.2 Counter Mode Descriptions
Except where noted, the following conditions apply to the detailed counter mode descriptions given in this
section.
1. The counter's CLOCK input is connected to a timebase signal, such as the Analog Input Rate Generator
output. A CLOCK pulse is defined as a TTL-level (0 to +5 V) Low-to-High transition followed by a High-toLow transition.
2. To demonstrate the operation of the GATE input, each of the mode diagrams is drawn with the assumption
that the counter is configured and enabled while the GATE input is held Low (disabling counting). Depending
on the programmed mode, a subsequent rising TTL-level GATE edge or High level enables counting.
Mode 0 Interrupt on Terminal Count
When a counter is configured for Mode 0 and loaded with an initial count N, the OUTPUT is set Low. It remains
Low until the counter reaches zero, then the OUTPUT goes High. The OUTPUT will go High again when Mode 0
is reprogrammed (by a new CTR8254Configure call, or by call to CTR8254Disable).
The counter is enabled when the GATE is High and disabled when the GATE is Low. Note that if the GATE is
High at the time a count N and the mode are set, the first clock pulse loads N into the counter and the next N clock
pulses count down the counter. This will make the OUTPUT go High N+1 clock pulses after the counter is
enabled by a CTR8254Enable call. If the GATE is Low when the counter is configured, as shown in the
diagram, the first clock pulse still loads N, but the counter does not count down until the GATE is High. Thus the
OUTPUT will go High N counts after the GATE goes High.
OUTPUT
N COUNTS
GATE INPUT
CLOCK INPUT
Mode 1 Hardware Retriggerable One-Shot
When a counter is configured for Mode 1 and an initial count N is loaded, the OUTPUT is set High. A rising
Figure 7.1 Counter Mode 0: Interrupt on Terminal Count
edge on the GATE input triggers the one-shot action. When the trigger occurs, the OUTPUT goes Low on the
next clock pulse. After N clock pulses, the OUTPUT goes High again until the next trigger comes along. If
another trigger occurs on the GATE before the OUTPUT goes Low, the OUTPUT will remain Low for an
additional N counts. That is, for each trigger occurring on the GATE, the counter is reloaded with N, and a new
cycle begins.
66
Chapter 7: Counter
OUTPUT
N COUNTS
GATE INPUT
CLOCK INPUT
Figure 7.2 Counter Mode 1: Hardware Retriggerable One-Shot
Mode 2 Rate Generator
When a counter is configured for Mode 2 and an initial count N is loaded, the OUTPUT is set High and stays
High until the counter is decremented to 1. On the last count the OUTPUT goes Low for one clock cycle (then
returns High). This sequence is repeated every N counts to produce an output that is a divide-by-N of the clock.
When the GATE is High, counting is enabled, Low disables counting. When the counter is disabled by a Low on
the GATE, the OUTPUT is set High. When the GATE goes from Low-to-High, the divide by N starts again.
Note: The initial count programmed in Mode 2 cannot be 1.
OUTPUT
ONE CLOCK CYCLE
GATE INPUT
N COUNTS
N COUNTS
CLOCK INPUT
Figure 7.3 Counter Mode 2: Rate Generator
Mode 3 Square-Wave Generator.
When a counter is configured for Mode 3 and an initial count N is loaded, the OUTPUT is initially set High and
stays High for N/2 clock cycles. The OUTPUT then goes Low for N/2 clock cycles and continuously repeats this
sequence. The result is a periodic square-wave output. If N is an odd number, the OUTPUT is High for (N+1)/2
counts and Low for (N-1)/2 counts. When the GATE is High, counting is enabled. Low disables counting. If the
GATE goes Low while the OUTPUT is Low, the OUTPUT is set High immediately. When the GATE is made
High, the counter is reloaded with the initial count N, on the next clock pulse. Note: The initial count
programmed in Mode 3 cannaot be 1.
67
Chapter 7: Counter
OUTPUT
GATE INPUT
CLOCK INPUT
Figure 7.4 Counter Mode 3: Square-Wave Generator
Mode 4 Software Triggered Strobe
The OUTPUT is set High when Mode 4 is configured by the CTR8254Configure call. The count N is loaded
and the counting sequence is "triggered" when a CTR8254Enable call is made. The OUTPUT goes Low
("strobes"), for one clock cycle N+1 clock pulses after this trigger. This sequence can be repeated by another
CTR8254Enable call. If a new CTR8254Enable call is made before the current count expires, the counter will
not strobe Low until the new count has expired (N+1 counts later). When the GATE is High, counting is enabled.
When the GATE is Low, counting is disabled. However, the state of the GATE input has no immediate effect on
the state of the OUTPUT. Note that in the illustration below, the GATE input was held Low during the time
CTR8254Enable was called.
OUTPUT
OUTPUT GOES LOW FOR
ONE CLOCK CYCLE
CTR8254Enable was called
sometime prior to the GATE
input going High.
GATE INPUT
N+1 COUNTS
CLOCK INPUT
Figure 7.5 Counter Mode 4: Software Triggered Strobe
Mode 5 Hardware Triggered Strobe
When CTR8254Configure is called to set Mode 5, the OUTPUT is set High. When CTR8254Enable is called,
the count N is loaded into the counter. A Low-to-High transition at GATE input will trigger the counter to begin
decrementing on the next clock input cycle. After N+1 clock pulses, the OUTPUT will go Low for one clock
cycle and return High. If another trigger is received before the counter has been decremented to zero, the counter
is reloaded and another sequence begins. The GATE input for this mode is used as a trigger and does not effect
counting or the OUTPUT level.
68
Chapter 7: Counter
OUTPUT
OUTPUT GOES LOW FOR
ONE CLOCK CYCLE
GATE INPUT
N+1 COUNTS
CLOCK INPUT
Figure 7.6 Counter Mode 5: Hardware Triggered Strobe
The following table summarizes each mode's, gate, counting, and output actions.
Table 7.2 Mode Summary Table
Mode
GATE
Initial Count
Counter
OUT
0
Continue
counting
down
LOW initially
HIGH after count 0
1
0
Continue
counting
down
HIGH initially
LOW
HIGH after count 0
Enable
counting
2
0
Reload initial
count
HIGH initially
LOW on count 1
HIGH after reload
Restart
counting
Enable
counting
by twos
2
0
Reload initial
count
Toggle OUT
HIGH initially
HIGH first half
LOW second half
Disable
counting
X
Enable
counting
1
0
Continue
counting
down
HIGH initially
LOW on count 0
X
Restart
counting
X
1
0
Continue
counting
down
HIGH initially
LOW on count 0
LOW
L to H
HIGH
Min. Max.
0
Disable
counting
X
Enable
counting
1
1
X
Restart
counting
Reset OUT
X
2
Disable
counting
OUT HIGH
Restart
counting
3
Disable
counting
OUT HIGH
4
5
7.4 Reading Counter Values and Status
The count value and counter status information of the counter can be read using the CTR8254Read call. The
count, returned in the call's data parameter, is a 32-bit number. The least significant 16-bits of this number
contain the counter's value. The status, returned in the call's status parameter, is a 16-bit number in which various
bits may indicate the existence of a particular condition on the counter channel. Named masks for the status word
are provided with the Master Link Software libraries. The most significant of these is CTR8254_NULL_CNT.
When this condition is reported, the count value returned is not valid. This indicates that the counter did not
receive a clock pulse after the counter was configured. The first pulse, whether the counter is enabled or not, is
used by the 8254 chip to load the initial count value into the counter channel.
The CTR8254Read call also has a reset flag that allows you to reset the counter value after the read operation.
69
Chapter 7: Counter
7.5 Programming Procedures
A flowchart for programming the counter and reading a count value is provided in Figure 7.7. Information on
each of the calls, including a description, the syntax, and a parameter list is provided in Appendix A.
Note, CTR8254Configure automatically disables the counter, thus, you need not call CTR8254Disable prior to
configuring the channel.
[1]
Use CTR8254Configure to select Counter channel 0, set the counter mode and define the initial count
value.
[2]
Call CTR8254Enable to write the initial count value and start the counter. The initial count is actually
loaded into the counter on the first clock pulse received after the enable call is made. The programmed
mode's GATE condition must also be satisfied before counting can begin.
[3]
If a count value is to be read, call CTR8254Read to get the count and the counter status. Check the
status information to test if the count value is valid. If the data is invalid, a clock pulse may have not
yet been received. Either re-read the counter until data is valid, or exit the procedure based on other
conditions.
START
Call CTR8254Configure to select Counter
0, set the mode, and define the initial
count value.
Call CTR8254Enable to load initial count
value and start the counter
Read the Counter
Value and Status?
Yes
Call CTR8254Read to read the
Counter Value and Status data.
No
No
Is the
Counter Value
Valid?
Yes
END
Figure 7.7 Flow Chart Programming and Reading Counter 0
70
Chapter 8: Digital I/O
Chapter 8: Digital I/O
8.1 Introduction
Each PCI-20248W Low Cost Multifunction Board provides 16 bits of buffered, TTL-level digital I/O. These
channels are configured as two 8-bit ports, one port dedicated for input and the other for output. The digital I/O
signals are available on the board's I/O connector at the back of the computer.
8.2 Digital I/O Circuit Description
Port 0 is an 8-channel (or 8-bit) input only port and port 1 is an 8-channel output only port. Port 0 input data is
not latched by the PCI-20428W. Reading port 0 will return whatever data is currently on the port's inputs. Output
data is latched by the PCI-20428W into port 1 during after a write operation. Data previously written to output
port 1 will remain in the latch until the next write operation. All of port 1's digital outputs are initialized to zero
on power-up.
Four functions are provided for digital I/O operations by the Master Link Software Libraries:
Digital I/O reads and writes are performed using the DIORead, DIOReadBit, DIOWrite and DIOWriteBit
functions. DIORead and DIOWrite reads or writes an 8-bit byte from or to an 8-bit digital I/O port.
DIOReadBit and DIOWriteBit reads or writes a single bit from/to a specified digital channel on a digital I/O
port.
8.3 Programming Procedures
Digital input and output procedures are given in written and flowchart form below. Information on each of the
digital I/O calls, including a description, format information and a parameter list, is provided in Appendix A.
8.3.1 Reading Digital Input Data
Below is a procedure for reading the PCI-20428W's digital input port (Port 0) or a channel on that port using the
DIORead or DIOReadBit calls. A flow chart is provided in Figure 8.1.
[1]
Call DIORead or DIOReadBit for Port 0 of the PCI-20428W to capture the values of all port-bits, or
the value of a specified port-bit. Note that in each case a 16-bit number (unsigned integer) is returned
in the call's data parameter. The port's or port-bit's value is contained in the least significant 8-bits (the
upper 8-bits are set to zero).
Note: The DIOConfigure function can optionally be called prior to the read call to explicitly
"configure" the port for input operation. Since each digital I/O port on the PCI-20428W has a fixed
directional sense, this call is not necessary. However, you may want to include this function in
program(s) if you need to adapt your code to other hardware with configurable digital I/O ports.
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Chapter 8: Digital I/O
START
Call DIORead or DIOReadBit to read all
port-bits or a specified port-bit of Port 0
END
Figure 8.1 Flow Chart: Reading Digital Input Data
8.3.2 Writing Digital Output Data
Below is a procedure for writing data to the PCI-20428W's digital output port (Port 1) or to a specific channel on
that port using the DIOWrite or DIOWriteBit calls. A flow chart is provided in Figure 8.2.
[1]
Call DIOWrite or DIOWriteBit for Port 1 of the PCI-20428W to set the values of all port-bits, or the
value of a specified port-bit. Note that in each case a 16-bit unsigned integer must be specified in the
call's data parameter.
Note: The DIOConfigure function can optionally be called prior to the write call to explicitly
"configure" the port for output operation. Since each digital I/O port on the PCI-20428W has a fixed
directional sense, this call is not necessary. However, you may want to include this function in
program(s) if you need to adapt your code to other hardware with configurable digital I/O ports.
START
Call DIOWrite or DIOWriteBit to write
data to all port-bits or a specified
port-bit of Port 1
END
Figure 8.2 Flow Chart Writing to a Digital Output Port
72
Chapter 9: Rate Generators
Chapter 9: Rate Generators
9.1 Introduction
A rate generator provides a source of evenly spaced pulses that can be used for a variety of tasks - A/D pacing,
D/A pacing, a source of clock pulses for the counter, etc. All versions of the PCI-20428W Board have a rate
generator for their analog input sections. The PCI-20428W-1 and -2 models also have a rate generator for their
analog output sections.
The Master Link Software Libraries support the PCI-20428W's rate generators for pulse mode or square-wave
operation.
9.2 Rate Generator Circuit Description
Rate generator channel 0 is the Analog Input Rate Generator for all PCI-20428W Boards. The Analog Input Rate
Generator output is available on the 50-pin I/O connector at the back of the computer. The Analog Input Rate
Generator is also internally connected to the A/D circuitry for use as a pacing signal, but may be disabled so the
board's External Input line can be used as a pacer source. Rate generator channel 1 is the Analog Output Rate
Generator for the analog output section on PCI-20428W-1 and -2 boards. The Analog Output Rate Generator is
not available externally. On PCI-20428W-1A and -2A boards, the Analog Output Rate Generator or the Analog
Input Rate Generator may be jumper selected (W39) as the analog output circuit’s rate generator source. This
allows analog input and analog output processes to be synchronized.
Rate generators and the general purpose counter (see Chapter 7) are implemented with a single IntelR 8254
integrated circuit. An on-board 8 MHz crystal oscillator provides the time base for rate generators. When
programmed using Master Link Software functions, the output frequency of each generator can range from 122 Hz
to 4 MHz. If the rate generator prescaler option is used (not supported by Master Link) the output frequency can
range from 0.00186 Hz to 2 MHz. You must supply your own driver software to implement this particular option
(see Appendix B). If the rate generator prescaler is used, Counter channel 0 must also be configured for rate
generator mode, and it will not be available as a general purpose counter.
9.3 Rate Generator Operation
The Analog Input Rate Generator's output is normally used as the pacer signal for the A/D converter when
acquiring data under DMA control (see Chapter 5), but is also available to pace D/A conversions (see Table 2.4
Chapter 2). This signal is also made available at the board's I/O connector for other purposes. The Analog
Output Rate Generator is available as a pacer signal for analog output DMA processes (see Chapter 6).
Either of a PCI-20428W-1's or a -2's rate generator channels may be independently configured for pulse mode or
square-wave operation to produce a periodic output signal. The RGConfigure function call is used to program
the mode and output frequency of the selected rate generator channel. The RGEnable and RGDisable functions
are used to enable and disable a selected rate generator channel.
9.3.1 Pulse Mode Operation
In this mode, the output of a rate generator is a stream of periodic active-high pulses, 125 ns wide, at the
programmed frequency. The selected rate generator's output frequency is the result of dividing the time base
frequency by a single integer. The integer is specified in the RGConfigure call under the parameter count1. The
output frequency is given by the formula:
Fout = 8 MHz / (count1)
where count1 is a an integer greater than or equal to 2, and less than or equal to 65535. From the above formula,
the output frequency can range from a maximum of 4 MHz to a minimum of 122 Hz.
73
Chapter 9: Rate Generators
Note: A utility function, FrequencyToRGCounts, is provided with Master Link which performs conversions
between frequencies and counts (passed to rate generators).
The operating mode of the selected rate generator is determined by the mode parameter of the RGConfigure call.
When the call's mode parameter is set to 2, the selected rate generator is configured for pulse operation. For
applications in which a rate generator is used to pace a PCI-20428W's A/D or D/A circuit, you should configure
the rate generator for pulse mode output.
9.3.2 Square-Wave Operation
When the mode parameter of the RGConfigure call is set to 3, the selected rate generator is configured for
square-wave output. The output frequency is still determined by the formula given earlier, but the high and low
portions of the waveform's cycle will be of equal duration.
The following diagram (Figure 9.1) shows pulse and square-wave output waveforms.
PULSE OUTPUT
(count1 * 125 ns)- 125 ns
SQUARE-WAVE
OUTPUT
125 ns
Period = count1 * 125 ns
Period/2
Period/2
Period = count1 * 125 ns
Figure 9.1 Pulse and Square-Wave Output Waveforms
9.3.3 Enabling and Disabling a Generator's Output
A rate generator is disabled and enabled by means of the RGDisable and RGEnable calls. Although it is
recommended that you disable a rate generator channel prior to calling RGConfigure, it is possible to reconfigure a rate generator channel at any time without first disabling it.
9.4 Programming Procedures
A sample procedure for programming a rate generator using Master Link Software Library functions is described
below and shown in Figure 9.2. Detailed information on each of the Rate Generator calls, including a description,
call format, and a parameter list is provided in Appendix A.
74
[1]
Call RGDisable to disable the selected rate generator channel (0 or 1) prior to configuring it. Channel
0 is the Analog Input Rate Generator and channel 1 is the Analog Output Rate Generator. (Note:
Disabling the rate generator prior to configuration is optional, but recommended to avoid unwanted
pulse generation.)
[2]
Call RGConfigure for the selected rate generator channel to set the mode and program the output
frequency. For pulse mode output set the mode parameter to 2, for square-wave output set mode to 3.
Set the integer value for count1 to program the desired generator frequency. Always set the count2
Chapter 9: Rate Generators
parameter to an integer value of 1 or 0. You can optionally call FrequencyToRGCounts to obtain a
count value, suitable for RGConfigure, based on a floating point frequency value.
[3]
Call RGEnable for the selected rate generator to enable it for its programmed mode.
START
Call RGDisable to disable the
selected rate generator
channel (0 or 1).
Call RGConfigure for the selected
channel to set the mode and
output frequency.
Call RGEnable to enable the
selected rate generator for its
programmed mode.
END
Figure 9.2 Flow Chart: Rate Generator Programming
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Chapter 9: Rate Generators
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76
Appendix A: Software Function Call Reference
Appendix A: Master Link Software Libraries Function Call Reference
A.1 General Information
The PCI-20369S and PCI-20485S Master Link Software Libraries and associated language interface files provide
high-level language support for most all Intelligent Instrumentation hardware devices. This includes Data
Acquisition Boards/Carriers and plug-in I/O Modules. The library functions allow you to write data acquisition
applications programs in the programming language of your choice.
PCI-20369S: DOS Language Support
•
•
•
•
•
Borland C++, 4.5 or higher
Microsoft C++, 7.0 or higher
Borland Turbo Pascal, 6.0
Borland Pascal, 7.0
Microsoft QuickBASIC, 4.5
PCI-20369S: Windows 3.x Language Support
•
•
•
•
•
Borland C++, 4.5 or higher
Microsoft C++, 7.0 or higher
Microsoft Visual Basic, 4.0 or higher
Borland Pascal, 7.0
Borland Turbo Pascal for Windows, 1.5
PCI-20485S: Win32 Language Support
•
•
•
Borland C++, 4.5 or higher
Microsoft Visual C++, 4.0 or higher
Microsoft Visual Basic, 4.0 or higher
The information presented in Appendix A covers only the software functions which are applicable to the PCI20428W Board, although the software package provides many other functions for different hardware devices. All
valid function call parameters are discussed. Using the supplied header files, and library files with your compiler
is discussed in the “README” files supplied with the software packages.
The remainder of Appendix A is organized into the following sections:
Section A.2
Section A.3
Section A.4
Section A.5
A general description of the function call format and some preliminary notes.
Required system configuration summary.
A tabular listing of all function calls, organized by function type.
Complete function call specifications, organized by functional category.
Note: A complete listing of all error and warning codes returned by the function calls are tabulated in the
ERRORS.TXT files found in the base directories of the installed driver libraries.
A.2 General Description and Preliminary Notes
In this appendix, calls are listed in functional categories which include; Analog Input, Analog Output, Buffer
support, Counters (8254-based), Digital I/O, DMA, Initialization, Rate Generators, and Thermocouple support.
The various interface and header files supplied with the library files contain function declarations, constants, and
data structure definitions which makes possible the interface between your application program and the functions
contained in the libraries.
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Appendix A: Software Function Call Reference
The interfaces for DOS based and all Windows based library functions are identical, so you need not learn
multiple sets of software calls to program for different environments. Any differences in the way functions or
variables are used in the different programming environments are noted in the call descriptions. Specific compiler
instructions are given in the software's "README" files.
The following sections discuss general features of the function calls such as format, common parameters, and
common data types.
A.2.1 Call Format
The library routines are accessed through simple function calls. For the purpose of consistency, all function call
specifications are presented using the C format of the function as follows:
int FunctionName (parameter, parameter, ...)
For verification purposes, all functions return an integer value which represents an error code. (For your reference,
all error codes and their meanings are listed in the ERRORS.TXT file.)
If the operation performed by the function was completely successful, the returned value will be 0 (zero). If an
error occurred, a positive error code value will be returned. If a non-critical error condition occurs, the function
may return a negative warning code value.
A listing of the function calls, showing call formats for all supported languages is given at the beginning of each
functional category in section A.5.
Function names should be entered into your application program exactly as indicated in the call specifications.
All parameters are shown in the order in which they should be passed. As explained in the next section, each
parameter is assigned a data type that identifies its input or output format and/or structure.
A.2.2 Common Call Parameters and Data Types
Several common parameters appear in most function calls. These are the slot, module position number, and
channel or port (in the case of digital I/O) to which the call is directed. Rules for determining valid slot, module,
and channel or port parameters values follow.
The Slot Parameter
Slot refers to the expansion slot number at which the call is directed. A slot number is assigned to a PCI-20428W
Board in the initialization section of your program through the SlotAssignIO function. The range of legal slot
numbers that can be passed in the slot parameter is 1 to 31. This range was established to reconcile possible
conflicts between EISA and ISA platforms:
For Extended Industry Standard Architecture (EISA) boards, legal values for the slot parameter are 1 to 15.
(Slot 0 is reserved for the host computer's motherboard.)
For Industry Standard Architecture (ISA) boards, such as the PCI-20428W Board, we recommend that you
assign slot numbers in the range of 16 to 31, whether you are using your board in an ISA or EISA Bus machine.
This will avoid any possible conflict between installed EISA and ISA boards if you are using an EISA system,
or if you decide to shift from an ISA to an EISA platform.
The Module Parameter
Module refers to the module position at which the call is directed. For the PCI-20428W Board the module
parameter must always be 0 (zero). Module position 0 always refers to a built-in function (such as a digital I/O
port, or an A/D) on a board. Other module position numbers refer to Plug-in PCI I/O Modules, which are not
physically supported by the PCI-20428W.
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Appendix A: Software Function Call Reference
The Channel/Port Parameters
For Analog Input, Analog Output, Counter, and Rate Generator calls, the channel parameter refers to the channel
on the board at which the function call is directed. For Digital I/O calls, this is the port parameter. To refer to an
individual "channel" on a port, the portbit parameter is used. Legal parameter values are simply determined by
the number of channels or ports available.
Data Types
In each call specification, every parameter is assigned a data type which indicates the required data format for the
parameter, or the format of returned data. Some of these parameters are given common data types, and some
require specially defined formats or data structures suited for the function being performed. The interface files
provided with the software package define these data types for you when you compile your program.
Some of the C language data types used in the function call parameter specifications of this appendix are listed
below. Most of the call parameters use standard data types like integers, and long integers. Other call parameters
use type definitions and structures found in the various interface files supplied with the software package.
Detailed explanations of these special types are covered in the applicable call specifications. You may wish to
review the definition syntax and rules of use for structured types in your compiler's reference manual.
Some Standard C Data Types Used by the Function Calls
Name
Description
int
long
*
double
char far *
indicates a 16-bit integer value
indicates a 32-bit integer value
indicates parameter is the address of a data value
double precision
character pointer type
Some Special Data Types Used by the Function Calls
Name
Description
IOSearchBoardTypeArray
ModInfoTypeArray
Format for returned data from a SlotSearchIO I/O-map search call.
Format for returned data from a SlotInquire system inquiry call.
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Appendix A: Software Function Call Reference
A.3 System Configuration Summary
Use of the Master Link Software Libraries for DOS and Windows 3.x requires the following:
1. An IBM Compatible PC or EISA Bus computer (for EISA board applications).
2. IBM DOS or MS-DOS version 3.1, or higher, and Microsoft Windows 3.x (version 3.1 or 3.11) if you are
programming Windows based applications. If you have extended memory, you will also need HIMEM.SYS,
QEMMTM, 386EMM, 386MAXTM or a similar extended memory driver to allocate XMS buffers.
3. One or more PCI-20428W Multifunction Boards as required for your application. (Master Link supports all
other PCI-20000 devices as well.)
4. You will also need the appropriate version of a supported compiler listed at the beginning of this chapter.
Use of the Master Link Software Libraries for Win32 requires the following:
1. An IBM Compatible PC (486 or better).
2. Microsoft Windows 95 or Windows NT (version 4.0 or higher).
3. One or more PCI-20428W Multifunction Boards as required for your application. (Master Link supports all
other PCI-20000 devices as well.)
4. You will also need the appropriate version of a supported compiler listed at the beginning of this chapter.
A.4 Function Call Summary
For your reference, a list of all PCI-20428W related function calls is provided below. Each functional call group
is listed alphabetically.
COMMAND
ANALOG INPUT
AIConfigureList(..)
AIRead(..)
ANALOG OUTPUT
AOConfigure(..)
AOWrite(..)
AOWriteGroup(..)
BUFFER
BUFAllocate(..)
BUFAttachProcess(..)
BUFDeallocate(..)
BUFDecode(..)
BUFEncode(..)
BUFMoveIn(..)
BUFMoveOut(..)
BUFSeek(..)
80
DEFINITION
Configure the analog input channel list for a specified DMA process
Configure and read a specified analog input channel and return one sample
Configure an analog output channel for a specified range
Write a given value to a specified analog output channel
Write values to each channel in a group of analog outputs simultaneously
Allocate a data buffer in conventional or extended memory
Attache a data buffer to a specific DMA process
De-allocate a previously allocated data buffer
Translate and transfer data from a source buffer to a destination buffer or local array
Encode and transfer data to a DMA buffer for a DMA output process
Transfer data from a source buffer to a destination buffer or local array
Transfer data to a DMA buffer for a DMA output process
Locate the current cluster pointer to a specific location in a DMA buffer for subsequent
encode or decode operations
COUNTERS, Intel 8254-Based
CTR8254Configure(..)
CTR8254Disable(..)
CTR8254Enable(..)
CTR8254Read(..)
CTR8254ReadGroup(..)
Configure the given 8254 counter channel with an initial count and a mode
Disable the specified 8254 counter channel
Enable the specified 8254 counter channel
Return count value and status of specified 8254 counter channel
Return count values and statuses of the specified 8254 counter group
DIGITAL INPUT/OUPUT
DIOConfigure(..)
DIORead(..)
Configure a digital I/O port for input or output
Read a specified digital I/O port
Appendix A: Software Function Call Reference
DIOReadBit(..)
DIOWrite(..)
DIOWriteBit(..)
Read a specified bit in a digital I/O port
Write a value to a digital I/O port
Write a value to specified bit in a digital I/O port
DIRECT MEMORY ACCESS (DMA)
DMAConfigureList(..)
Configure the channel list for a specified DMA process
DMAFreeHandle(..)
Free the specified DMA process handle
DMAGetHandle(..)
Allocate a handle to a DMA process
DMAHugeGetHandle(..)
Allocate a handle to a huge (>64K) windows DMA process
DMASetOptions(..)
Set the options for the specified DMA process
DMASetPacer(..)
Identify the pacer source for a specified DMA process
DMAStart(..)
Start a specified DMA process
DMAStatus(..)
Get the status and buffer information of the specified DMA process
DMAStop(..)
Stop the specified DMA process and get the status and buffer information
INITIALIZATION
HWInit(void)
RegisterClient(..)
SWInit(void)
SWReset(void)
SlotAssignIO(..)
SlotInquire(..)
SlotSearchIO(..)
UnregisterClient(..)
drivers.
IncludeXXXX(void)
RATE GENERATOR
RGConfigure(..)
RGDisable(..)
RGEnable(..)
Initialize the data acquisition hardware
Windows 16-bit and 32-bit applications only. Registers an application instance with the drivers.
Initialize the Software Libraries
Reset the Software Libraries initialization (cancels SWInit and HWInit)
Assign a slot number to an I/O-mapped ISA data acquisition board.
Return information about the PCI hardware configuration of a specified slot
Search for PCI I/O-mapped boards and return the number of boards found and information
about each board
Windows 16-bit and 32-bit applications only. Unregisters an application instance with the
Include support for the specified Hardware and specical software functions in program
Configure the given rate generator channel with rate parameters and a mode
Disable specified rate generator channel
Enable specified rate generator channel
THERMOCOUPLE MEASUREMENT
TCLinearize(..)
Convert voltage data from a thermocouple channel to a temperature
TCMeasure(..)
Perform a temperature measurement from analog input channels connected to a
thermocouple, cold-junction reference and zero reference
UTILITY FUNCTIONS
CountsToVolts
FrequencyToRGCounts
VoltsToCounts
Converts a count value (from AIRead) to a floating point voltage value
Computes count1 parameter for use in the RGConfigure call
Converts a voltage value to a count value for use in "AOWrite" calls
A.5 Function Call Specifications
When examining these function calls, please refer to section A.2 for general parameter definitions. Be sure to
read the following notes on this section.
Notes on the Organization of Section A.5:
In this section function call groups (Analog Input Function Calls, Analog Output Function Calls, Counters, etc.)
are listed in alphabetical order. In general, the calls as a whole are listed in alphabetical sequence as well.
At the start of each category is a listing of the function calls described in that particular call group. Function call
specifications and descriptions are represented in C function format. The corresponding parameter names and
meanings in other language formats may be quickly translated by referring to and comparing the specific format(s)
listed in the beginning section of each call group.
Note for MicrosoftR Visual Basic users: The parameter descriptor "SEG", used in many BASIC language
function calls listed at the start of each section is not valid in Visual Basic. To obtain the Visual Basic
representation of a call from the BASIC one listed, simply take out the "SEG" portion of the specific parameter
name.
Example code segments are given at the end of various call specifications and function call sections showing how
the calls can be used in a program. Also, be sure to examine the sample programs for more detailed examples.
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Appendix A: Software Function Call Reference
Notes on Specification Structure and Notational Conventions:
Call specifications start with a C function listing, followed by a general description of the call. References to any
other calls that may be interrelated or interdependent with the call being described are also made. Sub-topics are
also elaborated upon where appropriate in the call description section.
The call description is followed by a listing of the parameter descriptions. All call parameters are italicized, and
parameter constant names appear in all CAPITAL letters (just as they are declared in the language header files).
Note for MicrosoftR QuickBASIC users: In QuickBASIC only, "_" (underscores) in constant names are replaced
by "." (period or dot), as the underscore is not allowed by QuickBASIC in symbolic names.
Note for MicrosoftR Visual Basic users: The names of function calls for Visual Basic have a "%" character added
to them for Windows 16-bit calls and a “&” for Win32 calls. This character informs Visual Basic that the calls
each return an integer error code. Also, this character indicates that a parameter is an integer type (“%” for 16-bit
integers and “&” for 32-bit integers). Note that Win32 call parameters use “&” for integers. Remember to
include this extra character when entering function names. Failure to do so may cause Visual Basic to generate a
redefinition error. This error indicates that Visual Basic already has a function of the name that you have used
(AIRead%, for example and is flagging an attempt to call another function with the same name but a different
type (if you type AIRead with no %, for example).
In addition, any information structure formats are shown in small type, and appear exactly as they do in the C
language header file (PCITYPE.H for DOS, or PCITYPEW.H for Windows). Information structures are not
presented in this reference section for all languages. The exact representations of these structures for function
declarations can be found in PCICONS.H for C (DOS), PCICONSW.H for C (Windows), PCICONS.P for Pascal
(DOS), PCICONSW.P for Pascal (Windows), PCI.B for QuickBASIC, and PCIW.B for Visual Basic.
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Appendix A: Software Function Call Reference
A.5.1 Analog Input
AIConfigureList
Configure the analog input channel list for a specified DMA process
C
Pascal
BASIC
int AIConfigureList (int handle, int burstmode, int triggermode, unsigned long
triggerdelay, int count, AIListType far *list, int far *clustersize);
function AIConfigureList (handle, burstmode, triggermode: Integer;
triggerdelay: Longint; count: Integer; var list: AIListType; var clustersize:
Integer): Integer;
FUNCTION AIConfigureList% (BYVAL hnd%, BYVAL burstmode%, BYVAL trigmode%,
BYVAL trigdly&, BYVAL cnt%, SEG ailist AS AIListType, SEG clustsiz%)
AIRead
Configure and read a specified analog input channel and return one sample
C
Pascal
BASIC
int AIRead (int slot, int module, int channel, int zchannel, int gain, int
range, int differential, int far *data);
function AIRead (slot, module, channel, zchannel, gain, range, differential:
Integer; var data: Integer): Integer;
FUNCTION AIRead% (BYVAL slot%, BYVAL mdl%, BYVAL chn%, BYVAL zchn%, BYVAL
gain%, BYVAL range%, BYVAL diff%, SEG aidata%)
AIConfigureList
int AIConfigureList (int processhandle, int burstmode, int triggermode, unsigned
long triggerdelay, int count, AIListType far *list, int far *clustersize)
Call Description
This call is used to configure the analog input channel list for the analog input DMA process identified by the
processhandle parameter. The processhandle is obtained using a "DMAGetHandle" function. The
AIConfigureList call is always used in conjunction with the DMAConfigureList call.
Parameter Descriptions
processhandle
the DMA process handle obtained from a DMAGetHandle or DMAHugeGetHandle call. Each DMA process
must have an assigned handle.
burstmode
burstmode flag. This feature does not apply to the PCI-20428W. Set this parameter to "0" (FALSE).
triggermode
triggermode flag. This feature does not apply to the PCI-20428W. Set this parameter to "0" (FALSE).
triggerdelay
triggerdelay value. This feature does not apply to the PCI-20428W, specify 0 (zero) in this parameter.
count
number of list elements in the channel list. For the PCI-20428W, the maximum number of channels you may
specify on the list is 16 for single-ended input operation or 8 for differential input operation. You must pass the
number of items in your list in this parameter, and the jumper settings must match the input configuration.
83
Appendix A: Software Function Call Reference
list
the analog input channel list array. The analog input channel list is an array of elements where each element has
the following format:
/*
* Analog input channel list structure
*/
typedef
struct AIListType {
int slot;
int module;
int channel;
int gain;
int range;
int differential;
} AIListType;
/*Slot
/*Module
/*Channel
/*Gain
/*Range code
/*Differential flag
*/
*/
*/
*/
*/
*/
PCI-20428W analog input channel list elements must be specified in consecutive order with no gaps. The board’s
channel scanner works by stepping through channels 0 through N in sequential increasing order, where N is the
ending channel. All channels on the list, must use the same gain, range and input configuration (differential or
single-ended). The board's jumper settings must match the range and input configuration specified.
The meanings of each channel list element specification are given below.
Slot
assigned slot number of the PCI-20428W Board.
Module
module position number. For the PCI-20428W, the number must be 0 (zero).
Channel
the number of the analog input channel you want to sample (see above restrictions).
Gain
gain at which to read the channel. Valid gains for the PCI-20428W-1 are 1, 10 or 100. Gains of 1, 2, 4
or 8 are valid for the PCI-20428W-2. A gain of 1 is valid for the PCI-20428W-3.
Range code
analog input range at which to read the channel. Input ranges of ±5V, ±10V, 0-5V and 0-10V are
jumper-selectable. The input range code must be the same for all channels in the list.
Range codes are:
UNIPOLAR_5 = 0 - 5 V
UNIPOLAR_10 = 0 - 10 V
BIPOLAR_10 = ±5 V
BIPOLAR_20 = ±10 V
Differential flag
differential input flag, "1" = differential mode, "0" = single-ended. This flag must be the same for all
channels on the list and board jumper settings must match the configuration by this parameter. For the
PCI-20428W-3 this flag must be set to "0".
clustersize
number of "bytes per cluster" returned by the call. This value is equal to the number of data bytes that will be
generated as a result of sampling all analog channels on the channel list once.
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Appendix A: Software Function Call Reference
AIRead
int AIRead (int slot, int module, int channel, int zchannel, int gain, int range,
int differential, int far *data)
Call Description
This function reads the specified analog input channel with the specified gain and range. An optional zero
reference channel may be specified as well. The jumper selected range and input configuration and this call's
parameters must match. The result is returned in the data parameter in common analog data format.
Parameter Descriptions
slot
assigned slot number of the PCI-20428W Board.
module
module position number. For the PCI-20428W, the number must be 0 (zero).
channel
channel number of the analog input channel to be read.
zchannel
zero-reference channel number or AI_NO_ZERO for none. The value read from the specified zero-reference
channel will be subtracted from the value read from that specified in channel. The result is returned in data.
gain
gain at which to read the channel. Valid gains for the PCI-20428W-1 are 1, 10 or 100. Gains of 1, 2, 4 or 8 are
valid for the PCI-20428W-2. A gain of 1 is valid for the PCI-20428W-3.
range
analog input range at which to perform the read. Input ranges of ±5V, ±10V, 0-5V and 0-10V are jumperselectable. One of the following codes may be specified:
UNIPOLAR_5 = 0 - 5 V
UNIPOLAR_10 = 0 - 10 V
BIPOLAR_10 = ±5 V
BIPOLAR_20 = ±10 V
differential
flag indicating whether the channel is configured for differential or single-ended input configuration. Set this
parameter to "1" (TRUE) for differential or "0" (FALSE) for single-ended input. Board jumper settings and the
parameter value must match. For the PCI-20428W-3 this parameter must be set to "0".
data
the data value read from the channel in common analog data format. The range of the data is dependent upon
the range for which the channel was configured. If a bipolar input range (±5 V or ±10 V) is used, the data
values will be from -32768 to 32767. If a unipolar input range (0-10 V or 0-5 V) is used the data values will be
from 0 to 65535. The CountsToVolts utility function can be used to convert common format data to floating
point voltage values.
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Appendix A: Software Function Call Reference
A.5.2 Analog Output
AOConfigure
Configure an analog output channel for a specified range
C
Pascal
BASIC
int AOConfigure (int slot, int module, int channel, int range);
function AOConfigure (slot, module, channel, range: Integer): Integer;
FUNCTION AOConfigure% (BYVAL slot%, BYVAL mdl%, BYVAL chn%, BYVAL range%)
AOWrite
Write a given value to a specified analog output channel
C
Pascal
BASIC
int AOWrite (int slot, int module, int channel, int data);
function AOWrite (slot, module, channel, data: Integer): Integer;
FUNCTION AOWrite% (BYVAL slot%, BYVAL mdl%, BYVAL chn%, BYVAL aodata%)
AOWriteGroup
Write values to each channel in a group of analog outputs simultaneously
C
Pascal
BASIC
int AOWriteGroup (int slot, int module, int far *data);
function AOWriteGroup (slot, module: Integer; var data: Integer): Integer;
FUNCTION AOWriteGroup% (BYVAL slot%, BYVAL mdl%, SEG aodata%)
AOConfigure
int AOConfigure (int slot, int module, int channel, int range)
Call Description
This call configures the given analog output channel on a PCI-20428W-1 or -2 for the specified range. Even
though the board uses jumpers to set output ranges, the AOConfigure call is required to inform the AOWrite and
AOWriteGroup calls of the proper data formats.
Parameter Descriptions
slot
assigned slot number of the PCI-20428W-1 or -2 Board.
module
module position number. For a PCI-20428W Board, the number must be 0 (zero).
channel
channel to configure. Valid channel numbers are 0 or 1.
range
range for which to configure the channel. The parameter value must match the jumpered value. Use one of the
following codes:
UNIPOLAR_5 = 0 - 5 V
UNIPOLAR_10 = 0 - 10 V
BIPOLAR_10 = ±5 V
BIPOLAR_20 = ±10 V
86
Appendix A: Software Function Call Reference
AOWrite
int AOWrite (int slot, int module, int channel, int data)
Call Description
This call writes the value given in data to the specified analog output channel on a PCI-20428W-1 or -2 Board.
Parameter Descriptions
slot
assigned slot number of the PCI-20428W-1 or -2 Board.
module
module position number. For a PCI-20428W Board, the number must be 0 (zero).
channel
channel to write. Valid channel numbers are 0 and 1.
data
data value to write to the channel. The data must be specified in common analog data format, and is dependent
upon the range for which the channel was configured in AOConfigure. If a bipolar input range (±5 V or ±10
V) is used, the data values must be from -32768 to 32767. If the unipolar input range (0-10 V) is used the data
values must be from 0 to 65535. The VoltsToCounts utility function can be used to convert floating point
voltage values to common format data suitable for this parameter.
AOWriteGroup
int AOWriteGroup (int slot, int module, int far *data)
Call Description
This call writes analog output values to each channel on a PCI-20428W-1 or -2 Board simultaneously.
Parameter Descriptions
slot
assigned slot number for the PCI-20428W Board.
module
module position number. For the PCI-20428W, the number must be 0 (zero).
data
array of data to write to the channels in the group. The array must have two elements, one for each analog
output channel (0 and 1) on the PCI-20428W. Also, the data must be specified in common analog data format,
and is dependent upon the range for which the device was configured in AOConfigure. The VoltsToCounts
utility function can be used to convert floating point voltage values to common format data suitable for this
parameter. (Also see the data parameter description for the AOWrite call.)
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Appendix A: Software Function Call Reference
A.5.3 Buffer Management
BUFAllocate
Allocate a data buffer in conventional or extended memory
C
Pascal
BASIC
int BUFAllocate (int location, int XMSflag, unsigned long buffersize, unsigned
long far *bufferhandle, char far * far *buffer);
function BUFAllocate (location, XMSflag: Integer; buffersize: Longint; var
bufferhandle: Longint; var buffer: POINTER): Integer;
FUNCTION BUFAllocate% (BYVAL location%, BYVAL XMSflag%, BYVAL bufsiz&, SEG
bufhnd&, SEG buffer&)
BUFAttachProcess
Attach a data buffer to a specific DMA process
C
Pascal
BASIC
int BUFAttachProcess (int processhandle, unsigned long bufferhandle, char far
*buffer, BufInfoType far *info);
function BUFAttachProcess (processhandle: Integer; bufferhandle: Longint;
buffer: POINTER; var info: BufInfoType): Integer;
FUNCTION BUFAttachProcess% (BYVAL prchnd%, BYVAL bufhnd&, BYVAL buffer&, SEG
info AS BufInfoType)
BUFDeallocate
Deallocate a previously allocated data buffer
C
Pascal
BASIC
int BUFDeallocate (unsigned long bufferhandle, char far *buffer, unsigned long
buffersize);
function BUFDeallocate (bufferhandle: Longint; buffer: POINTER; buffersize:
Longint): Integer;
FUNCTION BUFDeallocate% (BYVAL bufhnd&, BYVAL buffer&, BYVAL bufsiz&)
BUFDecode
Translate and transfer data in a DMA buffer to a destination buffer
C
Pascal
BASIC
int BUFDecode (unsigned long sourcehandle, char far *source, unsigned long
destinationhandle, char far *destination, BufInfoType far *info, unsigned long
count, unsigned long far *xcount);
function BUFDecode (sourcehandle: Longint; source: POINTER; destinationhandle:
Longint; destination: POINTER; var info: BufInfoType; count: Longint; var
xcount: Longint): Integer;
FUNCTION BUFDecode% (BYVAL srchnd&, BYVAL src&, BYVAL dsthnd&, SEG dst%, SEG
info AS BufInfoType, BYVAL count&, SEG xcount&)
BUFEncode
Encode and transfer data to a DMA buffer for a DMA output process
C
Pascal
BASIC
int BUFEncode (unsigned long sourcehandle, char far *source, unsigned long
destinationhandle, char far *destination, BufInfoType far *info, unsigned long
count, unsigned long far *xcount);
function BUFEncode (sourcehandle: Longint; source: POINTER; destinationhandle:
Longint; destination: POINTER; var info: BufInfoType; count: Longint; var
xcount: Longint): Integer;
FUNCTION BUFEncode% (BYVAL srchnd&, SEG src%, BYVAL dsthnd&, BYVAL dst&, SEG
info AS BufInfoType, BYVAL count&, SEG xcount&)
BUFMoveIn
Same as BUFEncode except no translation of data from common-format to native-format
C
Pascal
BASIC
88
int BUFMoveIn (unsigned long sourcehandle, char FAR *source, unsigned long
destinationhandle, char FAR *destination, BufInfoType FAR *info, unsigned long
count, unsigned long FAR *xcount);
function BUFMoveIn (sourcehandle: Longint; source: Pointer; destinationhandle:
Longint; destination: Pointer; var info: BufInfoType; count: Longint; var
xcount: Longint): Integer;
FUNCTION BUFMoveIn% (BYVAL srchnd&, SEG src%, BYVAL dsthnd&, BYVAL dst&, SEG
info AS BufInfoType, BYVAL count&, SEG xcount&)
Appendix A: Software Function Call Reference
BUFMoveOut
Same as BUFDecode except no translation of data from native-format to common-format
C
int BUFMoveOut (unsigned long sourcehandle, char FAR *source, unsigned long
destinationhandle, char FAR *destination, BufInfoType FAR *info, unsigned long
count, unsigned long FAR *xcount);
function BUFMoveOut (sourcehandle: Longint; source: Pointer;
destinationhandle: Longint; destination: Pointer; var info: BufInfoType;
count: Longint; var xcount: Longint): Integer;
FUNCTION BUFMoveOut% (BYVAL srchnd&, BYVAL src&, BYVAL dsthnd&, SEG dst%, SEG
info AS BufInfoType, BYVAL count&, SEG xcount&)
Pascal
BASIC
BUFSeek
Locate the cluster pointer to a specifc location in a DMA buffer
C
int BUFSeek (int origin, BufInfoType far *info, long count, unsigned long
bufferhandle, char far *buffer);
function BUFSeek (origin: Integer; var info: BufInfoType; count, bufferhandle:
Longint; buffer: POINTER): Integer;
FUNCTION BUFSeek% (BYVAL origin%, SEG info AS BufInfoType, BYVAL count&, BYVAL
bufhnd&, BYVAL buffer&)
Pascal
BASIC
BUFAllocate
int BUFAllocate (int location, int XMSflag, unsigned long buffersize, unsigned long
far *bufferhandle, char far *far *buffer)
Call Description
Whenever you prepare a DMA process for a DMA analog input or output transfer, you must allocate buffer
memory. Buffers are required to receive DMA input data, or to store data prior to a DMA output transfer. Once
you know how much memory you need, you can use the BUFAllocate call to reserve a buffer.
The BUFAllocate call can be used to allocate a data buffer in the location and with the specified buffersize in
either conventional or extended memory. If the data buffer is placed in conventional memory a pointer to the data
buffer is returned in the buffer parameter. If the buffer is placed in extended memory, by setting the XMSflag to
"1" (TRUE), an extended memory bufferhandle is returned. For most applications on machines with extended
memory, you will want to use the XMSflag to allocate buffers above 1 Mbyte (set XMSflag to 1). Note: Always
set XMSflag to "1" for Windows (3.x, 95, NT) applications.
In your program, the BUFAllocate call should be made after a DMAConfigureList call. This sequence is
recommended since DMAConfigureList returns a value, called "clustersize", that will help you determine the
minimum buffersize required for your DMA transfer.
Parameter Descriptions
location
buffer location. The following buffer flags can be used for PCI-20428W applications:
ALLOC_ANYWHERE = Locate buffer anywhere in conventional or extended memory. Use this
option for EISA Bus computer DOS or Windows 16-bit applications.
ALLOC_IN_64K = Locate a buffer inside a 64 kbyte page block. Use this option for ISA Bus
computer DOS applications, or Windows 16-bit DMA applications which require less than 64 kbytes of
buffer space.
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Appendix A: Software Function Call Reference
ALLOC_ON_64K = Locate a buffer starting on a 64 kbyte page boundary. This option should be used
for DMA "Swap" buffers in DOS applications only, see the DMASwap call description.
ALLOC_NO_LOCK = Allocate buffer anywhere but don't lock the buffer in physically contiguous
memory. This flag should be used for any Windows (3.x, 95, NT) DMA processes that require greater
than 64 kbytes of data. Such a process is termed a Huge DMA process, and requires that you acquire a
DMA process handle using the DMAHugeGetHandle function. Also, use this option all of the time
for Windows NT computers.
Specifying "ALLOC_ANYWHERE" in conventional or extended memory areas will suffice for your EISA
based applications. The second and third buffer location flags, ALLOC_IN_64K and ALLOC_ON_64K, are for
Software Library compatibility with IBM PC/XT/AT (e.g. ISA Bus) machines, which have limitations on where
and how large a DMA buffer can be. For EISA Bus machines, these limitations do not apply.
If you are writing a DOS application that must operate on both ISA and EISA platforms, you must use the
"ALLOC_IN_64K" buffer location flag. Because of the internal design of ISA computers, a DMA process
cannot automatically transfer data into or out of a buffer which crosses a 64 kbyte page boundary. The
"ALLOC_IN_64K" option is used to allocate within a 64 kbyte page. You may use this option to locate a buffer
(less than 64 kbytes long) for ISA DOS or Windows applications.
Notes for Windows Users:
1. If BUFAllocate is called and error 15300 is returned, 65520 (bytes) is the maximum possible buffer
size for "ALLOC_IN_64K". "ALLOC_ON_64K" will not work in this case!
2. Always use "ALLOC_NO_LOCK" if the DMA process uses more than 64 kbytes of data (a huge
DMA process). Always use this flag for Windows NT applications. Also see the
DMAHugeGetHandle call.
XMSflag
extended memory flag. This parameter applies to DOS based applications. Always set XMSflag to "1" for any
Windows based applications. Setting this parameter to "0" (FALSE), indicates you want to allocate a buffer in
conventional memory (0 to 640 Kbyte area). Setting this parameter to "1" (TRUE) will allow you to allocate a
buffer in extended memory, if you have an 80286 (or higher) system and extended memory. You need an XMS
2.0 compliant memory driver for the Master Link Software Libraries to allocate extended memory.
HIMEM.SYS. QEMM.SYS, and 386MAX.SYS all manage XMS memory in a compatible manner (see
Appendix F).
For DOS based applications, if you allocate a buffer in extended memory (above 1 Mbyte area), BUFAllocate
returns the XMS memory handle allocated through the XMS driver in bufferhandle (see below). In this case, the
return value in the parameter buffer (see below) is 0.
If you allocate a buffer in conventional memory (0 to 640 kbyte area), the BUFAllocate call returns (in the
buffer parameter) the buffer start address (and sets bufferhandle to 0).
Windows note: bufferhandle is "0" for Windows applications, even when XMSflag is set to "1".
buffersize
buffer size in bytes. Set the buffersize parameter to the value determined from the clustersize and clustercount
values as explained below.
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Appendix A: Software Function Call Reference
From the clustersize value obtained from the DMAConfigureList call, determine the buffersize you will need
(in bytes) from the following:
buffersize (in bytes) = clustersize x clustercount
Where clustercount is the number of passes through the DMA channel list you want to acquire or output (as
specified to the DMAConfigureList call). A cluster is defined as the amount of data transferred in one
complete pass of the channel list.
bufferhandle
the returned extended memory handle (from the XMS driver). Also see the XMSflag description above.
buffer
the returned conventional memory buffer address. Also see XMSflag description above.
BUFAttachProcess
int BUFAttachProcess (int processhandle, unsigned long bufferhandle, char far
*buffer, BufInfoType far *info)
Call Description
This call attaches a buffer to a DMA process. The DMA process is identified by the processhandle (obtained
through a "DMAGetHandle" call). The buffer is identified by a bufferhandle if the buffer is located in extended
memory, or by a buffer pointer for a buffer located in conventional memory. The extended memory bufferhandle,
and conventional memory buffer pointer are obtained through the BUFAllocate call.
The BUFAttachProcess function must be called before data can be decoded from a DMA Buffer (using
BUFDecode), or encoded into a DMA data buffer (using BUFEncode).
Parameter Descriptions
processhandle
DMA process handle (see the DMAGetHandle or DMAHugeGetHandle call).
bufferhandle
XMS buffer handle obtained from BUFAllocate, or 0 if you have allocated a conventional memory buffer for
the DMA process or a buffer in a Windows application.
buffer
the conventional memory buffer pointer obtained from BUFAllocate.
info
buffer information. The buffer information structure has the following format:
Buffer Information Structure
/*
* Buffer information structure
*/
typedef
struct BufInfoType {
short wrap;
short running;
short bytespercluster;
short framespercluster;
long size;
long count;
/*
/*
/*
/*
/*
/*
Latched buffer wrap flag. */
Process running flag. */
Number of bytes per cluster. */
Number of frames per cluster. */
Buffer size in clusters. */
Number of clusters available
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Appendix A: Software Function Call Reference
long currentcluster;
long triggercluster;
long nextcluster;
unsigned long DMAword;
unsigned long DMAaddr;
void FAR *command;
short unlatchedwrap;
} BufInfoType;
/*
/*
/*
/*
/*
/*
/*
for decoding/encoding. */
Current cluster. */
Trigger cluster. */
Next decode/encode cluster. */
Current DMA word count. */
Current DMA address. */
Decode/encode command pointer. */
Unlatched buffer wrap flag. */
The info variable data structure is defined for you in the Master Link header files. The same info structure is
passed with all calls using this variable in a program; BUFAttachProcess, BUFDecode, BUFEncode,
BUFSeek, DMAStatus and DMAStop. All of the buffer information items are updated when the DMAStatus,
or DMAStop functions are called.
NOTE: Buffer information items are adjusted and maintained by the Software Library - DO NOT ALTER
ANY OF THESE VALUES!
wrap - Latched buffer wrap flag
A "1" here indicates a circular buffer arrangement was used and that the buffer wrapped around (a full
buffer of data was acquired). "0" indicates a that no "wrap" has taken place. Also, wrap is "1" at the
termination of a DMA "stop on terminal count" mode. This is a “latched” wrap flag.
running - Process running flag
"1" = DMA process is active. "0" = DMA process inactive.
bytespercluster - Number of bytes per cluster
The number of bytes transferred in one pass of the DMA channel list for this process.
framespercluster - Number of frames per cluster
Number of data frames that make up a cluster for this DMA process. The number of frames per cluster
is always 1 for a DMA transfer using a PCI-20501C-1 or PCI-20501C-2 High-Performance EISA
Board. For other Boards this value may be different. (See the DMAConfigureList call.)
size - Buffer size in clusters
A cluster (in bytes) is the amount of data transferred in one complete pass of the DMA channel list (see
the DMAConfigureList call). The size of the buffer in bytes is equal to: (bytespercluster * size).
count - Available decode/encode cluster count
Indicates the number of complete clusters available for decoding or encoding (encoding applies to the
BUFEncode call). This value indicates the number of complete clusters transferred, or the number
which the buffer will hold (clustercount), whichever is smaller.
currentcluster - Current cluster
"Current cluster" points to the location in the buffer at which the next cluster will be transferred by
DMA.
triggercluster - Trigger cluster
"Trigger cluster" points to the first complete cluster that was transferred after a trigger was detected
when running in trigger mode.
nextcluster - Next cluster
"Next cluster" points to the next cluster for decoding or encoding, or it points to the cluster sought as
the result of a BUFSeek call. Note: If the DMA process is running the Next cluster equals the Current
cluster.
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Appendix A: Software Function Call Reference
DMAword - Current DMA word count
The actual word transfer count in the host computer's DMA controller. At the start of the DMA
process, this is equivalent to the buffer length in words.
DMAaddr - Current DMA address
The actual DMA address in the host computer's DMA controller. At the start of the DMA process, this
address is the buffer start address.
unlatchedwrap - Unlatched buffer wrap flag
This is an unlatched version of the wrap flag above.
Note, the info variable is user-allocated - the data structure is defined for you in the Master Link header files. The
function calls just set or maintain info's field values.
BUFDeallocate
int BUFDeallocate (unsigned long bufferhandle, char far *buffer, unsigned long
buffersize)
Call Description
This call frees a buffer previously allocated with the BUFAllocate function.
Whenever you allocate a buffer, you should always deallocate it with the BUFDeallocate call before you exit your
program. Failing to do so may cause problems with other applications that use the same memory areas.
Parameter Descriptions
bufferhandle
extended memory handle or 0 for conventional buffer pointer or Windows buffer. Also see BUFAllocate call
description.
buffer
the conventional memory buffer pointer obtained from BUFAllocate.
buffersize
buffersize, in bytes, of the buffer to be deallocated.
BUFDecode
int BUFDecode (unsigned long sourcehandle, char far *source, unsigned long
destinationhandle, char far *destination, BufinfoType far *info, unsigned long
count, unsigned long far *xcount)
Call Description
The purpose of the BUFDecode function is to convert analog input data acquired in a DMA input process into
common analog data format (see the AIRead description). This function provides overall consistency when
dealing with input data.
The BUFDecode call decodes and transfers a specified number of data units (clusters) from a source buffer to a
destination array or buffer you specify. Before you can decode a buffer, you must call BUFAttachProcess to
associate the DMA process with the buffer.
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Appendix A: Software Function Call Reference
Before you call BUFDecode, you will typically use the BUFSeek function to first locate a specific data cluster in
the original DMA Buffer. Note, a data cluster is the data transferred in a complete pass through the DMA channel
list (see the DMAConfigureList call). BUFDecode is then called to format the data from the location and put it
in the local destination array or buffer. After a call to BUFDecode, the "next cluster location pointer" in the
buffer info array is updated to the end of the data decoded.
Parameter Descriptions
sourcehandle
source buffer extended memory handle obtained from the BUFAllocate call. If you allocated a conventional
memory buffer or a buffer under Windows, sourcehandle should be set to 0 (zero).
source
pointer to the conventional memory buffer obtained from the BUFAllocate call. If you allocated an extended
memory buffer, source should be set to 0 (zero).
destinationhandle
destination buffer handle for decoded data. Set destinationhandle to 0 (zero) if a local array is used or a
conventional memory buffer is used as the destination. The local array elements should be 16-bit integers for
common format analog data.
destination
pointer to destination buffer or array for decoded data. The local array elements should be 16-bit integers for
common format analog data. Set destination to 0 (zero) if an extended memory buffer is used as the destination.
info
buffer information. Buffer information structure and descriptions are listed under the BUFAttachProcess
function call. The information will be updated to reflect a new next cluster location.
count
number of data clusters from the source buffer you want to decode.
xcount
number of data clusters actually decoded. If DMA is in progress and at least one cluster has been acquired, you
may use the BUFDecode call to retrieve this data. If no complete data clusters have been transferred, the
BUFDecode parameter xcount returns a value of 0 (an error code is returned as well).
BUFEncode
int BUFEncode (unsigned long sourcehandle, char far *source, unsigned long
destinationhandle, char far *destination, BufinfoType far *info, unsigned long
count, unsigned long far *xcount)
Call Description
The purpose of the BUFEncode call is to encode data in preparation for a DMA analog output process. This
function allows you to set up output data in the form actually used by the output hardware. BUFEncode encodes
your source data (which must be in common analog data format, see the AOWrite call) and transfers it to a buffer
that will be used in the DMA output operation. This process facilitates consistency when dealing with output data.
This call encodes count clusters from your source array or buffer, to the DMA destination buffer (in conventional
or extended memory) starting at the next cluster location in the destination buffer. The next cluster location
pointer (in the buffer info array) is updated to the end of the data encoded.
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Appendix A: Software Function Call Reference
Before you can encode your source data into the destination buffer, you must call BUFAttachProcess to associate
the DMA process with the destination buffer.
Parameter Descriptions
sourcehandle
source buffer extended memory handle. If you used BUFAllocate to allocate an extended memory buffer for
your source data (data to be encoded), then sourcehandle should be assigned the value returned in the
BUFAllocate bufferhandle parameter. If you allocated a conventional memory buffer or a local array for your
source data, sourcehandle should be set to 0 (zero). For any Windows application this parameter should always
be set to 0 (zero).
source
pointer to the memory source buffer obtained from the BUFAllocate call, or a pointer to the start of your data
source array. (If you allocated an extended memory buffer for your source data, set source to 0 (zero).)
destinationhandle
extended memory destination handle. If you used BUFAllocate to allocate an extended memory buffer to hold
your encoded output data, destinationhandle is the value returned in the BUFAllocate bufferhandle parameter.
Set destinationhandle to 0 (zero) if you want to put the encoded data in a conventional memory buffer. For any
Windows application, this parameter should be set to 0 (zero).
destination
the start address of the conventional memory destination buffer or array to hold your encoded output data. If
you used BUFAllocate to allocated a conventional memory buffer to hold your encoded output data, destination
is the pointer returned in the BUFAllocate buffer pointer. (Set destination to 0 (zero) if you are going to put the
encoded data in an extended memory buffer.)
info
pointer to buffer information. The buffer information structure is the same as that described earlier in the
BUFAttachProcess call description.
count
number of data clusters from the source buffer or array that you want to encode.
xcount
the number of data clusters actually encoded.
BUFMoveIn
int BUFMoveIn (unsigned long sourcehandle, char FAR *source, unsigned long
destinationhandle, char FAR *destination, BufInfoType FAR *info, unsigned long
count, unsigned long FAR *xcount);
Call Description
The BUFMoveIn call works like the BUFEncode call except no translation or encoding of data is done. The
purpose of the call is to transfer data which is already in the proper format for the intended output hardware from
a source buffer to a DMA output buffer.
The BUFMoveIn call encodes count clusters from your source array or buffer, to the DMA destination buffer (in
conventional or extended memory) starting at the next cluster location in the destination buffer. The next cluster
location pointer is updated to the end of the data moved. (The next cluster location is available in the buffer info
array.)
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Appendix A: Software Function Call Reference
Before you can move your source data into the destination buffer, you must call BUFAttachProcess to associate
the DMA process with the destination buffer.
Parameter Descriptions
sourcehandle
source buffer extended memory handle. If you used BUFAllocate to allocate an extended memory buffer for
your source data (data to be moved), then sourcehandle should be assigned the value returned in the
BUFAllocate bufferhandle parameter. If you allocated a conventional memory buffer or a local array for your
source data, sourcehandle should be set to 0 (zero). For any Windows application this parameter should always
be set to 0 (zero).
source
pointer to the memory source buffer obtained from the BUFAllocate call, or a pointer to the start of your data
source array. (If you allocated an extended memory buffer for your source data, set source to 0 (zero).)
destinationhandle
extended memory destination handle. If you used BUFAllocate to allocate an extended memory buffer to hold
your output data, destinationhandle is the value returned in the BUFAllocate bufferhandle parameter. Set
destinationhandle to 0 (zero) if you want to put the data in a conventional memory buffer. For any Windows
application, this parameter should be set to 0 (zero).
destination
the start address of the memory destination buffer or array to hold your output data. If you used BUFAllocate to
allocated a conventional memory buffer to hold your output data, destination is the pointer returned in the
BUFAllocate buffer pointer. (Set destination to 0 (zero) if you are going to put the data in an extended memory
buffer.)
info
pointer to buffer information. The buffer information structure is the same as that described earlier in the
BUFAttachProcess call description.
count
number of data clusters from the source buffer or array that you want to move.
xcount
the number of data clusters actually moved.
BUFMoveOut
int BUFMoveOut (unsigned long sourcehandle, char FAR *source, unsigned long
destinationhandle, char FAR *destination, BufInfoType FAR *info, unsigned long
count, unsigned long FAR *xcount);
Call Description
The BUFMoveOut call works much like the BUFDecode call except except no translation or deoding of data is
done. The purpose of this function is to move input data acquired in a DMA input process into a destination
buffer.
The BUFMoveOut call transfers a specified number of data units (clusters) from a source buffer to a destination
array or buffer you specify. Before you can move a buffer, you must call BUFAttachProcess to associate the
DMA process with the buffer.
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Appendix A: Software Function Call Reference
After a call to BUFMoveOut, the "next cluster location pointer" is updated to the end of the data moved. (The
next cluster location is available in the buffer info array.)
Before you call BUFMoveOut, you will typically use the BUFSeek function to first locate a specific data cluster
in the original DMA Buffer. Note, a data cluster is the data transferred in a complete pass through the DMA
channel list (see the DMAConfigureList call description for more information on clusters). BUFMoveOut is
then called to move the data from the location and put it in the local destination array or buffer.
Parameter Descriptions
sourcehandle
source buffer extended memory handle obtained from the BUFAllocate call. If you allocated a conventional
memory buffer, sourcehandle should be set to 0 (zero). For any Windows application this parameter should
always be set to 0 (zero).
source
pointer to the memory buffer obtained from the BUFAllocate call. If you allocated an extended memory buffer,
source should be set to 0 (zero).
destinationhandle
destination buffer handle for the data. Set destinationhandle to 0 (zero) if a local array is used or a conventional
memory buffer is used as the destination. For any Windows application, this parameter should be set to 0 (zero).
destination
pointer to destination buffer or array for the data. Set destination to 0 (zero) if an extended memory buffer is
used as the destination.
info
buffer information. The buffer information structure is the same as that described earlier in the
BUFAttachProcess call description.
count
number of data clusters from the source buffer you want to move.
xcount
number of data clusters actually moved. If DMA is in progress and at least one cluster has been acquired, you
may use the BUFMoveOut call to retrieve this data. If no complete data clusters have been transferred, the
BUFMoveOut parameter xcount returns a value of 0 (an error code is returned as well).
BUFSeek
int BUFSeek (int origin, BufinfoType far *info, long count, unsigned long
bufferhandle, char far *buffer)
Call Description
The BUFSeek call changes the Next Cluster Location pointer in the buffer information list (info). To locate
specific clusters of data, you specify a starting reference point in the buffer (in the call's origin parameter) and the
number of clusters (in the count parameter) from that origin to move the Next Cluster Location pointer. Using
these parameters you may locate the Next Cluster Location pointer to the start of any data cluster.
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Appendix A: Software Function Call Reference
Three options are available to set the seek origin; the CURRENT pointer location, the BEGINNING of the buffer,
and the END of the buffer. The pointer will be moved by the number of clusters specified in count. If count is
negative, the pointer is moved back through the buffer the specified number of clusters. After the BUFSeek call
is made, the info list is updated with the new next cluster location.
Parameter Descriptions
origin
seek origin. You may specify one of the following origins:
BUF_SEEK_CURRENT = seek a cluster starting from the Current Cluster Location pointer.
BUF_SEEK_BEGIN = seek a cluster starting from the beginning of the buffer.
BUF_SEEK_END = seek a cluster starting from the end of the buffer.
info
buffer information. Buffer information structure is the same as that described under the BUFAttachProcess
function call description.
count
number of clusters from the origin to which the Next Cluster Location pointer is moved. If the specified count
would move past the beginning or end of the buffer, the location pointer wraps back to the end or beginning
(respectively) of the buffer. Note, in any case, count must be less than the buffer size in clusters (e.g. if the
buffer holds 10 clusters, they are numbered 0 - 9). Note that for "Stop on Command" DMA mode, the cluster
that marks the beginning of the buffer may not be 0 if the DMA process "wrapped" in the buffer
bufferhandle
extended memory handle of the buffer. Specify 0 in this parameter if a conventional memory buffer is being
used. For any Windows application, this parameter should be set to 0 (zero).
buffer
pointer to the memory buffer. Specify 0 in this parameter if an extended memory buffer is being used.
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Appendix A: Software Function Call Reference
A.5.4 Counters, 8254-Based
CTR8254Configure
Configure the given counter channel with an initial count and a mode
C
Pascal
BASIC
int CTR8254Configure (int slot, int module, int channel, unsigned count, int
mode);
function CTR8254Configure (slot, module, channel: Integer; count: Word; mode:
Integer): Integer;
FUNCTION CTR8254Configure% (BYVAL slot%, BYVAL mdl%, BYVAL chn%, BYVAL cnt%,
BYVAL mode%)
CTR8254Disable
Disable the specified counter channel
C
Pascal
BASIC
int CTR8254Disable (int slot, int module, int channel);
function CTR8254Disable (slot, module, channel: Integer): Integer;
FUNCTION CTR8254Disable% (BYVAL slot%, BYVAL mdl%, BYVAL chn%)
CTR8254Enable
Enable the specified counter channel
C
Pascal
BASIC
int CTR8254Enable (int slot, int module, int channel);
function CTR8254Enable (slot, module, channel: Integer): Integer;
FUNCTION CTR8254Enable% (BYVAL slot%, BYVAL mdl%, BYVAL chn%)
CTR8254Read
Returns count value of specified counter channel and status information
C
Pascal
BASIC
int CTR8254Read (int slot, int module, int channel, int reset, unsigned long
far *data, unsigned far *status);
function CTR8254Read (slot, module, channel, reset: Integer; var data:
Longint; var status: Word): Integer;
FUNCTION CTR8254Read% (BYVAL slot%, BYVAL mdl%, BYVAL chn%, BYVAL resetonrd%,
SEG ctrdata&, SEG stat%)
CTR8254ReadGroup
Returns count values of the specified counter group and status information
C
Pascal
BASIC
int CTR8254ReadGroup (int slot, int module, int reset, unsigned long far
*data, unsigned far *status);
function CTR8254ReadGroup (slot, module, reset: Integer; var data: Longint;
var status: Word): Integer;
FUNCTION CTR8254ReadGroup% (BYVAL slot%, BYVAL mdl%, BYVAL resetonrd%, SEG
ctrdata&, SEG stat%)
CTR8254Configure
int CTR8254Configure (int slot, int module, int channel, unsigned count, int mode)
Call Description
This call configures the 8254-based Counter channel 0 on the PCI-20428W Board for a selected mode. This
counter channel can be programmed for a variety of counting, pulse and periodic output functions. The counter
channel is disabled when CTR8254Configure is called.
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Parameter Descriptions
slot
assigned slot number for the PCI-20428W Board.
module
module position number. For the PCI-20428W, the number must be 0 (zero).
channel
counter channel to configure (must be channel 0).
count
16-bit initial count value for the counter channel. When enabled, the counter will count down beginning at this
value. See the mode parameter for restrictions on initial count values.
mode
mode of operation for the counter channel. See the "Counters" chapter of this manual for mode information.
The value you specify in mode can be 0, 1, 2, 3, 4, or 5.
CTR8254Disable
int CTR8254Disable (int slot, int module, int channel)
Call Description
This call disables the 8254-based counter channel. CTR8254Disable disables the counter by rewriting the mode
information, previously specified in the CTR8254Configure call, to the counter channel.
Parameter Descriptions
slot
assigned slot number for the PCI-20428W Board.
module
module position number. For the PCI-20428W, the number must be 0 (zero).
channel
8254-based counter channel to disable (must be channel 0).
CTR8254Enable
int CTR8254Enable (int slot, int module, int channel)
Call Description
This call enables the 8254-based counter channel for its configured mode. The counter is reset during the enable
process. CTR8254Enable enables the counter by writing the initial count value, previously specified in the
CTR8254Configure call, to the counter.
Parameter Descriptions
slot
assigned slot number for the PCI-20428W Board.
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module
module position number. For the PCI-20428W, the number must be 0 (zero).
channel
8254-based counter channel to enable (must be channel 0).
CTR8254Read
int CTR8254Read (int slot, int module, int channel, int reset, unsigned long far
*data, unsigned far *status)
Call Description
This call Reads the 8254-based counter channel, optionally resetting it, returning the count value (a 32-bit number
in which the upper 16-bits are always "0"). A counter status word is also returned.
Parameter Descriptions
slot
assigned slot number for the PCI-20428W Board.
module
module position number. For the PCI-20428W, the number must be 0 (zero).
channel
8254-based counter channel to read (must be channel 0).
reset
reset on read flag. Set this parameter to "1" (TRUE) to reset-on-read, or "0" (FALSE) to continue from current
count.
data
data read. The count return is a 32-bit number. The least significant 16-bits of this number contain the counter's
value. Note that the 8254 is a 16-bit down counter.
status
the counter status. Compare the status word with the following bit masks to determine if counter errors have
occurred:
CTR8254_NULL_CNT = Null count bit mask. A valid count has not been loaded into the counter.
Since the initial count (specified in CTR8254Configure) is loaded upon the first input pulse, a null
count indicates the counter's clock input had not received an input pulse at the time the counter was
read.
CTR8254_OUT_PIN = Output pin state bit mask. This bit allows you to test the state (High or Low)
of the counter's output (pin).
CTR8254ReadGroup
int CTR8254ReadGroup (int slot, int module, int reset, unsigned long far *data,
unsigned far *status)
Call Description
Reads all of the 8254-based counter channels on the specified device "simultaneously"and optionally resets the
counters. Since only one counter is available on the PCI-20428W, only channel 0 data is returned.
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Parameter Descriptions
slot
assigned slot number for the PCI-20428W Board.
module
module position number. For the PCI-20428W, the number must be 0 (zero).
reset
reset on read flag. Set this parameter to "1" (TRUE) to reset-on-read all counters, or "0" (FALSE) to continue
from current count.
data
data read array. The first array element, a 32-bit number, will contain Counter channel 0 data. The least
significant 16-bits of this number contain the counter's value.
status
counter status array. Compare the status words with the following bit masks to determine if counter errors have
occurred:
CTR8254_NULL_CNT = Null count bit mask. A valid count has not been loaded into the counter.
Since the initial count is loaded upon the first input pulse, this means that the counter's clock input had
not received an input at the time the counter was read.
CTR8254_OUT_PIN = Output pin state bit mask. The state (High or Low) of the counter's output
(pin).
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A.5.5 Digital Input/Output
DIOConfigure
Configure a digital I/O port for input or output and basic or handshake mode
C
Pascal
BASIC
int DIOConfigure (int slot, int module, int port, int input, int handshake,
unsigned data);
function DIOConfigure (slot, module, port, dioinput, handshake, data: Word):
Integer;
FUNCTION DIOConfigure% (BYVAL slot%, BYVAL mdl%, BYVAL port%, BYVAL dioinput%,
BYVAL handshake%, BYVAL diodata%)
DIORead
Read a specified digital I/O port
C
Pascal
BASIC
int DIORead (int slot, int module, int port, unsigned far *data);
function DIORead (slot, module, port: Integer; var data: Word): Integer;
FUNCTION DIORead% (BYVAL slot%, BYVAL mdl%, BYVAL port%, SEG diodata%)
DIOReadBit
Read a specified bit on a digital I/O port
C
Pascal
BASIC
int DIOReadBit (int slot, int module, int port, int portbit, unsigned far
*data);
function DIOReadBit (slot, module, port, portbit: Integer; var data: Word):
Integer;
FUNCTION DIOReadBit% (BYVAL slot%, BYVAL mdl%, BYVAL port%, BYVAL portbit%,
SEG diodata%)
DIOWrite
Write a value to a digital I/O port
C
Pascal
BASIC
int DIOWrite (int slot, int module, int port, unsigned data);
function DIOWrite (slot, module, port, data: Word): Integer;
FUNCTION DIOWrite% (BYVAL slot%, BYVAL mdl%, BYVAL port%, BYVAL diodata%)
DIOWriteBit
Write a value to specified bit on a digital I/O port
C
Pascal
BASIC
int DIOWriteBit (int slot, int module, int port, int portbit, unsigned data);
function DIOWriteBit (slot, module, port, portbit, data: Word): Integer;
FUNCTION DIOWriteBit% (BYVAL slot%, BYVAL mdl%, BYVAL port%, BYVAL portbit%,
BYVAL diodata%)
DIOConfigure
int DIOConfigure (int slot, int module, int port, int input, int handshake, unsigned
data)
Call Description
This call configures the specified 8-bit digital I/O port as an input or an output. Even though the PCI-20428W's
digital I/O ports have fixed directions, DIOConfigure must be called to properly configure these ports.
Parameter Descriptions
slot
assigned slot number for the PCI-20428W.
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module
module position number. For the PCI-20428W, this number must be 0.
port
digital I/O port to configure (port 0 or 1).
input
flag indicating whether the port is to be configured for digital input or output. Specify "1" (TRUE) for digital
input or "0" (FALSE) for digital output. Port 0 of the PCI-20428W must always be configured for input, and
port 1 must always be configured for output.
handshake
handshake mode flag. This feature does not apply to the PCI-20428W. Set this parameter to "0" (FALSE).
data
initial data written to a port configured for digital output. The data must be a right-justified 16-bit word (i.e. an
unsigned 16-bit integer).
DIORead
int DIORead (int slot, int module, int port, unsigned far *data)
Call Description
This call reads the given 8-bit digital I/O port and returns the value as right justified 16-bit word.
Parameter Descriptions
slot
assigned slot number for the PCI-20428W Board.
module
module position number. For the PCI-20428W, the number must be 0 (zero).
port
digital I/O port to read (must be port 0).
data
the digital input value read from the port. The data is reported as a right-justified 16-bit word, the port's value is
the least significant 8-bits (the upper 8-bits are set to 0).
DIOReadBit
int DIOReadBit (int slot, int module, int port, int portbit, unsigned far *data)
Call Description
This call reads the state of a single port bit (0-7) of a digital input port and returns the value as an integer equal to
1, or to 0.
Parameter Descriptions
slot
assigned slot number of the board containing the port.
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module
module position number. For the PCI-20428W Board, the number must be 0 (zero).
port
digital I/O port to read (must be port 0).
portbit
digital I/O port bit to read (0 - 7 where bit 0 = LSB, bit 7 = MSB)
data
the digital data read from the given port bit. The state of the requested port bit is reported as an integer value of
1 or 0.
DIOWrite
int DIOWrite (int slot, int module, int port, unsigned data)
Call Description
This call writes the indicated value (specified in data) to the specified digital output port.
Parameter Descriptions
slot
assigned slot number of the PCI-20428W Board.
module
module position number. For the PCI-20428W, the number must be 0 (zero).
port
digital I/O port to read (must be port 1).
data
digital value to write to the given port. The port data value must be a 16-bit word with the least significant
8-bits being the byte you wish to send.
DIOWriteBit
int DIOWriteBit (int slot, int module, int port, int portbit,
unsigned data)
Call Description
This call sets the state of a single digital output port bit.
Parameter Descriptions
slot
assigned slot number of the PCI-20428W Board.
module
module position number. For the PCI-20428W, the number must be 0 (zero).
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port
digital I/O port to write data to (must be port 1).
portbit
digital I/O port bit (0 - 7, where 0=LSB, 7=MSB)
data
data value (0, 1) to write to the given port bit.
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A.5.6 Direct Memory Access (DMA)
DMAConfigureList
Configure the channel list for a specified DMA process
C
Pascal
BASIC
int DMAConfigureList (int processhandle, int start, int stop, unsigned long
startdelay, unsigned long stopdelay, unsigned long clustercount, int count,
DMAListType far *list, int groupAI, int far *clustersize);
function DMAConfigureList (processhandle, start, stop: Integer; startdelay,
stopdelay, clustercount: Longint; count: Integer; var list: DMAListType;
groupAI: Integer; var clustersize: Integer): Integer;
FUNCTION DMAConfigureList% (BYVAL prchnd%, BYVAL st%, BYVAL stp%, BYVAL std&,
BYVAL stpd&, BYVAL cc&, BYVAL cnt%, SEG lst AS DMAListType, BYVAL grp%, SEG
clustsiz%)
DMAFreeHandle
Free the specified DMA process handle
C
Pascal
BASIC
int DMAFreeHandle (int processhandle);
function DMAFreeHandle (processhandle: Integer): Integer;
FUNCTION DMAFreeHandle% (BYVAL prchnd%)
DMAGetHandle
Assign a handle to a DMA process
C
Pascal
BASIC
int DMAGetHandle (int far *processhandle);
function DMAGetHandle (var processhandle: Integer): Integer;
FUNCTION DMAGetHandle% (SEG prchnd%)
DMAHugeGetHandle
Assign a handle to a Huge DMA process (>64 kbyte buffer, Windows applications only)
C
Pascal
BASIC
int DMAHugeGetHandle (int far *processhandle);
function DMAHugeGetHandle (var processhandle: Integer): Integer;
FUNCTION DMAHugeGetHandle% (SEG prchnd%)
DMASetOptions
Set the options for the specified DMA process
C
Pascal
BASIC
int DMASetOptions (int processhandle, int channel, unsigned long reserved);
function DMASetOptions (processhandle, channel: Integer; reserved: Longint):
Integer;
FUNCTION DMASetOptions% (BYVAL prchnd%, BYVAL chn%, BYVAL reserved&)
DMASetPacer
Identify the pacer source for a specified DMA process
C
Pascal
BASIC
int DMASetPacer (int processhandle, int slot, int module, int channel, int
iotype);
function DMASetPacer (processhandle, slot, module, channel, iotype: Integer):
Integer;
FUNCTION DMASetPacer% (BYVAL prchnd%, BYVAL slot%, BYVAL mdl%, BYVAL chn%,
BYVAL iotype%)
DMAStart
Start a specified DMA process
C
Pascal
BASIC
int DMAStart (int processhandle, unsigned long bufferhandle, char far *buffer,
unsigned long buffersize);
function DMAStart (processhandle: Integer; bufferhandle: Longint; buffer:
POINTER; buffersize: Longint): Integer;
FUNCTION DMAStart% (BYVAL prchnd%, BYVAL bufhnd&, BYVAL buffer&, BYVAL
bufsiz&)
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DMAStatus
Get the status and buffer information of the specified DMA process
C
int DMAStatus (int processhandle, unsigned far *status, BufInfoType far
*info);
function DMAStatus (processhandle: Integer; var status: Word; var info:
BufInfoType): Integer;
FUNCTION DMAStatus% (BYVAL prchnd%, SEG stat%, SEG info AS BufInfoType)
Pascal
BASIC
DMAStop
Stop the specified DMA process and get the status and buffer information
C
Pascal
int DMAStop (int processhandle, unsigned far *status, BufInfoType far *info);
function DMAStop (processhandle: Integer; var status: Word; var info:
BufInfoType): Integer;
FUNCTION DMAStop% (BYVAL prchnd%, SEG stat%, SEG info AS BufInfoType)
BASIC
DMASwap
Switch to a new data buffer when DMA terminal count is detected (DOS applications only)
C
int DMASwap (int processhandle, unsigned long bufferhandle, char far *buffer,
unsigned far *status, BufInfoType far *info);
function DMASwap (processhandle: Integer; bufferhandle: Longint; buffer:
Pointer; var status: Word; var info: BufInfoType): Integer;
FUNCTION DMASwap% (BYVAL prchnd%, BYVAL bufhnd&, BYVAL buffer&, SEG stat%, SEG
info AS BufInfoType)
Pascal
BASIC
DMAConfigureList
int DMAConfigureList (int processhandle, int start, int stop, unsigned long
startdelay, unsigned long stopdelay, unsigned long clustercount, int count,
DMAListType far *list, int groupAI, int far *clustersize)
Call Description
The DMAConfigureList call is used in all DMA operations to define DMA hardware operating parameters,
specify the I/O data you want transferred, and the order data will be sent or received. Specifically, for the DMA
process identified by the processhandle parameter, this call is used to:
Configure the DMA channel list
Specify the DMA start/stop mode
Set the number of channel list passes to acquire or output
Get information for determining the data buffer size required for the transfer
Programming Notes
Please read the following programming notes for important information on using the DMAConfigureList call.
DMA Transfer Direction
The DMA transfer direction must be the same for the entire DMA process. The direction of the DMA transfer is
determined by the I/O types specified in the DMA channel list elements of this call. The PCI-20428W-1 and -2
Boards support analog input (AI_TYPE) and analog output (AO_TYPE) DMA transfers. Concurrent analog
input and analog output is possible by programming separate DMA processes for each activity. The PCI20428W-3 Board supports analog input (AI_TYPE) DMA.
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Analog Input
Two general RULES must be followed when acquiring analog data in a DMA input process.
1. For a given DMA process, analog input data from only one A/D device can be acquired. That is
you can only acquire data from one PCI-20428W Board in a single process. Multiple processes must
be programmed to acquire data from multiple boards.
2. The analog input channels you reference in DMAConfigureList must also be specified in the
AIConfigureList call's channel list. The order of the analog channels referenced in both lists must
match. (AIConfigureList is used to specify gain, input range, and other parameters for analog input
channels.)
The channel lists discussed in rule number 2 above must also conform to the following conditions.
For differential operation up to eight differential input channels may be specified. For single-ended
operation up to sixteen single-ended input channels may be specified. The channel list must consist of
channels resident on the PCI-20428W Board, in sequential increasing order from channel 0 to channel
N, where N is the ending channel. You may not repeat channels on the list. The same gain, range and
input configuration must be used for all channels on the list.
Analog Output
The following condition must be observed when transferring analog output data in a DMA output process using
a PCI-20428W-1 or a PCI-20428W-2.
For a single channel analog output DMA process, data must be transferred to output channel 0 only. If
dual channel DMA output is programmed, the data for both analog output channels must be interleaved
in the same DMA buffer. Two consecutive bytes of data per channel are required. (The BUFEncode
function can be used to fill the DMA output buffer in the proper format.)
IMPORTANT NOTE for Windows Users:
If you didn’t do so at installation time, you will need to install one of the following platform-dependent
driver files as described in Chapter 3 and in Appendix F:
1. Windows NT
 : Master Link NT Driver with DMA support, MASTER_NT.SYS.
2. Windows 95: Virtual DMA Device Driver, VDMAD.VXD.
3. Windows 3.x: Virtual DMA Device Driver, PCIVDMAD.386.
Parameter Descriptions
processhandle
the DMA process handle obtained from a DMAGetHandle or DMAHugeGetHandle call. You must assign a
processhandle to each DMA process you wish to implement.
start
DMA initiation mode. The following DMA initiation modes are available:
DMA_START_COMMAND = start the DMA process on a software command (DMAStart ). This
start mode is allowed for analog input and analog output DMA.
DMA_START_TRIGGER = when a trigger signal is detected at the PCI-20428W Board's External
Input line, start the DMA process. This start mode is only supported for analog input DMA.
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stop
DMA termination mode. The following DMA termination modes are available:
DMA_STOP_COMMAND = stop the DMA process via a command (the DMAStop call). This stop
mode is allowed for analog input and analog output DMA.
DMA_STOP_TC = stop the DMA process on a Terminal Count. The Terminal Count, specified in the
clustercount parameter, indicates the number of data clusters you want transferred in the DMA process.
This stop mode is allowed for analog input and analog output DMA.
startdelay
startdelay is not applicable to the PCI-20428W. Set this parameter to 0 (zero).
stopdelay
stopdelay is not applicable to the PCI-20428W. Set this parameter to 0 (zero).
clustercount
cluster count is a number indicating the number of data clusters you will transfer in the DMA input or output
process. A data cluster is defined as the block of input or output data represented by a complete pass of all the
channels on the channel list. (Data cluster size in bytes, is reported by the clustersize parameter.) If you chose
DMA_STOP_TC in the stop parameter, the value you specify in clustercount is the Terminal Count value. For
any DMA transfer, clustercount is equivalent to the size of the DMA data buffer in terms of data clusters.
count
the number of list elements you program in the DMA channel list must be specified in count.
list
the DMA channel list array. The DMA channel list structure has the following format:
/*
* DMA channel list structure
*/
typedef
struct DMAListType {
int slot;
/ *Slot.
int module;
/ *Module
int channel;
/ *Channel
int iotype;
/ *I/O type
} DMAListType;
*/
*/
*/
*/
The meanings of each DMA channel list element are given below.
Slot
assigned slot number of the PCI-20428W Board.
Module
module position number. For the PCI-20428W, this number must be 0.
Channel
the channel number on the I/O device you want to acquire data from in an input process, or send data to
in an output process. Please refer to the analog input and analog output Programming Notes given in
the call Description section.
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I/O type
the I/O type of the channel. This information is used by the software to determine the number of bytes
that need to be transferred to or from the specified I/O channel and the direction of the transfer. The
constants to use for PCI-20428W supported I/O types are:
AI_TYPE = Analog Input
AO_TYPE = Analog Output (PCI-20428W-1 and -2 only)
groupAI
group analog input channel list elements flag. This parameter does apply to the PCI-20428W, it must be set to
"0" (FALSE).
clustersize
the number of bytes per data cluster. Also see the description for the clustercount parameter. You use the
returned "number of bytes per data cluster" value and the clustercount to determine the size of the buffer you
will need to allocate for the DMA transfer. The required minimum buffer size, in bytes, is equal to the
clustercount times the clustersize.
Buffer size (in bytes) = clustersize * clustercount
Also see the BUFAllocate call description.
DMAFreeHandle
int DMAFreeHandle (int processhandle)
Call Description
This call "frees" the specified DMA handle assigned through the DMAGetHandle or DMAHugeGetHandle call.
You should always free any DMA handles that are no longer in use (and prior to exiting a program).
Parameter Description
processhandle
DMA process handle you want to free.
DMAGetHandle
int DMAGetHandle (int far *processhandle)
Call Description
This call assigns a processhandle (a number) to your DMA process. This is the first function call you should
make, after hardware and software initialization calls, if you want to implement a DMA process in your program.
The DMA processhandle must be referenced in all subsequent DMA function calls associated with that process.
This call also allows you to easily set up more than one DMA process in a single application program, specifying
the processhandle of each one at appropriate times to DMAConfigureList, DMAStart, DMAStatus, etc. Note
to Windows users: Use DMAHugeGetHandle for processes requiring more than 64 kbytes of data.
Parameter Description
processhandle
the assigned DMA process handle.
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DMAHugeGetHandle
int DMAHugeGetHandle (int far *processhandle)
Call Description
This call is used in place of DMAGethandle for DMA processes requiring data buffers greater than 64 kbytes (a
"huge" buffer) under Windows Only. DOS applications that need to transfer more than 65536 bytes (64k) are not
supported for the PCI-20428W. (Note, the DMASwap function provides a means of using two buffers in a DMA
process to incease the amount of data in a DOS application.) See the BUFAllocate call description for allocating
a data buffer for a huge DMA process in a Windows application. Use DMAGethandle if less than 64 kbytes of
data will be transferred.
Parameter Description
processhandle
pointer to the assigned huge DMA process handle.
DMASetOptions
int DMASetOptions (int processhandle, int channel, unsigned long reserved)
Call Description
This call is used to assign a DMA channel for the process identified by processhandle. After you call
DMAGetHandle or DMAHugeGetHandle, you must assign a DMA channel for the transfer using
DMASetOptions. The assigned channel must match the boards jumper settings.
Parameter Descriptions
processhandle
handle for the DMA process the call assigns a channel to.
channel
DMA channel option. DMA channel 1 or 3 may be specified for a PCI-20428W Board. The channel you select
must also match the board's DMA channel jumper setting.
reserved
parameter reserved for future use - set it to 0 (zero).
DMASetPacer
int DMASetPacer (int processhandle, int slot, int module, int channel, int iotype)
Call Description
For the specified DMA process, DMASetPacer is used to identify the pacer source that will be enabled by the
DMAStart call. For PCI-20428W analog input processes, the on-board Analog Input Rate Generator or Counter
channel 0 can be specified to DMASetPacer. To use the Counter output as the pacer signal, it must be connected
to the PCI-20428W's External Input and the Analog Input Rate Generator must be disabled. Through a jumper
setting (on W39), the Analog Output Rate Generator or the Analog Input Rate Generator can be used to pace
analog output processes. This allows analog input and and analog output processes to be synchronized. In any
case, the pacer source should be configured before calling DMASetPacer.
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Note, the DMASetPacer call is not applicable when a DMA pacer source cannot be identified by a slot, module,
and channel number, such as a signal connected through the PCI-20428W's External Input line from an external
device
Parameter Descriptions
processhandle
DMA process handle.
slot
assigned slot number of the PCI-20428W Board.
module
module position number. For the PCI-20428W, the number must be 0 (zero).
channel
channel number of pacer source. The channel numbers for the PCI-20428W Analog Input and Analog Output
Rate Generators are 0 and 1 respectively. The 8254 counter channel number is 0.
iotype
the I/O type of the pacer source (rate generator, counter, 8254-based counter, etc.). One of the following I/O
types may be specified:
CTR8254_TYPE = 8254-based counter type (PCI-20428W counter channel 0).
RG_TYPE = Rate Generator type (a PCI-20428W rate generator channel).
NO_TYPE = No type. Use this to cancel a previously selected pacer or use NO_TYPE if the
pacer need not (or can not) be enabled directly by the software. (i.e. if the pacer source cannot
be identified by slot, module and channel.)
DMAStart
int DMAStart (int processhandle, unsigned long bufferhandle, char far *buffer,
unsigned long buffersize)
Call Description
This call starts the DMA process with the specified processhandle, data buffer and buffer size in bytes.
DMAStart enables the pacer source specified in the DMASetPacer call, the on-board DMA controller, and the
host computer's DMA controller.
Parameter Descriptions
processhandle
DMA process handle.
bufferhandle
extended memory buffer handle obtained from the BUFAllocate call, if an extended memory buffer was
allocated. If a conventional memory data buffer was allocated, then bufferhandle must be set to 0. Always set
this parameter to 0 (zero) for Windows applications.
buffer
pointer to the data buffer in memory or 0 (zero) if buffer is in extended memory (see the BUFAllocate call).
buffersize
size of the data buffer in bytes (see the BUFAllocate call).
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DMAStatus
int DMAStatus (int processhandle, unsigned far *status, BufInfoType far *info)
Call Description
This call returns the status of the specified DMA process and fills in the fields of the buffer information array
(info). A set of DMA status bit masks are provided with the Software Libraries to detect a number of process
conditions and hardware errors. The buffer information is the same array described under BUFDecode in Buffer
Management Call group (A.5.3).
Parameter Descriptions
processhandle
DMA process handle.
status
the DMA status word. Compare the following bit masks to the status word to test for a particular DMA status
condition (only those applicable to the PCI-20428W are listed):
DMA_PROCESS_RUNNING = The specified DMA process is still active.
DMA_TRIGGER_OCURRED = A DMA trigger signal at the External Input has occurred.
DMA_HUGE_OVERRUN = An overrun was detected during a huge DMA process that resulted in
missing or lost, data.
info
the buffer information array. Please refer to the BUFAttachProcess call description for more information on
the buffer info information structure.
DMAStop
int DMAStop (int processhandle, unsigned far *status, BufInfoType far *info)
Call Description
This call terminates the specified DMA process. Status and buffer information are also returned. DMAStop halts
the DMA process started in any mode. The pacer device (if specified to DMASetPacer) is disabled, the on-board
DMA controller is disabled and the host computer's DMA controller is disabled.
DMAStop call(s) should be made prior calling DMAFreeHandle to ensure that all DMA activity for the process
is terminated.
Parameter Descriptions
processhandle
DMA process handle.
status
the DMA status word. See the status parameter description in the DMAStatus call.
info
the buffer information array. See the info parameter description in the DMAStatus call.
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Appendix A: Software Function Call Reference
DMASwap
int DMASwap (int processhandle, unsigned long bufferhandle, char far *buffer,
unsigned far *status BufInfoType far *info)
Call Description
This call, which is only applicable to DOS based applications, automatically repeats a "Stop on Terminal Count"
DMA process (see the DMAConfigureList call's stop parameter description) using a new data buffer. Process
status and information on the old buffer is returned.
The DMASwap instruction will not return control to the application program (holds processing) until the DMA
process is running in the new buffer. For an input process, when the the old buffer is full it can be read using the
BUFDecode call. Thus, for DMA input operations, this call provides a means of acquiring more data while
permitting the application program to access data already acquired. For an analog output operation, this call can
be used to switch between alternate output waveforms.
The first and second buffers must be the same length and be offset aligned (both buffers must start at the same
relative memory page position). You can use the BUFAllocate "ALLOC_ON_64K" location flag when
allocating buffers to satisfy the offset alignment condition.
Parameter Descriptions
processhandle
DMA process handle.
bufferhandle
the new extended memory (XMS) data bufferhandle. If BUFAllocate was used to allocate the data buffer, just
use the bufferhandle returned in that call.
buffer
pointer to the new memory data buffer. If BUFAllocate was used to allocate the data buffer, just use the buffer
pointer returned in that call.
status
the DMA status word. See the status parameter description in the DMAStatus call.
info
the old "swapped out" buffer information array. The buffer information structure and definitions for each buffer
list element are provided in section A.5.3 under the BUFAttachProcess call description.
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Appendix A: Software Function Call Reference
A.5.7 Initialization
HWInit
Initialize the data acquisition hardware
C
Pascal
BASIC
int HWInit (void);
function HWInit: Integer;
FUNCTION HWInit% ()
RegisterClient
Windows 16-bit and 32-bit applications only. Registers an application instance with the drivers.
C
Pascal
Visual Basic
int RegisterClient (void);
function RegisterClient: Integer;
Function RegisterClient%()
Note: Windows 16-bit only for Pascal
SWInit
Initialize the Software Library
C
Pascal
BASIC
int SWInit (void);
function SWInit: Integer;
FUNCTION SWInit% ()
SWReset
Reset the Software Library's initialization (cancels SWInit and HWInit)
C
Pascal
BASIC
int SWReset (void);
function SWReset: Integer;
FUNCTION SWReset% ()
SlotAssignIO
Assign a slot number to a I/O-mapped ISA data acquisition Board
C
Pascal
BASIC
int SlotAssignIO (int slot, unsigned base);
function SlotAssignIO (slot: Integer; base: Word): Integer;
FUNCTION SlotAssignIO% (BYVAL slot%, BYVAL base%)
SlotInquire
Return information about the hardware configuration in a specified slot
C
Pascal
BASIC
int SlotInquire (int slot, ModInfoTypeArray far *info);
function SlotInquire (slot: Integer; var info: ModInfoTypeArray): Integer;
FUNCTION SlotInquire% (BYVAL slot%, SEG info AS ModInfoType)
SlotSearchIO
Search for PCI-20000 Series I/O-mapped ISA Boards and return the number of boards found, thier ID codes, and
segment addresses
C
Pascal
BASIC
int SlotSearchIO (int far *count, IOSearchBoardTypeArray far *info);
function SlotSearchI0 (var count: Integer; var info: IOSearchBoardTypeArray):
Integer;
FUNCTION SlotSearchIO% (SEG count%, SEG info AS IOSearchBoardType)
UnregisterClient
Windows 16-bit and 32-bit applications only. Unregisters an application instance with the drivers.
C
Pascal
Visual Basic
116
int UnregisterClient (void);
function UnregisterClient: Integer;
Function UnregisterClient% ()
Note: Windows 16-bit only for Pascal
Appendix A: Software Function Call Reference
IncludeXXXX
Include support for the XXXX Carrier/Board, Module, and Buffer, DMA, and Thermocouple functions in program
C IncludeXXXX Functions
BASIC IncludeXXXX Functions
int
int
int
int
FUNCTION
FUNCTION
FUNCTION
FUNCTION
Include428W (void);
IncludeBUF (void);
IncludeDMA (void);
IncludeTC (void);
Include428W% ()
IncludeBUF% ()
IncludeDMA% ()
IncludeTC% ()
Pascal IncludeXXXX Functions
function
function
function
function
Include428W: Integer;
IncludeBUF: Integer;
IncludeDMA: Integer;
IncludeTC: Integer;
HWInit
int HWInit (void)
Call Description
This call establishes the software configuration and initializes the hardware components. This function call must
be made immediately after all of the necessary IncludeXXXX and SlotAssignIO calls. All installed boards
which have been assigned slot numbers will be initialized.
RegisterClient
int RegisterClient (void);
Call Description
This call applies to Windows 3.x and Win32 applications only. This call registers an application instance with the
drivers and must be the first driver call in your Windows program. Refer to the sample programs for examples.
SWInit
int SWInit (void)
Call Description
This call initializes the Software Library and performs system timer calibration. This function must be called
prior to any other function call.
You can alter the SWInit call to customize driver initialization. You do this by replacing the last parameter of the
InitSW function call (found in the PCIDATA source file in the SAMPLE directory) with the desired flag(s). For
more information on this topic please consult the “Initialization Enhancements” section of Appendix F. These
initialization enhancements apply to all Master Link language versions.
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Appendix A: Software Function Call Reference
SWReset
int SWReset (void)
Call Description
This call resets the Software Library's initialization. This function, which can be called any time after SWInit,
cancels all software and hardware initialization.
SlotAssignIO
int SlotAssignIO (int slot, unsigned base)
Call Description
This call assigns a slot number to an installed I/O-mapped board (i.e. a PCI-20428W Board). The assigned slot
number, is used for all subsequent I/O function calls. The SlotAssignIO call must be made for each I/O-mapped
board in the system, and must be made between the SWInit and HWInit calls.
Parameter Descriptions
slot
the host computer "slot" number you assign to the installed I/O-mapped board. For I/O-mapped ISA devices,
(such as the PCI-20428W Board), we recommend that you use slot numbers 16 to 31. This will help avoid any
possible conflict between installed EISA and ISA boards if you are using an EISA system.
base
the base I/O address of the board you wish to assign a slot number to. The base address defines the board
location in the I/O memory map, and is set by DIP switches on the board. If you have changed the base address
and no longer know what it is, you have three available methods to determine its value:
Method 1. Use the SlotSearchIO function (see the SlotSearchIO call description).
Method 2. Use the SYSCHECK utility supplied with the board. SYSCHECK is an easy to use menu
driven system check utility supplied with every board purchase.
Method 3. You may visually inspect DIP switch settings.
SlotInquire
int SlotInquire (int slot, ModInfoTypeArray far *info)
Call Description
This call can be used to return information about the Intelligent Instrumentation Hardware configuration installed
in a specific slot of the host computer. A four member list array of data corresponding to module positions 0 to 3
of the installed (and initialized by the drivers) Board or Carrier is returned. Data for each module position
includes a module present flag, a module ID code, and the Board or Carrier's segment address. The first member,
corresponding to module 0, contains information on the Board or Carrier itself.
Parameter Descriptions
slot
the slot number of the Board or Carrier you wish to query.
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Appendix A: Software Function Call Reference
info
the module information array. The module information structure has the following format:
/*
* Module information structure
*/
#define MAXMODULE 4
typedef
struct ModInfoType {
int present;
/* hardware present flag. */
unsigned id;
/* hardware ID. */
unsigned segment;
/* Board segment or I/O address. */
unsigned long flags; /* Module:
(MODINFO_IO_BOARD = I/O Mapped Board) */
} ModInfoType;
typedef ModInfoType ModInfoTypeArray [MAXMODULE];
Module present flag
This flag indicates if an I/O Module or Board or Carrier is installed in the module position (0, 1, 2, 3).
If a valid device is present the flag will contain 01 Hex; otherwise it will contain 00 Hex.
Module ID
This is the I/O Module’s or Board’s or Carrier’s ID code. Every Intelligent Instrumentation Board or
Carrier or Module has a unique ID code. The ID Codes for PCI-20428W Multifunction Boards are:
PCI-20428W-1 configured for single-ended operationID code = 30 Hex
PCI-20428W-1 configured for differential operation
ID code = 31 Hex
PCI-20428W-2 configured for single-ended operationID code = 32 Hex
PCI-20428W-2 configured for differential operation
ID code = 33 Hex
PCI-20428W-3 single-ended operation
ID code = 34 Hex
Board Segment or I/O address
This is the base address of the Board or Carrier. The base address establishes the start address of the
Board or Carrier's I/O map. For memory mapped ISA Boards/Carriers, address bits A10 to A19 are
defined by their segment address DIP switches. For I/O-mapped ISA Boards, such as the PCI-20377W
or PCI-20428W, address bits A4 to A9 are defined by their base I/O address DIP switches.
Module flags
This flag word indicates special information about the device. The following "module flags" bit mask
is currently provided:
MODINFO_IO_BOARD = An I/O-mapped Board is present (i.e. a PCI-20377W, or PCI-20428W).
SlotSearchIO
int SlotSearchIO (int far *count, IOSearchBoardTypeArray far *info)
Call Description
This function searches the I/O map for I/O-mapped boards and returns the number of units found along with
information about each device. Note that only those boards with software support already loaded (using the
IncludeXXXX function call) will be detected.
Parameter Descriptions
count
the number of boards found.
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Appendix A: Software Function Call Reference
info
the board information array. For each device found, the ID code and base address are returned. (Note, ID codes
are listed in the SlotInquire function call parameter descriptions.) The search information structure is shown
below:
/*
*
*/
IO board search type definition
#define MAXSLOT 32
typedef
struct IOSearchBoardType {
unsigned id;
unsigned address;
} IOSearchBoardType;
/* ID. */
/* Base I/O address. */
typedef IOSearchBoardType IOSearchBoardTypeArray [MAXSLOT];
UnregisterClient
int UnregisterClient (void);
Call Description
This call applies to Windows 3.x and Win32 applications only. This call unregisters an application instance with
the drivers and must be the last call in your Windows program.
IncludeXXXX
int IncludeXXXX (void)
Call Description
IncludeXXXX function calls are provided to link software support for the hardware used by the application.
There is a unique IncludeXXXX call for each board, carrier and I/O module product. Additionally, there are
IncludeXXXX calls for buffer, DMA, and thermocouple temperature measurement software support. The
IncludeXXXX calls must be made between the SWInit and HWInit calls. You should call IncludeXXXX for
your hardware components and to include special support after calling SWInit.
The IncludeXXXX calls applicable to a PCI-20428W Board is given below.
Hardware Support
Include428W (void)
Provides support for a PCI-20428W Board.
Software Support
IncludeBUF (void) Provides data buffer support for DMA operations.
IncludeDMA (void) Provides support for DMA Input/Output operations.
IncludeTC (void) Provides support for thermocouple temperature measurement.
All available IncludeXXXX calls are listed in the PCI.H "include" file.
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Appendix A: Software Function Call Reference
A.5.8 Rate Generator
RGConfigure
Configure the given rate generator channel with rate parameters and a mode
C
Pascal
BASIC
int RGConfigure (int slot, int module, int channel, unsigned count1, unsigned
count2, int mode);
function RGConfigure (slot, module, channel: Integer; count1, count2: Word;
mode: Integer): Integer;
FUNCTION RGConfigure% (BYVAL slot%, BYVAL mdl%, BYVAL chn%, BYVAL cnt1%, BYVAL
cnt2%, BYVAL mode%)
RGDisable
Disable specified rate generator
C
Pascal
BASIC
int RGDisable (int slot, int module, int channel);
function RGDisable (slot, module, channel: Integer): Integer;
FUNCTION RGDisable% (BYVAL slot%, BYVAL mdl%, BYVAL chn%)
RGEnable
Enable specified rate generator
C
Pascal
BASIC
int RGEnable (int slot, int module, int channel);
function RGEnable (slot, module, channel: Integer): Integer;
FUNCTION RGEnable% (BYVAL slot%, BYVAL mdl%, BYVAL chn%)
RGConfigure
int RGConfigure (int slot, int module, int channel, unsigned count1, unsigned
count2, int mode)
Call Description
This call configures the specified rate generator on a PCI-20428W Multifunction Board. The Analog Input Rate
Generator is configured by specifying channel 0, the Analog Output Rate Generator is configured by specifying
channel 1. Rate generators can be operated in square-wave or pulse mode as determined by the mode parameter.
In pulse mode (mode = 2), the high portion of the rate generator's output cycle is a constant 125 ns. In squarewave mode (mode = 3), the high and low portions of the output cycle are equal. In general, pulse mode operation
is recommended for analog input and output DMA operations.
A rate generator's output frequency is the result of dividing the on-board 8 MHz timebase frequency by count1.
The output frequency is given by the formula:
F = 8 MHz/(count1)
where count1 can range from 2 to 65535. When configuring a PCI-20428W Board, the count2 parameter must
always be set to a value of 0 or 1. From the above formula, the output frequency can range from a maximum of 4
MHz to a minimum of 122 Hz. Note: An output frequency range of 0.00186 Hz to 2 MHz can be implemented
by writing your own driver software routine to program the circuit's rate generator prescaler option (see Appendix
B). However, if this option is used, Counter channel 0 will not be available.
Prior to calling RGConfigure, it is recommended that the RGDisable call be used to disable the rate generator (to
avoid the possibility of generating extra pulses on reconfiguration). To activate a rate generator for its
programmed mode, the RGEnable function must be called for the selected rate generator channel.
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Appendix A: Software Function Call Reference
Parameter Descriptions
slot
assigned slot number of the PCI-20428W.
module
module position number. For the PCI-20428W, this number must be 0 (zero).
channel
rate generator channel to configure.
0 = Analog Input Rate Generator
1 = Analog Output Rate Generator (PCI-20428W-1 and -2 Boards only)
count1
integer value (from 2 to 65535) used to set the rate generator's output frequency. Please refer to the call
description for details.
count2
parameter not used with the PCI-20428W, it must be set to an integer value of 0 or 1.
mode
rate generator mode for the indicated channel. The value of mode (2, or 3) determines the type of output
waveform from the rate generator:
2 = Constant Pulse width output (125 ns)
3 = Square-wave output
RGDisable
int RGDisable (int slot, int module, int channel)
Call Description
This call disables a specified rate generator channel on a PCI-20428W.
Parameter Descriptions
slot
assigned slot number of the PCI-20428W.
module
module position number. For the PCI-20428W, this number must be 0 (zero).
channel
channel to disable.
0 = Analog Input Rate Generator
1 = Analog Output Rate Generator (PCI-20428W-1 and -2 Boards only)
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Appendix A: Software Function Call Reference
RGEnable
int RGEnable (int slot, int module, int channel)
Call Description
This call enables the given rate generator channel for its programmed mode.
Parameter Descriptions
slot
assigned slot number of the PCI-20428W.
module
module position number. For the PCI-20428W, this number must be 0 (zero).
channel
channel to enable.
0 = Analog Input Rate Generator
1 = Analog Output Rate Generator (PCI-20428W-1 and -2 Boards only)
123
Appendix A: Software Function Call Reference
A.5.9 Thermocouple Measurement
TCLinearize
Convert voltage data from a thermocouple reading to a temperature
C
Pascal
BASIC
int TCLinearize (double volts, double cjctemp, int type, double far
*temperature);
function TCLinearize (volts, cjctemp: Double; tctype: Integer; var
temperature: Double): Integer;
FUNCTION TCLinearize% (BYVAL volts#, BYVAL cjctemp#, BYVAL tctype%, SEG
temperature#)
TCMeasure
Perform a temperature measurement from analog input channels connected to a thermocouple, cold-junction
reference and zero reference
C
Pascal
BASIC
int TCMeasure (int slot, int module, int channel, int zchannel, int
cjcchannel, int range, int type, double far *temperature);
function TCMeasure (slot, module, channel, zchannel, cjcchannel, range,
tctype: Integer; var temperature: Double): Integer;
FUNCTION TCMeasure% (BYVAL slot%, BYVAL mdl%, BYVAL chn%, BYVAL zchn%, BYVAL
cjcchn%, BYVAL range%, BYVAL tctype%, SEG temperature#)
TCLinearize
int TCLinearize (double volts, double cjctemp, int type, double far *temperature)
Call Description
This function which a voltage value you supply to the volts parameter, to a temperature value based on the
specified type (the thermocouple type) and a Cold-Junction Compensation (CJC) temperature (in °C) specified in
cjctemp. The temperature value (in °C), is returned in the temperature parameter. Supported thermocouple types
are J, K and T and PCI-5B37J, K and T Non-Linearized Thermocouple Signal Conditioning Blocks. The full
temperature range of each thermocouple type is supported. Performing a thermocouple measurement usually
requires two analog input channels (configured for differential operation), one to obtain the thermocouple's output
voltage and the other to acquire CJC data. PCI-5B37 Blocks have built-in CJC and must be connected to singleended analog input channels.
Parameter Descriptions
volts
analog input data in volts. This could be a voltage read on the thermocouple channel, acquired with an AIRead
call. The voltage value must be correctly scaled and converted to a floating point number. You can use the
CountsToVolts utility function to perform the counts to volts conversion and scaling. To convert the analog
input counts data to voltage with the utility, you must know the gain and input range used for the the reading.
Note, for most thermocouple types the output voltages are between -50 mV and +50 mV, a gain of 100 is
typically required.
PCI-5B37J, K and T Non-Linearized Thermocouple Signal Conditioning Blocks have an output span of 0 to 5 V
for their specified temperature ranges (see the type parameter below). When using PCI-5B37 Blocks, the analog
input must be configured for single-ended operation, a gain of 1, and an input range of 0 to +5 V or ±5 V. The
equations to scale the output voltage (Vout), after conversion from counts to volts (using CountsToVolts for
example), from each Block to obtain the actual thermocouple voltage for the volts parameter are given below:
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Appendix A: Software Function Call Reference
PCI-5B37J:
volts = 5.00*(Vout/105.14) - 4.632 mV
PCI-5B37K:
volts = 5.00*(Vout/86.69) - 3.553 mV
PCI-5B37T:
volts = 5.00*(Vout/206.21) - 3.378 mV
cjctemp
the temperature at the junction between the thermocouple leads and the analog input channel on which it was
read in °C. The compensation temperature is typically derived from a linear temperature sensor located at the
thermocouple/input circuit terminal block. If a 1 mV/°K CJC sensor is used, a typical CJC voltage will be 298
mV, which is equivalent to (298 - 273.15)°C = 25°C or 77°F.
If a PCI-5B37J, K or T Non-Linearized Thermocouple Signal Conditioning Block is used, specify 0.0 for
cjctemp.
type
the thermocouple type. Specify one of the following:
TC_TYPE_J = Type J
TC_TYPE_K = Type K
TC_TYPE_T = Type T
TC_TYPE_J_5B = PCI-5B37J (-100 °C to 760 °C)
TC_TYPE_K_5B = PCI-5B37K (-100 °C to 1350 °C)
TC_TYPE_T_5B = PCI-5B37T (-100 °C to 400 °C)
temperature
the temperature value of the thermocouple tip in °C.
TCMeasure
int TCMeasure (int slot, int module, int channel, int zchannel, int cjcchannel, int
range, int type, double far *temperature)
Call Description
This call performs a temperature measurement using a thermocouple connected to an analog input channel, a
Cold-Junction Compensation (CJC) channel, and an optional auto-zero channel. TCMeasure eliminates the need
to make separate AIRead calls to obtain the thermocouple voltage and CJC data. J, K, and T and PCI-5B37J, K
and T Non-Linearized Thermocouple Signal Conditioning Blocks are supported. The full temperature range of
each thermocouple type is supported. The temperature data (in °C), is returned by the call in the temperature
parameter.
When measuring standard thermocouples (i.e., non-PC-5B37 types), the gain will automatically be configured for
a thermocouple channel gain of 100, and a CJC channel gain of 10 (if the input hardware supports these gains). If
the hardware does not support these gains, then a gain of 1 is used and external amplification of these signals is
assumed. Also, the input hardware should be configured for differential input operation for common mode noise
rejection.
If a PCI-5B37 Block is used, the thermocouple channel gain is configured for 1, and a CJC channel is not used.
The input hardware must be configured for single-ended input operation when PCI-5B37 Blocks are used.
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Appendix A: Software Function Call Reference
Parameter Descriptions
slot
assigned slot number of the PCI-20428W.
module
module position number. For the PCI-20428W, this number must be 0 (zero).
channel
thermocouple channel number.
zchannel
auto-zero channel number or AI_NO_ZERO for none. If an auto-zero reference channel is specified, it will be
used to correct the thermocouple input channel prior to the linearization and compensation.
cjcchannel
CJC channel number or TC_NO_CJC for none. Specify TC_NO_CJC if a PCI-5B37 Block is used. The CJC
channel, if used, should be connected to a device which reports reference-junction temperature at 1 mV per
degree Kelvin (°K).
range
analog input range. Input range should be set for ±5 V. Specify the range code BIPOLAR_10.
type
the thermocouple type. Specify one of the following:
TC_TYPE_J = Type J
TC_TYPE_K = Type K
TC_TYPE_T = Type T
TC_TYPE_J_5B = PCI-5B37J (-100 °C to 760 °C)
TC_TYPE_K_5B = PCI-5B37K (-100 °C to 1350 °C)
TC_TYPE_T_5B = PCI-5B37T (-100 °C to 400 °C)
temperature
the temperature value of the thermocouple tip in °C.
126
Appendix A: Software Function Call Reference
A.5.10 Utility Functions
CountsToVolts
Convert a count value returned by AIRead to a floating point voltage value
C
Pascal
int CountsToVolts (int counts, int gain, int range, double far *volts);
function CountsToVolts (counts, gain, range: Integer; var volts: Double):
Integer;
Function CountsToVolts% (ByVal counts%, ByVal gain%, ByVal range%, volts#)
BASIC
FrequencyToRGCounts
Computes the count1 and count2 parameters used in RGConfigure to obtain a rate generator frequency
C
int FrequencyToRGCounts (double frequency, int rgdouble,
unsigned far
*count1, unsigned far *count2);
function FrequencyToRGCounts (frequency: Double; rgdouble: Integer; var
count1: Word; var count2: Word): Integer;
function FrequencyToRGCounts% (BYVAL frequency#, BYVAL rgdouble%, SEG count1%,
SEG count2%)
Pascal
BASIC
VoltsToCounts
Convert from a voltage value to count value suitable as parameter for AOWrite, AOWriteGroup or
TRIGConfigure.
C
Pascal
int VoltsToCounts (double volts, int range, int far *counts);
function VoltsToCounts (volts: Double; range: Integer; var counts: Integer):
Integer;
Function VoltsToCounts% (ByVal volts#, ByVal range%, counts%)
Basic
CountsToVolts
int CountsToVolts (int counts, int gain, int range, double far *volts);
Description
This utility performs a conversion from common analog format counts data to a floating point voltage value.
CountsToVolts is provided for converting the counts values returned from the function call AIRead to voltage.
The calculation requires the input voltage range and the gain used when the input reading was taken.
Parameter Descriptions
counts
count value (from an AIRead operation) you want converted to a voltage value.
range
analog input voltage range used for calculating the counts to voltage conversion. The range value should be the
same as that passed to AIRead.
UNIPOLAR_5 = 0 - 5 V
UNIPOLAR_10 = 0 - 10 V
BIPOLAR_5 = ±2.5 V
BIPOLAR_10 = ±5 V
BIPOLAR_20 = ±10 V
gain
gain used for calculating the counts to voltage conversion. The gain value should be the same as that passed to
AIRead.
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Appendix A: Software Function Call Reference
volts
voltage value calculated and returned by the call.
FrequencyToRGCounts
int FrequencyToRGCounts (double frequency, int rgdouble, unsigned far *count1,
unsigned far *count2);
Description
Based on a frequency value in Hz, this utility calulates the counts values used by the RGConfigure call for
configuring a rate generator. An iterative process is used to compute the best values for count1 and count2. If the
call’s rgdouble flag is set to TRUE, count values for both count1 and count2 are returned (for configuring a 32-bit
or two section rate generator). If the rgdouble flag is set to FALSE, only count1 is returned for configuring a 16bit or single section rate generator such as the PCI-20428W’s rate generators.
Parameter Descriptions
frequency
frequency value in Hz you want converted to count1 and count2 integer values
rgdouble
16 or 32-bit mode flag.
"1" or TRUE for 32-bit rate generator mode
"0" or FALSE for 16-bit rate generator mode
count1and count2
returned values for count1and count2 in the rate generator frequency formula
VoltsToCounts
int VoltsToCounts (double volts, int range, int far *counts);
Description
This utility performs a conversion from a floating point voltage value to a common analog format counts value.
The VoltsToCounts conversion function is provided to prepare voltage data for the functions AOWrite or
AOWriteGroup.
Parameter Descriptions
volts
voltage value you want converted to a counts value.
range
analog output range used for calculating the volts to counts conversion. The range value should be the same as
that passed to AOConfigure.
UNIPOLAR_5 = 0 - 5 V
UNIPOLAR_10 = 0 - 10 V
BIPOLAR_5 = ±2.5 V
BIPOLAR_10 = ±5 V
BIPOLAR_20 = ±10 V
counts
common analog format counts value calculated and returned by the call.
128
Appendix B: PCI-20428W Hardware Technical Reference
Appendix B: PCI-20428W Hardware Technical Reference
B.1 Introduction
While the Master Link Software Libraries support most hardware interactions with the PCI-20428W, we
recognize that you may prefer to write your own software interface. We strongly urge that you use the provided
Software Libraries. They are thorough, efficient, and will save you a great deal of time and effort.
This appendix contains technical details of your hardware, including control and data register information that you
will need for creating application programs if you choose not to use the included Software Libraries.
Programming the PCI-20428W yourself comprises accessing registers (offset registers) addressable at specific
locations from the base I/O address of the board (see Chapter 2). The programming language you use must have
the capability of absolute I/O reference. The offsets on the PCI-20428W can be read and written with the
following limitations: offsets may be read-only, write-only, or read-write. In some cases the same offset may be
used for two different functions, depending on whether it is read or written. In such a case, or if a register is writeonly, you will not be able to read back data that was previously written to the register. You must save the data in
program memory if you will need to use it again. In some cases, just reading or writing an offset may trigger an
event, such as a board reset command, regardless of the data involved. Be careful not to inadvertently read or
write these command offsets.
Each of the following sections in Appendix B describe a major PCI-20428W functional area and how it is
programmed through it's offset registers. The last section of this appendix (Section B.8) lists all the offset
registers and their functions. All offset register addresses are expressed in Hexadecimal.
B.2 PC/XT Bus Interface
The computer communicates with and controls the functions of a PCI-20428W by accessing registers at I/Omapped offsets through the board's Bus Interface.
B.2.1 General Description
An 8-bit, PC/XT bus interface is provided for communications between the board and the host computer. The bus
interface allows access to the board's control, data and ID registers. In addition, the bus interface supports DMA
and Interrupt requests. Each of these areas is outlined below.
A PCI-20428W Board's functions are mapped into 16 locations in the computer's I/O space starting from the
board's base I/O address. The base I/O address is set by a 6-position on-board DIP switch as described in Chapter
2. One of these I/O locations, when read, returns the board's 8-bit board model ID code. By performing a write
operation to the same location a PCI-20428W Board will be initialized or reset to its power-up condition.
DMA transfers for analog input and analog output data are supported for the PCI-20428W-1 and -2, while analog
input DMA transfer is supported for the PCI-20428W-3. In the case of a PCI-20428W-1 or -2 Board, two DMA
channels are provided for simultaneous analog input and analog output transfers. For the PCI-20428W-3, one of
two available DMA channels may be used for analog input DMA. The DMA channel or channels used are
selected through board jumper settings.
A PCI-20428W Board can generate an interrupt request to the computer on one of three (IRQ) interrupt lines.
The interrupt sources include the A/D End Of Convert (EOC), and rate generator signals. The interrupt level and
source is jumper-selectable.
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B.2.2 Detailed Description
Base Address
The base I/O address of a board is determined by a 6-position DIP switch on the board. These switches
correspond to address bits A9-A4 on the PC/XT bus. This allows the base address of a board to be set on 16-byte
boundaries between I/O offsets 000 - 3FF. All of the board I/O locations are accessed as offsets from this base
address. Section B.8 of this appendix contains a list of the I/O offsets (offset registers). Changing the factory
default base I/O address (320) of a board is discussed in Chapter 2. Each I/O mapped board in your system (such
as another PCI-20428W Board, a sound card, etc.) must have a unique base I/O address.
DMA Channels
Support for DMA transfers on two PC/XT bus DMA channels, channels 1 and 3, is provided. When using a PCI20428W-1 or -2, one DMA channel can be used for analog input transfers and the other channel can be used for
analog output transfers. When using a PCI-20428W-3 one of the two available DMA channels can be used for
analog input transfers. If both DMA channels are available in the computer, the PCI-20428W-1 or -2 will support
simultaneous analog input and analog output DMA. The DMA channel or channels used must be jumper-selected
on the board. All DMA jumpers are removed (no DMA) in the factory default configuration (see Chapter 2 for
jumper information). Input and output DMA processes use Single Transfer mode, as defined by the PC's DMA
controller. DMA processes are discussed in greater detail in the analog input and analog output sections of this
appendix.
Interrupts
A PCI-20428W Board can generate an active-high interrupt signal on one of three PC/XT interrupt lines: IRQ2,
IRQ3 or IRQ5. When using a PCI-20428W-1 or -2, available interrupt sources include the A/D End Of Convert
(EOC) signal, the Analog Input Rate Generator's output and the Analog Output Rate Generator's output. When
using a PCI-20428W-3, available interrupt sources include the A/D End Of Convert (EOC) signal and the Analog
Input Rate Generator's output. For proper operation, only one interrupt source and one interrupt level can be
selected. Interrupt sources and levels are selected with jumpers (see Chapter 2).
The status of interrupt signals is available by reading the status register at offset 01. The Analog Output Rate
Generator status is available at bit 2, bit 1 contains the status of the Analog Input Rate Generator and the A/D's
EOC signal is read at bit 0. Note: Bit 2 of a PCI-20428W-3 Board's status register is reserved. The rate
generator status bits are set on a high-level of the corresponding rate generator signal and are reset with the status
reset command, a write to offset 01. The A/D EOC status bit is set at the end of the A/D conversion and
automatically reset when the MSB of the conversion result is read from offset 0B. The A/D EOC interrupt is only
generated if the conversion was started with a software start convert command, a write to offset 0A. When the
Analog Input Rate Generator or a signal connected to the External Input is used to start A/D conversions, A/D
EOC interrupt status is not generated.
Board IDs
The PCI-20428W-1, -2 and -3 Boards have unique 8-bit board IDs which can be read from the board ID register
at offset 00. The ID codes for the PCI-20428W products are listed below:
PCI-20428W-1 configured for single-ended operationID code = 30 Hex
PCI-20428W-1 configured for differential operation
ID code = 31 Hex
PCI-20428W-2 configured for single-ended operationID code = 32 Hex
PCI-20428W-2 configured for differential operation
ID code = 33 Hex
PCI-20428W-3 single-ended operation
ID code = 34 Hex
These unique IDs allow software to differentiate between each model and detect the analog input configuration.
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Board Reset
Boards are initialized on power-up and can also be reset with software. The board reset command is generated
with a write to offset 00. The actual data written is irrelevant.
B.3 Analog Inputs
The PCI-20428W-1 or -2 Boards can be configured for 16 single-ended or 8 differential analog input channels.
The PCI-20428W-3 Board has 16 single-ended analog input channels.
B.3.1 General Description
All analog input signals are available on a board's I/O connector at the back of the computer. Analog input
channels are multiplexed to an amplifier which supplies input to a board's A/D converter. For a PCI-20428W-1 or
-2 Board, the pin definitions of the I/O connector's analog input signals change for single-ended or differential
operation (see Chapter 2 for a pin diagram of the I/O connector). The PCI-20428W-3 Board always operates in
single-ended mode.
When a PCI-20428W-1 or -2 is set for differential mode, signal pairs are multiplexed to the inverting and noninverting inputs of the board's programmable gain amplifier. In single-ended mode, the inverting input of the
amplifier is jumpered to analog ground and analog signals are multiplexed to the amplifier's non-inverting input.
The multiplexer or "channel scanner" is controlled by writing channel data to one of the board's control registers.
For a PCI-20428W-1 or -2, the gain of the amplifier is programmed at this register also. (The analog input gain of
a PCI-20428W-3 is not programmable.) The PCI-20428W-1 provides programmable analog input gains of 1, 10
or 100. Gains of 1, 2, 4 or 8 are available on the PCI-20428W-2. The PCI-20428W-3 has a fixed gain of 1.
The A/D converter used on these boards has 12-bit resolution and supports a maximum throughput rate of 100
kHz. Four jumper selected input ranges are also provided. A/D conversions can be started by software or
hardware means and results can be transferred to computer memory under software or hardware (DMA) control.
A conversion can be started through software by writing to a particular control register. Results of the conversion
are read at LSB and MSB result registers. Under DMA control, A/D conversions can be started using the onboard Analog Input Rate Generator or the External Input on the board's I/O connector. Two DMA modes are
supported: "Start on Command" and "Start on Trigger". In a DMA process, multiple channels can be scanned
using the on-board channel scanner. Channels 0 - N can be scanned sequentially at a single gain, where N is the
last channel in the list.
B.3.2 Detailed Description
Channel Selection and Configuration
The analog input channel is selected by writing the channel code (0000 to 1111) to bits 3-0 of the analog input
channel/gain register at offset 09. When programming the channel code, the channel scanner must be disabled by
specifying 0 at bit 6 of the 8-bit control word written to this register. When performing software controlled
conversions the channel scanner must be disabled at bit 6. The channel code in bits 3-0 of the analog input
channel/gain register at offset 09 represents scanner channel "N" when the scanner is enabled. This mode is used
when performing analog input DMA.
For PCI-20428W-1 and -2 Boards the analog input configuration is jumper-selectable for either single-ended or
differential inputs. If a PCI-20428W-1 or -2 is configured for differential operation, bit 3 of the channel code
written to offset 09 is ignored since there are eight differential channels.
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For PCI-20428W-1 and -2 Boards, analog input gain is selected by writing the gain code (00 to 11) to bits 5-4 of
the analog input channel/gain register at offset 09. Bits 5-4 of this register are ignored if you are programming a
PCI-20428W-3 Board.
Jumper-selectable analog input ranges of ±5V, ±10V, 0-5V and 0-10V are supported. Whenever a new input
range is selected the analog input circuit must be recalibrated. A calibration procedure is given in Appendix D.
All jumper settings and jumper locations are provided in Chapter 2 of this manual.
Analog-to-Digital Converter (A/D) Operation
The A/D's 12-bit result is right-justified into two 8-bit registers, with the LSB of the result at offset 0A and the
MSB at offset 0B. Bits 11 to 15 of the 16-bit value are indeterminate as shown below. The converter data is
output in straight (unsigned) binary format.
D15 . . . . D11 . . . . . . . . D0
X X X X MSB - - - - - - - - - - - - LSB
The result can be transferred to the host computer under software or hardware (DMA) control. The analog input
DMA process is enhanced with a 1 kword FIFO to buffer the data from the A/D converter to the bus. Analog
input conversions can be started by software, the on-board Analog Input Rate Generator or through the External
Input:
A software start convert command is generated with a write of offset 0A. The analog input channel you wish to
convert with a software command is selected at bits 3-0 of offset 09, the analog input channel/gain register.
Gain is set by bits 5 and 4 of this register if you are programming a PCI-20428W-1 or -2. When performing a
software start convert command, the channel scanner must be disabled at bit 6 of offset 09.
The Analog Input Rate Generator is enabled at bit 5 of the configuration register at offset 08. See the rate
generator section of this appendix for configuration information on the Analog Input Rate Generator. This rate
generator can be used to start conversions in DMA "Start on Command" mode or DMA "Start on Trigger" mode
(see "Analog Input DMA" below).
The External Input can only be used to start conversions in DMA "Start on Command" mode and only if the
Analog Input Rate Generator is disabled (see "Analog Input DMA" below). The External Input (pin 47 of the
50-pin I/O connector) is buffered and connected to a pull-down resistor. A rising-edge (TTL-level) on the
External Input will start a conversion. This input also functions as the DMA trigger signal in DMA "Start on
Trigger" mode.
Analog Input DMA
Introductory Note: The PCI-20428W Boards perform Direct Memory Access data transfers in conjunction with
the PC's system DMA controller, which is an Intel 8237A High Performance Programmable DMA Controller.
For detailed information on the operation of this part, you should consult the Intel 8237A data sheet (available
from Intel) as well as the Technical Reference Manual for your computer.
The analog input scanner must be used for analog input DMA acquisition. Channels are scanned sequentially
from 0 to "N", where "N" is the last channel in the list. The channel code in bits 3-0 of the analog input
channel/gain register at offset 09 represents scanner channel "N" when the scanner is enabled. The channel
scanner is automatically advanced at the beginning of each conversion. When the scanner reaches channel "N", it
resets itself to channel 0 for the next conversion. All channels in the list are scanned at the same gain, which is
programmed at bits 5 and 4 of offset 09 (these bits are ignored by a PCI-20428W-3).
For DMA operation, a DMA request is generated by the A/D End Of Convert (EOC) signal. Both bytes of the
result are transferred from the analog input FIFO with each EOC using Single Transfer DMA mode on the PC/XT
Bus. The PC's DMA controller must be programmed correctly for this operation to work successfully. An
available DMA channel (DMA channel 1 or 3) must also be selected using the board's jumpers.
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The number of transfers you want to perform, and the start of the buffer into which acquisition data will be stored
must be written to the PC's DMA controller. This is done by writing the "Base Address" of the DMA buffer and
the "Word Count" (number of desired transfers) to appropriate registers on the PC's DMA controller.
One of the two analog input DMA start modes, "Start on Command" or "Start on Trigger", must be selected at bit
0 of the board's configuration register at offset 08. If "Start on Trigger" mode is selected, the External Input line
is used for the DMA start trigger and the Analog Input Rate Generator must be used to start A/D conversions. In
"Start on Command" mode, analog input DMA is enabled by setting bit 3 of the configuration register to "1". The
Analog Input Rate Generator or the External Input may be used to start A/D conversions in this start mode.
When programming a DMA acquisition, make sure that the PCI-20428W's DMA controller is enabled before the
PC's DMA controller is enabled. Prior to starting any DMA acquisition, the PC's DMA controller operating mode
must be properly configured for compatibility with the PCI-20428W. Compatible modes are discussed in the
following paragraphs. Please refer to the Intel 8237A data sheet for detailed information on the operation of the
PC's DMA controller.
Either DMA start mode can initiate a Terminal Count or an Auto-Initialize DMA process. The operating mode of
the DMA process is selected through the "DMA Mode Register" of the PC's DMA controller. Note, the required
transfer mode (Single Transfer) is also selected at this register of the PC's DMA controller. Terminal Count or
Auto-Initialize mode is programmed by setting the "Auto-Initialize" bit of this register to 0 or 1, respectively. The
selected operating mode determines how the DMA process is terminated, as outlined below:
Terminal Count
When the requested number of transfers (specified in "Word Count") have been made, a Terminal Count signal
is issued from the PC's DMA controller to the board . At this point, any further DMA transfer requests from the
board are ignored until the DMA controller is re-enabled. When the board receives the Terminal Count signal,
bit 3 of the board's status register (offset 01) is set to "1". Note, the trigger (External Input) status is available
through the status register at bit 5. Status bits are latched on a high-level of the corresponding signal and reset
with the status reset command, a write to offset 01.
Auto-Initialize
When the specified number of transfers have been made in Auto-Initialize mode, the "Base Address" and "Word
Count" are re-initialized to their original values and the process is automatically restarted. This cycle continues
until DMA requests are disabled or terminated through software commands. To stop this mode, both the PC's
and the board's DMA controllers should be disabled. Bit 3 of the configuration register offset 08 is used to
enable or disable the analog input DMA process. Please refer to the Intel 8237A data sheet for information on
disabling DMA requests.
If an analog input DMA process is stopped before completion in Terminal Count mode, or when an AutoInitialize mode is stopped, the analog input channel list scanner must be reset before the DMA process can be
resumed. This is done by disabling and re-enabling the channel scanner. Bit 6 of the analog input channel/gain
register, offset 09, is used to enable and disable the channel scanner. Status signals should also be reset by a write
to offset 01, after a DMA process is stopped.
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B.4 Analog Outputs
The PCI-20428W-1 and PCI-20428W-2 each have two 12-bit resolution analog output channels. (The
information presented in this section is not applicable to the PCI-20428W-3.)
B.4.1 General Description
Two voltage output channels are provided on a PCI-20428W-1 or -2 using a dual 12-bit Digital-to-Analog
Converter (DAC or D/A converter). Three jumper selected output ranges are provided. Maximum throughput
rate using a single channel is 100 kHz (50 kHz when both channels are used). Output channels are available on
the board's I/O connector at the back of the computer.
Analog output data can be transferred to the board via software command, or under DMA control using the onboard Analog Output or Input Rate Generators. Analog output DMA operates in "Start on Command" mode.
Data can be transferred to one or both analog output channels in a single DMA process. The analog output DMA
process is enhanced with a 1 kword FIFO to buffer data from the bus to the D/A converters.
B.4.2 Detailed Description
Digital-to-Analog (DAC) Converter Operation
Each voltage output channel, channel 0 and 1, can be independently jumper-configured for output ranges of ±5V,
0-10V, or ±10V (see Chapter 2). The analog output circuit must be recalibrated whenever a new range is selected.
A calibration procedure is provided in Appendix D. On power-up, both analog output channels will initialize to
negative full scale, the actual output voltage will depend on which output range is selected.
The analog output data for each DAC, DAC A and DAC B, is written in two bytes. Channel 0's input data is
written to offset 0C, the DAC A LSB register, and offset 0D, the DAC A MSB register. Channel 1's input data is
written to offset 0E, the DAC B LSB register, and offset 0F, the DAC B MSB register. The converter input data
must be supplied in straight (unsigned) binary format. Bits 4 to 7 of the MSB are ignored.
After data has been written, both DACs are updated simultaneously with either an analog output update command,
a write to offset 0B, or an Analog Output Rate Generator pulse. The Analog Output Rate Generator is enabled at
bit 6 of offset 08, the configuration register. See the rate generator section of this appendix for information on the
Analog Output Rate Generator.
Analog Output DMA
Introductory Note: The PCI-20428W Boards perform Direct Memory Access data transfers in conjunction with
the PC's system DMA controller, which is an Intel 8237A High Performance Programmable DMA Controller.
For detailed information on the operation of this part, you should consult the Intel 8237A data sheet (available
from Intel) as well as the Technical Reference Manual for your computer.
For DMA operation the Analog Output Rate Generator is normally used. The Analog Input Rate Generator can
be used if jumper selected at W39 when synchronoized analog input and output DMA is desired. An analog
output update is generated for each pulse from the Rate Generator. Analog output data is transferred to the board
using Single Transfer DMA on the PC/XT Bus. The PC's DMA controller must be programmed correctly for this
operation to work successfully. An available DMA channel (DMA channel 1 or 3) must also be selected using the
board's jumpers.
Analog output DMA operates in "Start on Command" mode. Prior to starting analog output DMA, the analog
output DMA process must first be enabled at bit 4 of the configuration register at offset 08. Next, the output
DMA process is started by generating the output DMA start command, a write to offset 03. Analog output data is
transferred as fast as possible from the PC’s memory to the D/A’s FIFO with the generation of the start command.
Subsequent output data is transferred when this FIFO is empty. Conversions are initiated with each Rate
Generator pulse.
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An output DMA process can run in Terminal Count or Auto-Initialize mode. The operation of these modes are
briefly explained in the previous section on Analog Input DMA. Terminal Count status for the analog output
DMA process is read at bit 4 of the status register at offset 01. This status bit is latched on when the Terminal
Count signal is received and reset with the status reset command, a write to offset 01. Bit 4 of the configuration
register offset 08 is used to enable or disable the Analog Output DMA process. Bit 6 of the configuration register
offset 08 is used to enable or disable the Analog Output Rate Generator. Please note, however, that the Analog
Output DMA enable and Analog Output Rate Generator enable controls are latched in hardware and are not
cleared until the analog output FIFO is empty (after Analog Output DMA or the Analog Output Rate Generator is
disabled at offset 08). These latched signals may be read on bits 6 and 7 of the status register (offset 01) and can
be cleared with a board reset signal (write to offset 0) or a status reset (write to offset 01).
Analog output DMA can be configured for single or dual channel output at bit 1 of the configuration register
(offset 08). Single channel output DMA transfers data to DAC A (i.e. channel 0) only. For each Analog Output
Rate Generator pulse, two bytes are transferred. DAC A LSB is transferred first and then DAC A MSB. If dual
channel DMA output is selected, data is transferred to both DAC A and DAC B. For dual operation, the data for
both analog output channels must be interleaved in the same DMA buffer and four bytes are transferred for each
pulse from the rate generator. DAC A data will be transferred first, LSB then MSB, followed by DAC B data,
LSB then MSB.
B.5 Rate Generators
Two independent rate generators are provided on a PCI-20428W-1 or a PCI-20428W-2 Board. The PCI20428W-3 has one rate generator.
B.5.1 General Description
On a PCI-20428W-1 or -2, one rate generator is provided for pacing A/D conversions and the other is for pacing
D/A conversions. Through a jumper setting (W39), both A/D and D/A conversions can be paced from the Analog
Input Rate Generator for synchonized DMA input and output processes. The PCI-20428W-3 Board's rate
generator is used for pacing A/D conversions only. A rate generator may be clocked directly from the on-board 8
MHz crystal oscillator or through a programmable rate generator prescaler used to divide the oscillator frequency.
These options allow output ranges from 120 Hz to 4 MHz when a rate generator is directly clocked from the
oscillator, or 0.00186 Hz to 2 MHz when the prescaler is used. The Analog Input Rate Generator output is
available on a board's I/O connector at the back of the computer.
B.5.2 Detailed Description
Rate Generator Circuit
Rate generators and the rate generator prescaler are implemented with an Intel 8254 counter integrated circuit. A
rate generator uses one of the three 16-bit counter channels in this chip. Counter channel 2 on the 8254 is the
Analog Input Rate Generator for all PCI-20428W models. 8254 counter channel 1 is used for the Analog Output
Rate Generator on the PCI-20428W-1 and -2. If the prescaler option is disabled, 8254 counter channel 0 is used
as the board's general purpose Counter channel 0. When the prescaler option is enabled, 8254 counter channel 0
is used as the rate generator prescaler and the clock inputs of both rate generators will be simultaneously driven by
the output of the prescaler. Counter channel 0 is not available for counting purposes in this case.
Bits 7, 6, 5 and 2 of a PCI-20428W-1 or -2 Board's configuration register (offset 08) are used to enable and
disable the rate generators and the prescaler. Bits 7, 5 and 2 of a PCI-20428W-3 Board's configuration register
(offset 08) are used to enable and disable the Analog Input Rate Generator and the prescaler. A rate generator's
output is inverted to provide active-high output pulses. Counter channel 0's output is not inverted.
Rate Generator Operation
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Appendix B: PCI-20428W Hardware Technical Reference
A rate generator, or the rate generator prescaler, is programmed by setting its 8254 counter mode and setting its
initial 16-bit count value. The counter mode is written to the 8254 counter control register at offset 07. A
different code must be written to this register depending on which device is being programmed and the mode it is
programmed for. Recommended codes for programming the mode of a rate generator and the rate generator
prescaler (and counter 0) are given in Section B.8 under the counter control register (offset 07) listing.
A rate generator's output frequency, or the prescaler's output frequency, is its input frequency divided by the initial
count value. Each rate generator and the prescaler has its own initial count register. The Analog Input Rate
Generator initial count value is written to offset 06. On PCI-20428W-1 and -2 Boards, the Analog Output Rate
Generator initial count value is written to offset 05. The prescaler initial count value is written to offset 04. Both
bytes of a 16-bit initial count value, LSB then MSB, must be written successively to the desired count register.
Count values are allowed to range from 2 to 65535. The formula for a rate generator's output frequency is given
below.
frequency = 8MHz / (rate generator count value * prescale count value)
If the prescaler is disabled, the prescale count value in the above equation is 1. The output will be periodic activehigh pulses, 125 ns wide, at the programmed frequency.
If the prescaler is enabled, the rate generators will have variable duty-cycle outputs. The high portion of the
prescaled rate generator variable duty-cycle output is set by the following formula:
high period = (prescaler count value) x 125ns
where the count value is in the range from 2 to 65535.
The status of rate generator output signals is available in the status register at offset 01. The Analog Output Rate
Generator status (PCI-20428W-1, -2) is available at bit 2. Bit 1 contains the status of the Analog Input Rate
Generator. These status bits are set on a high-level of the corresponding rate generator signal and are reset with
the status reset command, a write to offset 01. These signals are available as interrupt sources to the PC/XT bus.
B.6 Counter
One 16-bit counter channel is provided by a PCI-20428W Board for general use. The 16-bit counter channel is
available for use as a general purpose counter, unless the rate generator prescaler is enabled. The counter's clock
and gate inputs and output signal are available on the board's I/O connector at the back of the computer.
The general purpose counter and the rate generators are implemented with an 8254, as described in the rate
generators section of this appendix. Counter channel 0 on the 8254 is used for the general purpose counter if it is
not being used as the rate generator prescaler. 8254 counter channel 1 is used for the Analog Output Rate
Generator and counter channel 2 on the 8254 is for the Analog Input Rate Generator. The general purpose
counter is selected by disabling the rate generator prescaler at bits 7 and 2 of the configuration register (offset 08).
The general purpose counter is programmed by writing the 8254 counter mode first and then the count value. The
counter mode is written to the 8254 counter control register at offset 07. The recommended counter control code
is given in the counter control register offset description in section B.8. For other configurations, please refer to
Intel's 8254 data sheet. 16-bit count values are written as two consecutive bytes, LSB then MSB, to the count
register at offset 04. Both bytes of the 16-bit count value must be written successively to count register for proper
operation. Count values must be in the range from 2 to 65535 for the counter mode recommended in Section B.8.
Successive reads of the count register will return the 16-bit count value, LSB then MSB, programmed for the
counter. Prior to reading data back, the "counter latch" and "read command" must be written to the counter
control register at offset 07. Please refer to Intel's 8254 data sheet for these command codes and other counter
options.
B.7 Digital I/O
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Appendix B: PCI-20428W Hardware Technical Reference
PCI-20428W Boards provide 16 bits of buffered, TTL-compatible digital I/O. Port 0 is an 8-channel input only
port and port 1 is an 8-channel output only port. The digital input data on port 0 is read from offset 02. Port 1
output data is written to offset 02. Port 0 input data is not latched by the PCI-20428W Board. Reading offset 02
will return whatever data is currently on the port's inputs. Output data is latched by the PCI-20428W into port 1
during a write to offset 02. Data previously written to output port 1 will remain in the latch until the next write to
offset 02. All of the digital I/O bits are available on the board's 50-pin I/O connector at the back of the computer.
All digital output bits are initialized to zero on power-up.
B.8 Offset Register Descriptions
The offset registers from the board's base address are listed in Table B.1. All register addresses are expressed in
hexadecimal. This table also tells whether the registers are read, write, or read/write, and summarizes each
register's functions. The remainder of this section describes each of these offsets individually.
Table B.1: PCI-20428W Offset Registers
Offset
00
01
02
03
Register Description
Board ID Register (R) / Board Reset Command (W)
Status Register (R) / Status Reset Command (W)
Digital Input Port 0 Register (R) / Digital Output Port 1 Register (W)
Output DMA Start Command (W) (Not used on a PCI-20428W-3)
04
05
06
07
General Purpose Counter / Rate Generator Prescaler Count Register (R/W)
AO Rate Generator Count Register (R/W) (Not used on a PCI-20428W-3)
AI Rate Generator Count Register (R/W)
8254 Counter Control Register (R/W)
08
09
0A
0B
Configuration Register (W)
AI Channel / Gain Register (W)
AI Result LSB Register (R) / AI Start Convert Command (W)
AI Result MSB Register (R) / AO Update Command (W)
0C
0D
0E
0F
AO DAC A LSB Register (W)
AO DAC A MSB Register (W)
AO DAC B LSB Register (W)
AO DAC B MSB Register (W)
OFFSET 00:
Board ID Register (R) / Board Reset Command (W)
Read function:
Bit
Description
7-0
Board ID:
(Not used on a PCI-20428W-3)
(Not used on a PCI-20428W-3)
(Not used on a PCI-20428W-3)
(Not used on a PCI-20428W-3)
30 = PCI-20428W-1, single-ended inputs
31 = PCI-20428W-1, differential inputs
32 = PCI-20428W-2, single-ended inputs
33 = PCI-20428W-2, differential inputs
34 = PCI-20428W-3, single-ended inputs
35 - 3F = Reserved
Write function: A write to this offset will reset the board to its initial state. The data written is ignored.
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OFFSET 01:
Status Register (R) / Status Reset Command (W)
Read function:
Bit
Description
7*
Latched Analog Output Rate Generator Enable 0 = Not Enabled 1= Enabled
6*
Latched Analog Output DMA Enable
0 = Not Enabled 1= Enabled
5
AI External Trigger:
0 = No DMA Trigger, 1 = DMA Trigger Occurred
4*
AO Terminal Count:
0 = No Output TC, 1 = Output TC Occurred
3
AI Terminal Count:
0 = No Input TC, 1 = Input TC Occurred
2*
AO Rate Gen Interrupt:
0 = No Rate Gen, 1 = Rate Gen Occurred
1
AI Rate Gen Interrupt:
0 = No Rate Gen, 1 = Rate Gen Occurred
0**
AI EOC Interrupt:
0 = No Data, 1 = Data Available
* Reserved bit on a PCI-20428W-3 Board.
** AI EOC interrupt and status available for software conversions only.
Write function: Interrupt Status Register clear. A write to this offset will clear the status register.
The data written is ignored.
OFFSET 02:
Digital Input Port 0 Register (R) / Digital Output Port 1 Register (W)
Read function: Digital Input Port Data
Bit
Description
7-0
DI7 - DI0
Write function: Digital Output Port Data is written to DO0 - DO7
Bit
Description
7-0
DO7 - DO0
OFFSET 03:
Output DMA Start Command (W) (Not used on a PCI-20428W-3)
Read function: Not valid.
Write function: The analog output DMA process is started. The data written is ignored.
OFFSET 04:
General Purpose Counter / Rate Generator Prescaler Count Register (R/W)
Read function: General Purpose Counter or Rate Generator Prescaler count value. The actual function is
selected by bit 7 and bit 2 at Offset 08. The data is read back LSB first , then MSB. The data must first
be latched by writing 00 to Offset 07 (See Intel's 8254 counter data sheet)
Write function: General Purpose Counter or Rate Generator Prescaler count value. The data is written LSB
first , then MSB.
OFFSET 05:
AO Rate Generator Count Register (R/W) (Not used on a PCI-20428W-3)
Read function: Analog Output Rate Generator count value. The data is read back LSB first , then MSB.
The data must first be latched by writing 00 to Offset 07.
Write function: Analog Output Rate Generator count value. The data is written LSB first , then MSB.
138
Appendix B: PCI-20428W Hardware Technical Reference
OFFSET 06:
AI Rate Generator Count Register (R/W)
Read function: Analog Input Rate Generator count value. The data is read back LSB first , then MSB. The
data must first be latched by writing 00 to Offset 07
Write function: Analog Input Rate Generator count value. The data is written LSB first , then MSB.
OFFSET 07:
8254 Counter Control Register (R/W)
Write function:
Bit
Description
7-0
Control Code:
B4 = Analog Input Rate Generator
74 = Analog Output Rate Generator (not applicable to a PCI-20428W-3)
34 = Rate Generator Prescaler, or
30 = General Purpose Counter
Other = see 8254 data sheet
Read function: See Intel's 8254 counter data sheet.
OFFSET 08:
Configuration Register (W)
Write function:
Bit
Description
7
RG Prescale Select:
0 = Counter 0, 1 = RG Prescale
*6
AO Rate Gen Enable:
0 = Disable, 1 = Enable
5
AI Rate Gen Enable:
0 = Disable, 1 = Enable
*4
Output DMA Enable:
0 = Disable, 1 = Enable
3
Input DMA Enable:
0 = Disable, 1 = Enable
2
RG Prescaler Enable
0 = Disable, 1 = Enable
*1
Output DMA Mode:
0 = Single Channel, 1 = Dual Channel
0
Input DMA Mode: 0 = Start on Command, 1 = Start on Trigger
* Reserved bit on a PCI-20428W-3 Board.
Read function: Invalid.
OFFSET 09:
AI Channel / Gain Register (W)
Write function:
Bit
Description
7
Reserved
6
Scanner Enable: 0 = Disable, 1 = Enable
*5-4
Gain Code (-1 / -2):
00 =
1/1
01 = 10 / 2
10 = 100 / 4
11 = Rsvd / 8
3-0
AI / Scanner Channel Code:
0000 - 1111
* Reserved bits on a PCI-20428W-3 Board.
Read function: Invalid.
139
Appendix B: PCI-20428W Hardware Technical Reference
OFFSET 0A:
AI Result LSB Register (R) / AI Start Convert Command (W)
Read function: Analog input LSB, format shown below:
Bit
Description
7
AI Data Bit 7
6
AI Data Bit 6
5
AI Data Bit 5
4
AI Data Bit 4
3
AI Data Bit 3
2
AI Data Bit 2
1
AI Data Bit 1
0
AI Data Bit 0
Write function: A new analog input conversion is initiated.
OFFSET 0B:
AI Result MSB Register (R) / AO Update Command (W)
Read function: Analog input MSB, format shown below:
Bit
Description
7
x
6
x
5
x
4
x
3
AI Data Bit 11
2
AI Data Bit 10
1
AI Data Bit 9
0
AI Data Bit 8
Write function: The analog output is updated with the previously loaded data (see Offsets 0C - 0F).
OFFSET 0C:
AO DAC A LSB Register (W) (Not used on a PCI-20428W-3)
Write function: Analog output Channel 0 LSB, format shown below:
Bit
Description
7
AO Data Bit 7
6
AO Data Bit 6
5
AO Data Bit 5
4
AO Data Bit 4
3
AO Data Bit 3
2
AO Data Bit 2
1
AO Data Bit 1
0
AO Data Bit 0
Read function: Invalid.
140
Appendix B: PCI-20428W Hardware Technical Reference
OFFSET 0D:
AO DAC A MSB Register (W) (Not used on a PCI-20428W-3)
Write function: Analog output Channel 0 MSB, format shown below:
Bit
Description
7
x
6
x
5
x
4
x
3
AO Data Bit 11
2
AO Data Bit 10
1
AO Data Bit 9
0
AO Data Bit 8
Read function: Invalid.
OFFSET 0E:
AO DAC B LSB Register (W) (Not used on a PCI-20428W-3)
Write function: Analog output Channel 1 LSB, format shown below:
Bit
Description
7
AO Data Bit 7
6
AO Data Bit 6
5
AO Data Bit 5
4
AO Data Bit 4
3
AO Data Bit 3
2
AO Data Bit 2
1
AO Data Bit 1
0
AO Data Bit 0
Read function: Invalid.
OFFSET 0F:
AO DAC B MSB Register (W) (Not used on a PCI-20428W-3)
Write function: Analog output Channel 1 MSB, format shown below:
Bit
Description
7
x
6
x
5
x
4
x
3
AO Data Bit 11
2
AO Data Bit 10
1
AO Data Bit 9
0
AO Data Bit 8
Read function: Invalid.
141
Appendix B: PCI-20428W Hardware Technical Reference
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142
Appendix C: Specifications
Appendix C: Specifications
PCI-20428W BOARD ELECTRICAL SPECIFICATIONS
(All specifications are typical at 25ºC unless otherwise noted.)
PARAMETER
Bus Compatibility
Analog Input
Number of Channels
PCI-20428W-1,-2
PCI-20428W-3
Resolution
Voltage Ranges
PCI-20428W-1
PCI-20428W-2
PCI-20428W-3
Overvoltage Protection
Gain Accuracy
PCI-20428W-1, -2
PCI-20428W-3
Offset Voltage
Bias Current
Input Impedance
Common Mode
Range
Rejection
PCI-20428W-1, -2
Noise
PCI-20428W-1, -2
PCI-20428W-3
Monotonicity
Linearity Error
PCI-20428W-1, -2
PCI-20428W-3
Analog Output
PCI-20428W-1, -2
Number of Channels
Resolution
Voltage Ranges
Accuracy
Gain
Linearity Error
Offset Voltage
Monotonicity
Output Current
Digital I/O
Number of Ports
Input Levels
Input Current, High-Level
Input Current, Low-Level
Output Levels
Source Current
Sink Current
External Input
Input Level
Input Current, High-Level
Input Current, Low-Level
CONDITIONS
SPECIFICATION
PC/XT/AT and EISA
Single-ended/Differential
Single-ended
16/8
16
12 bits (1 part in 4096)
Gain = 1
Gain = 10
Gain = 100
Gain = 1
Gain = 2
Gain = 4
Gain = 8
Gain = 1
Power on/ Power off
±5V, ±10V, 0-5V, 0-10V
±0.5V, ±1V, 0-0.5V, 0-1V
±50mV, ±0.1V, 0-50mV, 0-0.1V
±5V, ±10V, 0-5V, 0-10V
±2.5V, ±5V, 0-2.5V, 0-5V
±1.25V, ±2.5V, 0-1.25V, 0-2.5V
±625mV, ±1.25V, 0-625mV, 0-1.25V
±5V, ±10V, 0-5V, 0-10V
±35V/±20V
Gain = 1
Gain = 2, 4, 8, 10
Gain = 100
Gain = 1
RTI
0.02% max
0.07% max
0.25% max
0.02% max
±2.44mV max
500pA
109Ohms/10pF
Vcm = Vrange - (Vdiff *Gain)/2
60Hz, 100ohm imbalance
Gain ≤ 10
Gain = 100
Input grounded at connector; RMS / p-p
Gain = 1
Gain = 1
No missing codes
±10V (DC + Peak AC) min
80dB / 0.04LSB/V min
90dB / 1.3LSB/V min
0.5 LSB RMS max
0.5 LSB RMS max
12 bits
±0.024%, ±1 LSB max
±0.024%, ±1 LSB max
2
12 bits (1 part in 4096)
±5V, 0-10V, ±10V
±1LSB
0.024%
±2.44 mV max
11 bits
±5mA
8 channels (bits) each
Vout = high
Vout = low
2 (1 input , 1 output)
TTL compatible (Schmitt-trigger)
20uA
200uA
TTL compatible
400uA
8mA
TTL compatible (Schmitt-trigger)
20uA
200uA
(Continued on next page)
143
Appendix C: Specifications
PARAMETER
Timebase Generators
Number of Channels
PCI-20428W-1, -2
PCI-20428W-3
Type
Resolution
Output Frequency
16-bit Operation
Prescaled
Output Levels
Source Current
Sink Current
Counters
Number of Channels
Clock Speed
Input Levels
Input Current, High-Level
Input Current, Low-Level
Output Levels
Source Current
Sink Current
Interrupts
PCI-20428W-1, -2
Sources
PCI-20428W-3
Sources
PC Levels
System Throughput
Multi-Channel Analog Input or
Analog Output Under DMA control
DMA Channels
Number supported
PC Channels supported
Modes
Input
CONDITIONS
crystal-based
144
2
1
Rate Generator
125ns
122Hz to 4MHz
0.002Hz to 2MHz
Vout = high
Vout = low
16 bits
Vout = high
Vout = low
Jumper Selected
Jumper Selected
Jumper Selected
TTL compatible
15mA
24mA
1
8MHz max
TTL compatible (Schmitt-trigger)
20uA
200uA
TTL compatible
400uA
8mA
One of 3:
Analog Input EOC,
Analog Input RateGenerator,
Analog Output Rate Generator
One of 2:
Analog Input EOC,
Analog Input RateGenerator,
IRQ2, IRQ3 and IRQ5
100 kHz
Jumper Selected
Single Transfer DMA mode only
Output
Power Requirements
Power Available
Physical Characteristics
Size
Operating Temperature Range
SPECIFICATION
Connector pins P1-26 and P1-48 combined
Length x Height
2 (1 input, 1 output)
DMA 1, DMA 3
Start on trigger or Start on Command,
using a Linear or Circular buffer
Start on Command, using a Linear or
Circular buffer
+5V, 1A
+5V, 0.25A fused
9.0" x 4.2" (22.9cm x 10.7cm)
0-70ºC
Appendix D: Analog Input and Output Calibration Procedures
Appendix D: Analog Input and Output Calibration Procedures
D.1 PCI-20428W-1 and -2 Analog Input Circuit Calibration Procedures
The factory configured input voltage range (±10 V) on your PCI-20428W Board is calibrated at the factory. If
you suspect inaccuracies, or if you change the input voltage range check the calibration of your board. If the
results are out of specification and unacceptable to your application, use the procedure below to recalibrate your
board. The procedure describes in detail the steps necessary to calibrate the board's Analog Input Section. This
calibration is accomplished by manual adjustment of the adjustable potentiometers PT5, PT6 and PT7 on the
board.
This calibration procedure also requires some basic software for reading and displaying the board's A/D results
and for setting gains. If your application is complete, or if you are in the early stages of development, chances are
you have already developed code suitable for calibrating the board. If not, the sample program AI_C.C provided
with the Master Link "C" Language Software Library for DOS can be modified for use as a calibration program.
Unmodified, AI_C.C can be used to perform steps [1] through [10] of the procedure listed below. To perform the
remaining steps, the program should be modified to display, to at least 2 decimal places, the average of 1000
consecutive readings (in A/D counts).
Equipment Needed:
1.
2.
3.
Precision Digital Volt Meter (DVM) accurate to 100 µV over a range of ±10 V.
Precision voltage calibrator accurate to 0.1 µV over a range of ±1 V and accurate to 1.0 µV over a
range of ±10 V.
Small insulated screwdriver for adjusting potentiometers.
You will need to open the computer to access the board's potentiometers. First, turn off the power to the
computer.
Warning
Lethal voltages exist inside computers. Always ensure that power is removed before opening the
case.
CAUTION
Failing to turn off the power when making or breaking connections may damage the computer.
Remove the cover from the computer, following the manufacturer's instructions.
Turn on the power to the computer and allow at least a 10-minute warm-up before continuing.
WARNING!
If you use an uninsulated screwdriver, and accidentally touch other components, you may damage
your board.
Figure D.1 shows the locations of the potentiometers used to adjust the analog input circuits on the PCI-20428W
Low Cost Multifunction Board.
145
Appendix D: Analog Input and Output Calibration Procedures
PT5 A/D Span Adjust
PT6 A/D Offset Adjust
PT7 PGA Offset Adjust
Figure D.1 Analog Input Adjustment Potentiometer Location Diagram
PCI-20428W-1, -2 Analog Input Calibration Procedure
[1]
Insure the PCI-20428W under calibration is configured for the desired analog input range and input
configuration. Please refer to Figure 2.2 and Section 2.3 "Analog Input Configuration" (Chapter 2) for
jumper configuration details.
[2]
Connect analog input channel 0 to the voltage calibrator. Set the calibrator to 0.00 V out.
Adjust the Programmable Gain Amplifier (PGA) Offset
[3]
Connect a DVM to the PGA output. The PGA output can be measured by connecting the DVM to an
installed jumper and analog ground (at pin 3 of the rear I/O connector). The actual jumper will depend
on the PCI-20428W analog input voltage range selected (see the table below):
Input Voltage Range
±10V
±5V
0 - 10V
0 - 5V
146
PGA Output
W20
W19
W19
W17
[4]
Use your calibration software to set the PCI-20428W Board's gain to 1 and measure the PGA's output.
[5]
Use your calibration software to set the PCI-20428W Board's gain to its highest setting (100 for the
PCI-20428W-1, or 8 for the PCI-20428W-2).
[6]
Adjust PT7 so that the PGA's output at the highest gain equals the output at a gain of 1 (measured in
step [4]), within ±0.5 mV, .
[7]
Repeat the gain of 1 PGA output measurement.
[8]
Again adjust PT7 so that PGA's output at the highest gain equals the output at a gain of 1 (measured in
step [7]), within ±0.5 mV.
[9]
Confirm that the PGA offset at a gain of 1 is within ±0.5 mV of the offset measured in step [6].
Appendix D: Analog Input and Output Calibration Procedures
[10]
If your PCI-20428W Board is configured for a unipolar input range (0 to +5 V or 0 to +10 V) go to
step [17]. If your PCI-20428W Board is configured for a bipolar input range (±5 V or ±10 V) perform
steps [11] through [16].
A/D Bipolar Input Range Offset Adjustment
[11]
Insure the voltage calibrator is set for 0.00 V and connected to analog input channel 0.
[12]
Use your calibration program to continuously sample analog input channel 0, average 1000 results,
and display the average counts.
[13]
While the calibration program is running, adjust PT6 on the PCI-20428W so the average count value
reads 2048.0.
A/D Bipolar Input Ranges Span Adjustment
[14]
The table below shows the voltage calibrator output that should used when adjusting the span for a
particular gain and bipolar input voltage range. Analog input gains 1, 10 and 100 apply to the PCI20428W-1 and analog input gains 1, 2 , 4 and 8 apply to the PCI-20428W-2.
Analog Input
Range
±10V
±5V
Analog Input
Gain
1
2
4
8
10
100
1
2
4
8
10
100
Voltage Calibrator
Output
+9.92188V
+4.96094V
+2.48047V
+1.24023V
+0.99219V
+99.2188mV
+4.96094V
+2.48047V
+1.24023V
+0.62012V
+0.49609V
+0.04961V
According to the table above, set the voltage calibrator output for the gain you intend to use most and
the desired bipolar input range.
[15]
While the calibration program is running, adjust PT5 on the PCI-20428W so the average count value
reads 4080.0.
[16]
Repeat the A/D Bipolar Input Range Offset Adjustment procedure (steps [11], [12] and [13]) to insure
the offset is within specification. Once these steps have been completed the bipolar analog input
calibration procedure is complete.
A/D Unipolar Input Ranges Offset Adjustment
[17]
The table below shows the voltage calibrator output that should used when adjusting the offset for a
particular gain and unipolar input voltage range. Analog input gains 1, 10 and 100 apply to the PCI20428W-1 and analog input gains 1, 2 , 4 and 8 apply to the PCI-20428W-2.
147
Appendix D: Analog Input and Output Calibration Procedures
Analog Input
Range
0 - 10V
0 - 5V
Analog Input
Gain
1
2
4
8
10
100
1
2
4
8
10
100
Voltage Calibrator
Output
+39.0625mV
+19.5313mV
+9.7656mV
+4.8828mV
+3.9063mV
+0.3906mV
+19.5313mV
+9.7656mV
+4.8828mV
+2.4414mV
+1.9531mV
+0.1953mV
According to the table above, set the voltage calibrator output for the gain you intend to use most and
the desired unipolar input range.
[18]
Insure the voltage calibrator is set for the proper output voltage and connected to analog input channel
0. Use your calibration program to continuously sample analog input channel 0, average 1000 results,
and display the average counts.
[19]
While the calibration program is running, adjust PT6 on the PCI-20428W so the average count value
reads 16.0.
A/D Unipolar Input Range Span Adjustment
[20]
The table below shows the voltage calibrator output that should used when adjusting the span for a
particular gain and unipolar input voltage range. Analog input gains 1, 10 and 100 apply to the PCI20428W-1 and analog input gains 1, 2 , 4 and 8 apply to the PCI-20428W-2.
Analog Input
Range
0 - 10V
0 - 5V
Analog Input
Gain
1
2
4
8
10
100
1
2
4
8
10
100
Voltage Calibrator
Output
+9.96094V
+4.98047V
+2.49023V
+1.24512V
+0.99609V
+99.6094mV
+4.98047V
+2.49023V
+1.24512V
+0.62256V
+0.49805V
+49.8047mV
According to the table above, set the voltage calibrator output for the gain you intend to use most and
the desired unipolar input range.
148
[21]
While running the calibration sampling program described above, adjust PT5 on the PCI-20428W for
an average of 4080.0 counts.
[22]
Repeat the A/D Unipolar Input Range Offset Adjustment procedure (steps [17], [18] and [19]) to insure
the offset is within specification. Once these steps have been completed the unipolar analog input
calibration procedure is complete.
Appendix D: Analog Input and Output Calibration Procedures
D.2 PCI-20428W-3 Analog Input Circuit Calibration Procedures
The factory configured input voltage range (±10 V) on your PCI-20428W-3 Board is calibrated at the factory. If
you suspect inaccuracies, or if you change the input voltage range check the calibration of your board. The
procedure describes in detail the steps necessary to calibrate the board's Analog Input Section. This calibration is
accomplished by manual adjustment of the adjustable potentiometers PT5 and PT6 (see Figure D.1).
Please refer to the beginning of Section D.1 for information on required software and equipment, and instructions
on opening your computer.
PCI-20428W-3 Analog Input Calibration Procedure
[1]
Insure the PCI-20428W-3 under calibration is configured for the desired analog input range and input
configuration. Please refer to Figure 2.3 and Section 2.3 "Analog Input Configuration" (Chapter 2) for
jumper configuration details.
[2]
Connect analog input channel 0 to the voltage calibrator. Set the calibrator to 0.00 V out.
[3]
If your PCI-20428W-3 Board is configured for a unipolar input range (0 to +5 V or 0 to +10 V) go to
step [10]. If your PCI-20428W-3 Board is configured for a bipolar input range (±5 V or ±10 V)
perform steps [4] through [9].
A/D Bipolar Input Range Offset Adjustment
[4]
Insure the voltage calibrator is set for 0.00 V and connected to analog input channel 0.
[5]
Use your calibration program to continuously sample analog input channel 0, average 1000 results,
and display the average counts.
[6]
While the calibration program is running, adjust PT6 on the PCI-20428W-3 so the average count value
reads 2048.0.
A/D Bipolar Input Ranges Span Adjustment
[7]
The table below shows the voltage calibrator output that should used when adjusting the span for a
particular bipolar input voltage range.
Analog Input
Range
±10V
±5V
Voltage Calibrator
Output
+9.92188V
+4.96094V
According to the table above, set the voltage calibrator output for the desired bipolar input range.
[8]
While the calibration program is running, adjust PT5 on the PCI-20428W-3 so the average count value
reads 4080.0.
[9]
Repeat the A/D Bipolar Input Range Offset Adjustment procedure (steps [4], [5] and [6]) to insure the
offset is within specification. Once these steps have been completed the bipolar analog input
calibration procedure is complete.
149
Appendix D: Analog Input and Output Calibration Procedures
A/D Unipolar Input Ranges Offset Adjustment
[10]
The table below shows the voltage calibrator output that should used when adjusting the offset for a
particular unipolar input voltage range.
Analog Input
Range
0 - 10V
0 - 5V
Voltage Calibrator
Output
+39.0625mV
+19.5313mV
According to the table above, set the voltage calibrator output for the desired unipolar input range.
[11]
Insure the voltage calibrator is set for the proper output voltage and connected to analog input channel
0. Use your calibration program to continuously sample analog input channel 0, average 1000 results,
and display the average counts.
[12]
While the calibration program is running, adjust PT6 on the PCI-20428W-3 so the average count value
reads 16.0.
A/D Unipolar Input Range Span Adjustment
[13]
The table below shows the voltage calibrator output that should used when adjusting the span for a
particular unipolar input voltage range.
Analog Input
Range
0 - 10V
0 - 5V
Voltage Calibrator
Output
+9.96094V
+4.98047V
According to the table above, set the voltage calibrator output for the desired unipolar input range.
150
[14]
While running the calibration sampling program described above, adjust PT5 on the PCI-20428W-3 for
an average reading of 4080.0 counts.
[15]
Repeat the A/D Unipolar Input Range Offset Adjustment procedure (steps [10], [11] and [12]) to insure
the offset is within specification. Once these steps have been completed the unipolar analog input
calibration procedure is complete.
Appendix D: Analog Input and Output Calibration Procedures
D.3 PCI-20428W-1 and -2 Analog Output Circuit Calibration Procedure
The factory configured output voltage range (±10 V) for each analog output channel on your PCI-20428W-1 or -2
Board is calibrated at the factory. If you suspect inaccuracies, or if you change the output voltage range check the
calibration of your board. If the results are out of specification and unacceptable to your application, use the
procedure below to recalibrate your board. The procedure describes in detail the steps necessary to calibrate the
board's Analog Output Section. This calibration is accomplished by manual adjustment of the adjustable
potentiometers PT1, PT2, PT3 and PT4 on the board.
This calibration procedure also requires some basic software for writing data to the board's DACs. The
SYSCHECK software supplied with the PCI-20428W is sufficient for performing this task, or you may want to
write your own calibration program.
Equipment Needed:
1.
2.
Precision Digital Volt Meter (DVM) accurate to 100 µV over a range of ±10 V.
Small insulated screwdriver for adjusting potentiometers.
You will need to open the computer to access the board's potentiometers. First, turn off the power to the
computer.
Warning
Lethal voltages exist inside computers. Always ensure that power is removed before opening the
case.
CAUTION
Failing to turn off the power when making or breaking connections may damage the computer.
Remove the cover from the computer, following the manufacturer's instructions.
Turn on the power to the computer and allow at least a 10-minute warm-up before continuing.
WARNING!
If you use an uninsulated screwdriver, and accidentally touch other components, you may damage
your board.
Figure D.2 shows the locations of the potentiometers used to adjust the analog output circuits on the PCI20428W-1 and -2 Low Cost Multifunction Boards.
151
Appendix D: Analog Input and Output Calibration Procedures
PT2 Channel 1 Span
PT1 Channel 0 Span
PT3 Channel 0 Offset
PT4 Channel 1 Offset
Figure D.2 Analog Output Adjustment Potentiometer Location Diagram
PCI-20428W Analog Output Calibration Procedure
[1]
Insure the PCI-20428W under calibration is configured for the desired analog output range. Please
refer to Figure 2.2 and Section 2.4 "Analog Output Configuration" (Chapter 2) for configuration
details.
[2]
Connect analog output channel 0 to a DVM.
[3]
If the PCI-20428W is configured for the 0 to +10 V unipolar output range, go to the "Analog Output
Unipolar Offset Adjustment" procedure (Step [11]).
Analog Output Bipolar Offset Adjustment
[4]
Use SYSCHECK or your calibration software to write a value of 2048 (decimal) to analog output
channel 0.
[5]
Adjust PT3 on the PCI-20428W so channel 0's output voltage is 0.00 V ±2.44 mV.
[6]
Repeat steps [4] and [5] for analog output channel 1, using PT4.
Analog Output Bipolar Span Adjustment
152
[7]
Use SYSCHECK or your calibration software to write a value of 4095 (decimal) to analog output
channel 0.
[8]
Adjust PT1 on the PCI-20428W for the selected output range from the table below:
Analog Output Range
Analog Output Voltage
±10 V
±5 V
+9.99512 V ±4.88 mV
+4.99756 V ±2.44 mV
[9]
Repeat steps [7] and [8] for analog output channel 1, using PT2.
[10]
Repeat the Analog Output Bipolar Offset Adjustment procedure (steps [4], [5] and [6]).
Appendix D: Analog Input and Output Calibration Procedures
Analog Output Unipolar Offset Adjustment
[11]
Use SYSCHECK or your calibration software to write a value of 0 (decimal) to analog output
channel 0.
[12]
Adjust PT3 on the PCI-20428W so channel 0's output voltage is 0.00 V ±2.44 mV.
[13]
Repeat steps [11] and [12] for analog output channel 1, using PT4.
Analog Output Unipolar Span Adjustment
[14]
Use SYSCHECK or your calibration software to write a value of 4095 (decimal) to analog output
channel 0.
[15]
Adjust PT1 on the PCI-20428W so channel 0's output voltage is +9.99756 V ±2.44 mV.
[16]
Repeat steps [14] and [15] for analog output channel 1, using PT2.
[17]
Repeat the Analog Output Unipolar Offset Adjustment procedure (steps [11], [12] and [13]).
153
Appendix D: Analog Input and Output Calibration Procedures
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154
Appendix E: Termination Panel and Cable Adapter Products
Appendix E: Termination Panel and Cable Adapter Products
E.1 Introduction
This appendix describes the PCI-20429T-1 Termination Panel, the PCI-20430A-1 Adapter Board and provides
information on making your own cables if you choose not to use our termination and cabling products to connect
the PCI-20428W to the outside world.
The PCI-20429T-1 This Termination Panel plugs directly into the 50-pin I/O connector of the PCI-20428W.
Screw terminals are provided on the panel to interface all of the PCI-20428W's I/O lines
with external signals or devices.
The PCI-20430A-1 This Adapter Board separates the analog I/O, digital I/O and counter signals from the PCI20428W's 50-pin connector and provides them on three individual connectors compatible
with our standard line of 3-U Sized Termination Panels.
Sections E.2 and E.3 provide additional information on each of these products. Section E.4 provides information
on appropriate mating connectors if you choose to make your own connections.
E.2 PCI-20429T-1 Termination Panel
We suggest using our PCI-20429T-1 Termination Panel for making signal connections between the PCI-20428W
and the outside world. As shown in the following illustration, the PCI-20429T-1 Termination Panel's mating
connector plugs directly into the PCI-20428W's I/O connector at the rear of the computer and secures to the
board's mounting bracket using the supplied installation kit.
Figure E.1 PCI-20429T-1 Termination Panel Installation
Access to all signals on the 50-pin I/O connector, except for +5 V, is provided through four 12-position terminal
blocks. Two of these terminal blocks are used for analog input and output connections while the other two are
used for digital I/O, counter, rate generator out and external input connections. Screw terminals allow signal wires
to be securely fastened to the terminal blocks. +5 VDC and an extra ground point are provided through two
solder pads located at the front center of the termination panel. Figure E.2 shows the signals assigned to each
terminal block on the panel and the +5 V and Ground solder pads.
155
Appendix E: Termination Panel and Cable Adapter Products
ANALOG OUTPUT
ANALOG INPUT
0
1
2
3
4
5
6
7
0
8
9
10
11
12
13
14
15
1
TB1
TB2
ANALOG INPUT
ANALOG OUTPUT
P1
+5V
DIGITAL
PORT 0
DIGITAL
PORT 1
5
6
7
4
0
6
3
7
2
COUNTER
4
5
1
OUT GATE CLK
0
1
2
3
TB3
TB4
DIGITAL
PORT 0
DIGITAL
PORT 1
RG
EXTIN
Figure E.2 PCI-20429T-1 Termination Panel Connections
Figure E.3 gives the physical dimensions of the PCI-20429T-1 Termination Panel. Figure E.4 is a schematic
diagram of the PCI-20429T-1.
Terminal Side View
Rear View
3.5"
3.5"
3.3"
Figure E.3 PCI-20429T-1 Physical Dimensions
156
0.6"
Appendix E: Termination Panel and Cable Adapter Products
Figure E.4 PCI-20429T-1 Schematic Diagram
157
Appendix E: Termination Panel and Cable Adapter Products
E.3 PCI-20430A-1 Adapter Board
The PCI-20430A-1 Adapter Board allows you to use our line of 3-U Sized Termination Panels. The Adapter
separates the analog and digital signal lines from the PCI-20428W's 50-pin I/O connector and directs them to
three individual connectors (P2, P3 and P4). These connectors accept PCI analog and digital I/O cables which are
compatible with our 3-U Termination Panels. 3-U rack-mountable Termination Panels are available in a variety
of configurations to accommodate your interfacing needs.
Figure E.5 PCI-20430A-1 Adapter Board
All analog input and output signals are provided through P2. All digital input and output channels are available
through P3, and the counter, analog input rate generator output, and external input lines are provided through P4.
+5 V is provided at each connector.
P2
Analog In Chan 0
Analog In Chan 8
Analog Ground
Analog In Chan 9
Analog In Chan 1
Analog Ground
Analog In Chan 2
Analog In Chan 10
Analog Ground
Analog In Chan 11
Analog In Chan 3
Analog Ground
Analog In Chan 4
Analog In Chan 12
Analog Ground
Analog In Chan 13
Analog In Chan 5
Analog Ground
Analog In Chan 6
Analog In Chan 14
Analog Out Chan 0
Analog In Chan 15
Analog In Chan 7
Analog Ground
Analog Out Chan 1
+ 5 Volts
P3
P4
No Connection
+ 5 Volts
No Connection
+ 5 Volts
Digital Ground
Digital In Chan 0
Digital Ground
Counter Clock Input
Digital In Chan 1
Counter Gate Input
Digital In Chan 2
Counter Output
Digital In Chan 3
Analog Input Rate Generator Out
Digital In Chan 4
External Input
Digital In Chan 5
No Connection
Digital In Chan 6
Digital In Chan 7
Digital Out Chan 0
Digital Out Chan 1
Digital Out Chan 2
Digital Out Chan 3
Digital Out Chan 4
Digital Out Chan 5
Digital Out Chan 6
Digital Ground
Digital Out Chan 7
Digital Ground
Figure E.6 PCI-20430A-1 Adapter Board Connectors P2, P3 and P4
158
No Connection
Appendix E: Termination Panel and Cable Adapter Products
Figure E.7 gives the physical dimensions of the PCI-20430A-1 Adapter Board. Figure E.8 is a schematic diagram
of the PCI-20430A-1. A list of compatible cables, 3-U Termination Panels and Termination Panel enclosures are
provided following these illustrations.
Connector Side View
3.5"
2.1"
Rear View
3.5"
0.5"
Figure E.7 PCI-20430A-1 Physical Dimensions
159
Appendix E: Termination Panel and Cable Adapter Products
Figure E.8 PCI-20430A-1 Schematic Diagram
160
Appendix E: Termination Panel and Cable Adapter Products
E.3.1 Cables
Analog Cables
Connections between the Adapter Board and 3-U Sized Analog Termination Panels are made by shielded
analog ribbon cables.
PCI-20310A-1
PCI-20310A-2
PCI-20310A-3
A 2-meter (6.56 foot) shielded analog cable assembly to connect P2 to the PCI20303T-1, -2 or PCI-20353T-1 Analog I/O Termination Panels.
Same as above only 1.5 feet (0.46 meters) in length.
Same as above 3.0 feet (0.92 meters) in length.
Digital Cables
Connections between the Adapter Board and 3-U Sized Digital Termination Panels are made by special digital
ground-plane ribbon cables.
PCI-20311A-1
PCI-20311A-2
PCI-20311A-3
A 2-meter (6.56 foot) ground-plane cable assembly to connect P3 or P4 to the PCI20305T-1, PCI-20324T-1, PCI-20355T-1 or PCI-20361T-1 Termination Panels.
Same as above only 1.5 feet (0.46 meters) in length.
Same as above 3.0 feet (0.92 meters) in length.
E.3.2 3-U Sized Termination Panels
Analog I/O
PCI-20303T-1
PCI-20303T-2
PCI-20353T-1
16-Channel (8 differential) General Purpose Analog I/O Termination Panel.
7-Channel (differential) 1 Cold-Junction Compensation Thermocouple Termination
Panel.
8-Channel Analog I/O Isolation Termination Panel. This Panel is designed for use
with PCI-5B Series Signal Conditioning Blocks. The channel capacity may be
expanded to 16 Analog I/O channels with the use of the PCI-20324T-1 Termination
Panel Expander.
Digital I/O
PCI-20305T-1
PCI-20324T-1
PCI-20355T-1
PCI-20361T-1
16-Channel General Purpose Digital I/O Termination Panel.
8-Channel Digital Isolation Panel. This Panel is designed for use with PCI-1100
Series Digital Isolation Blocks. The channel capacity may be expanded to 16 digital
I/O channels with the use of the PCI-20326T-1 Termination Panel Expander.
16-Channel Reed Relay Digital Output Termination Panel.
16-Channel Digital Input Isolation Termination Panel.
E.3.3 3-U Card Enclosures
Two 3-U Euro-Style card cages are available from Intelligent Instrumentation for mounting any of the above
termination panels.
PCI-20308H-1
19-inch rack mount or tabletop Euro-Style card cage. Up to 20 panels can be
accommodated in one unit, supporting as many as 320 I/O channels. Due to different
space requirements of various termination panel models, the maximum number of
panels which can be used depends on the actual configuration. For example, the PCI20308H-1 can hold 20 PCI-20303T-1 or -2 panels or 10 PCI-20355T-1 panels
because of on-board components.
161
Appendix E: Termination Panel and Cable Adapter Products
PCI-20342A-1
Tabletop Euro-Style card cage. Up to three 3-U Termination Panels or other 3-U
sized boards can be accommodated. The maximum number of panels which can be
used depends on the termination panel model(s).
E.4 Making Your Own Connections
If you want to make your own interface cables for the PCI-20428W, the table below lists a representative
manufacturer's part numbers for the board's 50-pin I/O connector and its mating ribbon cable style connector.
Table E.1 Example 50-Pin I/O Connectors
Connector
Manufacturer Part Number
Right angle PCB mount 50-pin (same as
connector on-board the PCI-20428W)
Mating ribbon cable connector for the
above connector
Thomas and Betts 609-5007
Thomas and Betts 622-5030
When selecting a ribbon cable to attach to the mating connector, you may want to consider using a cable
containing only the number of conductors you actually need to use in your application. For example, if you are
only using analog I/O, a 26-conductor ribbon cable will do since all analog I/O signals and ground are wired to
pins 1 to 26. If you are going to use all the analog inputs plus the counter and the external input, a 24-conductor
cable section (for pins 1 to 24) and an 8-conductor cable section (for pins 43 to 50) can be used.
Refer to Table E.1 and Figure 2.4 (Chapter 2) to determine the signals and I/O pins you require.
162
Appendix F: Memory Manager, DMA Device Driver, Initialization Options and Interrupt Notes
Appendix F: Memory Manager, DMA Device Driver, Initialization Options
and Interrupt Notes
F.1 Memory Manager Notes for DOS and Windows 3.x
Intelligent Instrumentation hardware and software can be used in conjunction with '386 memory managers, such as
386MAX, EMM386 and QEMM, but because PCI-20000 Series hardware is generally memory-mapped,
special switches need to be specified when loading the memory manager. If this step is not taken, error -201 will
generally be returned from the HWInit call and the SlotSearchISA call will not find the boards. When using
PCI-20501C EISA Boards under Microsoft Windows 3.x, additional steps may be required to assure that the
EISA extended BIOS is available to the Master Link drivers. Where necessary, the steps to assure access to the
EISA BIOS are documented below.
The memory managers mentioned above can provide users of '386 and '486-based computers with more DOS
memory than DOS alone can provide. In the process of returning sections of the computer's memory map to DOS,
however, the memory managers will generally not be able to detect the presence of one or more PCI-20000
Boards in the computer and may actually 'remap' the memory which the board is occupying into another part of
memory. If this happens, a board that has its segment address set to $CDOO, for example, no longer appears to
be located at that segment. To prevent this, you must prevent the memory manager from remapping the section of
memory which the board is set to occupy.
F.1.1 386MAX

To prevent 386MAX (from Qualitas) from remapping a particular section of memory, you must alter the
contents of the profile file in the 386MAX subdirectory of your hard disk. This file, 386MAX.PRO, needs to
have the RAM switch added to it. The parameter to the RAM switch should be the address range to be occupied
by a PCI-20000 Board. Multiple RAM statements can be used, if necessary, to prevent remapping of multiple
boards. For example, if you have a PCI-20098C Multifunction Board addressed at segment $CD00, then add the
following line to the 386MAX.PRO file:
RAM=CD00-CD40
; Address PCI-20098C Board at $CD00.
Note that, for the PCI-20501C Series High-Performance EISA Boards, you must use your EISA configuration
program to determine the base address setting for each PCI-20501C Board and add a RAM statement to
386MAX.PRO for each address.
386MAX correctly handles the EISA extended BIOS area, so no additional switches are required when using
PCI-20501C Boards under Microsoft Windows 3.x.
F.1.2 EMM386
To prevent EMM386 (from Microsoft) from remapping a particular section of memory, you must alter the
contents of your CONFIG.SYS file, changing the parameters with which EMM386 is loaded. You should add an
x= memory option to the line in CONFIG.SYS which loads EMM386. This causes EMM386 to exclude the
specified range of segment addresses from remapping. Multiple x= memory options can be used, if necessary, to
prevent remapping of multiple boards. For example, if you have a PCI-20098C Multifunction Board addressed at
segment $CD00, then the DEVICE=EMM386 line in your CONFIG.SYS file might look something like this:
DEVICE=C:\WINDOWS\EMM386.EXE x=CD00-CD40
Note that, for the PCI-20501C Series Multifunction Board, you must use your EISA configuration program to
determine the base address setting for each PCI-20501C Board and add an x= memory option to your
CONFIG.SYS file for each address.
163
Appendix F: Memory Manager, DMA Device Driver, Initialization Options and Interrupt Notes
IMPORTANT NOTES FOR EMM386 USERS:
1. EISA DMA channels 5 and 7 are not handled correctly by EMM386.EXE. If your application uses one of the
PCI20501C Series Multifunction Boards, you must assign DMA channel 1 or 3 to the on-board DMA controller
that is being used. Note that the DMA channel selections are made in the EISA configuration program.
2. The DOS based DMASwap() function does not work correctly when EMM386.EXE is loaded. If your
application uses DMASwap(), you must remove, or “Remark out”, the CONFIG.SYS line that loads
EMM386.EXE.
F.1.3 QEMM

To prevent QEMM (from Quarterdeck Systems) from remapping a particular section of memory, you must alter
the contents of your CONFIG.SYS file, changing the parameters with which QEMM is loaded. You should add
an EXCLUDE statement to the line in CONFIG.SYS which loads QEMMTM. This causes QEMM to exclude
the specified range of segment addresses from remapping. Multiple EXCLUDE statements can be used, if
necessary, to prevent remapping of multiple boards. For example, if you have a PCI-20098C Multifunction Board
addressed at segment $CD00, then the DEVICE=QEMM line in your CONFIG.SYS file might look something
like this:
DEVICE=C:\QEMM\QEMM386.SYS EXCLUDE=CD00-CD40 RAM
Note that, for the PCI-20501C Series High-Performance EISA Boards, you must use your EISA configuration
program to determine the base address setting for each PCI-20501C Board and add an EXCLUDE statement to
your CONFIG.SYS file for each address.
If you are using Microsoft Windows 3.x with any of the PCI-20501C Series Boards for the EISA bus, you must
further exclude the EISA extended BIOS area so that PCI-20369S will be able to access information about your
PCI-20501C Boards. To do this, add the additional statement
EXCLUDE=F000-FFFF
to the DEVICE=QEMM line in your CONFIG.SYS file. Newer versions of QEMM also have a feature called
Stealth which allows QEMM to remap system ROM code to other locations in memory and to use the previous
location of the ROM as DOS memory, possibly increasing available memory. Stealth options cannot be used
when PCI-20501C Boards are to be used from within Windows 3.x. If the DEVICE=QEMM line in your
CONFIG.SYS file contains any options of the form ST:[x], Stealth is enabled and the SlotSearchEISA call will
not function from within Windows 3.x. If you are not using PCI-20501C Boards, or if you are not using Windows
3.x with the Master Link Software Libraries, you may enable Stealth options.
F.1.4 EMMExclude Notes
Windows 3.x performs a scan of the host computer's memory map to find any unused address space. This
scanning can interfere with the operation of your memory-mapped Intelligent Instrumentation hardware. If you are
using the SlotSearchISA function, the board(s) may not be identified by the software.
The EMMExclude setting in the SYSTEM.INI file is used to specify range of memory the Windows 3.x will not
scan to find unused address space. The range (two paragraph values separated by a hyphen) must be between
A000 and EFFF. The starting value is rounded down and the ending value is rounded up to a multiple of 16K.
For example, you could set
EMMExclude=C800-CFFF
164
Appendix F: Memory Manager, DMA Device Driver, Initialization Options and Interrupt Notes
to prevent Windows 3.x from scanning the addresses C800:0000 through CFFF:000F. You can specify more than
one address range by including more than one EMMExclude entry in the SYSTEM.INI file.
For more information on the SYSTEM.INI settings, refer to the SYSINI.WRI file in the Windows 3.x installation
directory.
F.2 Notes or Performing DMA in Windows
F.2.1 Windows 3.x and DMA
If you are using Master Link with Windows 3.x and need to transfer data between your computer and Intelligent
Instrumentation hardware via Direct Memory Access (DMA), you must install a replacement Virtual DMA
Device driver. This driver replaces the one that comes with Windows 3.x and allows for pre- and post-trigger data
acquisition. To install this driver in your system, copy PCIVDMAD.386 from the distribution disk to your
WINDOWS directory. Next, you must edit your SYSTEM.INI file (found in the WINDOWS directory) to force
Windows to use the new VDMAD rather than the driver which is built-in. Find the line in SYSTEM.INI that
looks like this (you can use the search function of Notepad to do this):
device=*vdmad
and change it so that the following two lines appear in its place:
; device=*vdmad
device=pcivdmad.386
To switch back to the built-in Windows VDMAD, insert a ';' at the start of the second line and remove the ';' from
the start of the first line.
Save the changes to SYSTEM.INI. The changes will take effect the next time that Windows is started.
Note that certain disk management packages (such as PC TOOLS and Norton Desktop for Windows) may install
their own VDMAD drivers. To assure that your PCI hardware will have the ability to perform pre- and posttrigger data acquisition, however, you should disable their VDMAD (by placing a ';' at the start of the line in
SYSTEM.INI that loads their VDMAD driver) and add the line that activates PCIVDMAD.386.
F.2.2 Windows 95 and DMA
16-bit DMA Applications
If you are using the Windows 3.x 16-bit Master Link drivers (not the Win32 version) with Windows 95 and need
to transfer data between your computer and Intelligent Instrumentation hardware via Direct Memory Access
(DMA), you must perform the following steps:
1. Copy VDMAD.VXD from your \PCIMASTR directory to your WINDOWS\SYSTEM\VMM32 directory.
2. Copy MASTRLNK.VXD from your \PCIMASTR directory to your WINDOWS\SYSTEM directory.
3. Remove any reference to PCIVDMAD.386 from the SYSTEM.INI file found in the C:\WINDOWS directory.
4. Add a line similar (i.e. your path might be different) to the following line to the [386Enh] section of your
SYSTEM.INI file:
165
Appendix F: Memory Manager, DMA Device Driver, Initialization Options and Interrupt Notes
device=c:\windows\system\mastrlnk.vxd
5. Restart Windows 95.
32-bit DMA Applications
The Win32 Master Link installation program will offer to install a Master Link driver and a Virtual DMA device
driver when running on Windows 95. In order to access hardware, the Master Link driver option must be
selected. In order to use the DMA feature of some hardware, the Virtual DMA device option must be selected as
well.
F.2.3 Windows NT
 and DMA
The Win32 Master Link installation program will offer to install a Master Link driver (MASTER_NT.SYS) when
running on Windows NT. In order to access hardware and perform DMA operations, this option must be
selected. After installation of the Windows NT driver, the system must be restarted to complete the driver
installation.
Note, you cannot run any 16-bit Master Link application under Windows NT, let alone a DMA application.
F.3 Initialization Options
The following flags have been defined to customize driver initialization. You may use any combination of these
flags in your application program. Simply, replace the last parameter of the InitSW function call with the desired
flag(s). The InitSW function call is found in the PCIDATAW source file (for Windows) or the PCIDATA source
file (for DOS). Note that the default value for the last parameter in the InitSW function call is 0. To use a
combination of software initialization options, perform a bitwise OR of the desired flags and pass the result to the
InitSW function.
SWINIT_NOT_EISA - This flag can be set to inform the drivers that the host computer is not an EISA machine.
Certain ISA motherboards (e.g. DTK) use a BIOS that does not fully support the extended functions used by the
drivers to determine if the host computer is an EISA machine. As a result, the application program may not work
properly or may even crash the computer. If the SWINIT_NOT_EISA flag is set, the drivers will flag the host
computer as an ISA machine and will bypass the extended EISA BIOS function calls. Note: This option applies
to DOS and Windows 3.x only.
SWINIT_NO_INT15_EISA - This flag can be used to inform the drivers not to use int86x (0x15...) to determine
whether or not the host computer is an EISA machine. Certain EISA computers (e.g. Compaq DESKPRO XL
590) use a BIOS that does not correctly handle calls to int86x (0x15...). As a result, the application program may
not work properly or may even crash the computer during the SWInit() call. If the SWINIT_NO_INT15_EISA
flag is set, however, the drivers will use an alternate method to determine whether or not the host computer is an
EISA machine. Note: This option applies to DOS and Windows 3.x only.
SWINIT_DELAY_AO_INIT - This flag can be used to delay initialization of the output channels on an analog
output board. Normally, the drivers output a mid-range count value to all of the analog output channels during
HWInit(). If the board is jumpered for bipolar operation, the initial output voltage will be 0 volts for each
channel. However, if the board is jumpered for unipolar operation, the initial output voltage will be 2.5V for each
channel configured for the 0-5V range and 5V for each channel configured for the 0-10V range. If the
SWINIT_DELAY_AO_INIT flag is used, the drivers will delay, or suppress, initialization of the analog output
channels until the first AOWrite or AOWriteGroup function call. At that time, all of the analog output channels
on a PCI-20021M or PCI-20093W, except for the specified channel, will be initialized to 0 volts regardless of the
selected range. For the PCI-20003M, PCI-20006M or PCI-20428W, the initial output value of each channel is
determined by a hardware jumper on the board.
166
Appendix F: Memory Manager, DMA Device Driver, Initialization Options and Interrupt Notes
SWINIT_NO_DPMI - This flag can be used to inform the drivers that there is no DPMI server available.
Certain integrated development environments (e.g. Turbo C++ 3.0) do not fully support the extended BIOS
functions used by the drivers to determine if there is a DPMI server available. As a result, the application
program may crash the computer if it is run from inside of the environment. If the SWINIT_NO_DPMI flag is
used, the drivers will bypass the extended EISA BIOS function calls used to detect whether or not a DPMI server
is available. Note: This option applies to DOS and Windows 3.x only.
SWINIT_LOCK_SEGMENTS - This flag can be used to lock the driver dynamic memory allocations in
physical memory. Set this flag if your application intends to access the drivers at interrupt time. If the flag is not
set, Windows may generate a page fault when a driver function is called at interrupt time. For additional
information, see the application note on “Interrupts and Segment Locking” below.
F.4 Interrupts and Segment Locking (Windows 3.x only)
If you wish to make driver function calls from an interrupt routine (e.g. an Multimedia System callback function),
you must ensure that all of the driver data and code segments are locked in physical memory at interrupt time by
performing the following steps.
1. Set the SWINIT_LOCK_SEGMENTS flag described above in the “Initialization Options” section.
2. Use the LockSegment() Windows API function to lock the code segment(s) of the target hardware in memory
as shown below
LockSegment (HIWORD (IncludeXXXX));
where IncludeXXXX can be Include98C, Include31M, IncludeDMA, etc. Note that although we have left it out
for clarity, the return value of the LockSegment() function call should be checked to ensure that the lock was
successful.
3. Lock the driver utility code segments in memory using SWLock() Master Link function (see the function
declaration header file(s) for function syntax).
4. Before the application terminates, unlock the hardware code segments and driver utility code segments from
memory using the UnlockSegment() Windows API function and the SWUnlock() Master Link function,
respectively (see the function declaration header file(s) for function syntax).
167
Appendix F: Memory Manager, DMA Device Driver, Initialization Options and Interrupt Notes
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168
Index
Index
16-bit DMA Applications, 165
32-bit DMA Applications, 166
386MAX, 163
3-U Card Enclosures, 161
3-U Sized Termination Panels, 161
50- pin I/O connector, 11
8254-Based Counters
Description, 65
Mode summary table, 69
Modes, 65
Primary function calls, 65
Programming Procedures, 70
Reading, 69
Programming Procedures,
DMA Output, 60
Software Controlled, 54
Range Configurations, 8
Rate Generator Selection, 9,
Analog-to-Digital Converter (A/D) Operation,
132
AOConfigure, 54, 56, 86
AOWrite, 54, 87
AOWriteGroup, 54, 87
Auto-zero correction, 126
A
Base Address, 130
Base Directory
DOS, 15
Win32, 31
Windows 3.x, 23
Block diagram, 2
Board IDs, 130
Board installation, 10
Board Reset, 131
BUFAllocate, 46, 58, 89
BUFAttachProcess, 46, 58, 91
BUFDeallocate, 93
BUFDecode, 46, 93
BUFEncode, 58, 94
Buffers, 46, 58
BUFMoveIn, 95
BUFMoveOut, 96
BUFSeek, 46, 97
Adapter board, 11, 158
Address switch diagram, 5
Addresses
Base I/O, 5
AIConfigureList, 43, 83
AIRead, 41, 85
Altering the SWInit call, 37
Analog Input and Output
Calibration Procedures, 145
Analog Input
Adjustment Potentiometer
Location Diagram, 146
Calibration Procedures, 145
Circuit Description, 41
Configuration, 8
Description, 3
DMA
Hardware description, 132
Programming procedures, 48
Summary, 47
General, 3 41, 131
Programming Procedures
DMA Acquisition, 48
Software Acquisition, 42
Range Configurations, 8
Rate Generator, 44
Analog Output
Adjustment Potentiometer
Location Diagram, 152
Calibration Procedures, 151
Circuit Description, 53
Configuration, 8
Description, 3, 53
DMA
Hardware description, 134
Programming Procedures, 60
Summary, 59
General, 3, 53, 134
B
C
Cables, 161
Call format, 78
Call specifications notes, 81
Changing the base address, 5
Channel Selection and Configuration, 131
Channel/Port Parameters, 79
Circular buffer, 45
clustercount, 45, 58
clustersize, 46, 58
Common analog data format, 42, 54
Common call parameters and data types, 78
Common data segment, 16, 17, 23, 24, 25, 26,
32, 33, 34
Communicating with the Libraries, 35
Configuration and Installation, 5
Connecting to the Outside World, 11
Connector drawing, 12
Connector, 11
Counter circuit description, 65
Index - 1
Index
Counter mode descriptions, 66
Counter Programming Procedures, 70
Counter, 3, 65, 136
CountsToVolts, 4, 42, 127
CTR8254Configure, 65, 99
CTR8254Disable, 65, 100
CTR8254Enable, 65, 100
CTR8254Read, 66, 101
CTR8254ReadGroup, 101
Customize driver initialization, 166
D
Data Types, 79
Default base address, 5
Determining buffer size, 46
Digital I/O
Description, 4, 71
Function calls, 71
General, 4, 71, 137
Programming Procedures, 71
Digital-to-Analog (DAC) Converter
Operation, 134
DIOConfigure, 103
DIORead, 71, 104
DIOReadBit, 71, 104
DIOWrite, 71, 105
DIOWriteBit, 71, 105
DIP Switch settings, 5
DMA
Analog output, 56
Buffers, 46
Channel Selection, 9
Channel, 9, 43, 130
Definition, 43
Input
Allowable pacers, 44, 46
Programming procedures 48, 132
Summary, 47
Jumpers, 9
Output
Allowable pacers, 56
Programming procedures 60, 134
Summary, 59
Primary function calls, 43, 56,
Programming procedures 48, 60, 132, 134
Start and Stop Modes, 44, 57
DMAConfigureList, 43, 56, 108
DMAFreeHandle, 47, 111
DMAGetHandle, 43, 56, 111
DMAHugeGetHandle, 43, 56, 112
DMASetOptions, 43, 56, 112
DMASetPacer, 57, 112
DMAStart, 44, 57, 113
DMAStatus, 46, 114
DMAStop, 44, 57, 114
Index - 2
DMASwap, 115
DOS Based Library Files, 15
DOS Environment - Programming Language
Support, 13
Dynamic Link Library
Win32, 33
Windows 3.x, 26
E
EMM386, 163
EMMExclude, 164
Enabling and Disabling a Generator's Output, 74
Error and warning codes, 15, 23, 31
ERRORS.TXT, 15, 23, 31, 35
Example 50-Pin I/O Connectors, 162
Example Base Address DIP Switch Settings, 5
Extended Memory
Managers, 163
Required Drivers, 13, 163
External Input, 44
F
Features, 1
FIFO, 41, 53, 57, 58
FrequencyToRGCounts, 74, 75, 128
Function Call Specifications
AIConfigureList, 83
AIRead, 85
AOConfigure, 86
AOWrite, 87
AOWriteGroup, 87
BUFAllocate, 89
BUFAttachProcess, 91
BUFDeallocate, 93
BUFDecode, 93
BUFEncode, 94
BUFMoveIn, 95
BUFMoveOut, 96
BUFSeek, 97
CountsToVolts, 127
CTR8254Configure, 99
CTR8254Disable, 100
CTR8254Enable, 100
CTR8254Read, 101
CTR8254ReadGroup, 101
DIOConfigure, 103
DIORead, 104
DIOReadBit, 104
DIOWrite, 105
DIOWriteBit, 105
DMAConfigureList, 108
DMAFreeHandle, 111
DMAGetHandle, 111
DMAHugeGetHandle, 112
Index
DMASetOptions, 112
DMASetPacer, 112
DMAStart, 113
DMAStatus, 114
DMAStop, 114
DMASwap, 115
FrequencyToRGCounts, 128
HWInit, 117
IncludeXXXX, 120
RegisterClient, 117
RGConfigure, 121
RGDisable, 122
RGEnable, 123
SlotAssignIO, 118
SlotInquire, 118
SlotSearchIO, 119
SWInit, 117
SWReset, 118
TCLinearize, 124
TCMeasure, 125
UnregisterClient, 120
VoltsToCounts, 128
Function call summary table, 80
Fuse, 12
G
General purpose counter channel, 65
H
Hardware and Software Initialization
Functions, 37
Hardware controlled acquisition, 43
Hardware controlled analog output, 56
Hardware requirements, 4
Hardware support functions, 37
Hardware technical reference, 129
HWInit, 37, 117
I
I/O connector drawing, 12
I/O connector pin definitions, 11
IncludeXXXX
Description, 37, 120
Example, 38
Purpose 37
Initialization
Call Sequence, 39
Customizing, 37
Example, 38
Flags, 166
Functions, 37
Hardware, 37
Options, 166
Software, 37
Installing the Board in your PC, 10
Installing the DOS Based Libraries, 14
Installing the Microsoft Windows 3.x Based
Software Libraries, 21
Installing the Win32 Based Software
Libraries, 28
Interrupt Jumpers, 9
Interrupts and Segment Locking
(Windows 3.x only), 167
Interrupts, 9, 130
J
Jumper locations, 6, 7
Jumpers
Analog input configuration, 8
Analog input range, 8
Analog output range, 8
Analog output rate generator, 9
DMA channel, 9
Interrupts, 9
L
Layout diagram, 6, 7
License Agreement, 14
Local Data Block, 26, 34
M
Making your own Connections, 162
Master Link
Description and Preliminary Notes, 77
DOS Based Software Libraries Files, 15
Dynamic Link Library, 26, 33
General Information, 4, 13, 77
Illustration, 4
Installation
DOS, 14
Win32, 28
Windows 3.x, 21
Software Libraries Function
Call Reference, 77
Support
DOS Support, 13
Win32 Support, 14
Windows 3.x Support, 13
Win32 Based Software Libraries Files, 31
Win32 Dynamic Link Library, 33
Windows 3.x Based Software Libraries
Files, 23
Windows 3.x Dynamic Link Library, 26
MASTER_NT.SYS, 48, 60, 166
Memory Manager Notes for DOS
and Windows 3.x, 163
Index - 3
Index
Memory Manager, DMA Device Driver,
Initialization Options and
Interrupt Notes, 163
Memory Managers
386MAXTM, 163
EMM386, 163
Preventing remapp, 163
QEMMTM, 164
Windows 3.x applications, 165
Microsoft Windows 3.x Based Software
Interface Files, 23
Microsoft Windows 3.x Environment Programming Language Support, 13
Mode 0: Interrupt on Terminal Count, 66
Mode 1: Hardware Retriggerable One-Shot, 66
Mode 2: Rate Generator, 67
Mode 3: Square-Wave Generator., 67
Mode 4: Software Triggered Strobe, 68
Mode 5: Hardware Triggered Strobe, 68
Mode Summary Table, 69
Modes of acquiring analog input data, 41
Modes of transferring analog output data, 53
Module Parameter, 78
Multifunction Boards Block Diagram, 2
Multiple Channel Analog Input DMA
Programming Procedures, 48
N
Notes on Performing DMA in Windows, 165
O
Offset Register Descriptions, 137
Operation of a Circular Buffer, 45
P
Pacing signals, 43, 57
PC I/O map, 5
PC/XT Bus Interface, 129
PCI_W32.DLL, 33
PCI_WIN.DLL, 26
PCI-20428W I/O Connector Diagram, 12
PCI-20428W-1 and -2 Analog Input Circuit
Calibration Procedures, 145
PCI-20428W-1 and -2 Analog Output Circuit
Calibration Procedure, 151
PCI-20428W-1 and -2 Board Layout Diagram
and Jumper Locations, 6
PCI-20428W-3 Analog Input Circuit
Calibration Procedures, 149
PCI-20428W-3 Board Layout Diagram and
Jumper Locations, 7
PCI-20429T-1 Termination Panel Connections,
155, 156
PCI-20430A-1 Adapter Board Connectors
P2, P3 and P4, 158
PCIVDMAD.386, 48, 60
Platform-dependent drivers, 48, 60
Power-up analog output levels, 8
Prescaler, 65, 73
Principal 8254 Counter Function Calls, 65
Process handle, 43, 56
Programmable gain amplifier, 41
Programming language notes, 26, 34
Programming language support, 77
Programming procedures
8254-Based Counters, 70
Analog input DMA, 48
Analog output DMA, 60
Digital I/O, 71
Initialization, 39
Rate Generator, 74
Software controlled acquistion, 42
Software controlled analog output, 54
Pulse and square-wave output waveforms, 74
Pulse Mode, 73
Q
QEMM, 164
R
Rate Generator
Description, 3, 73
Function calls, 73
General, 3, 73, 135
Modes, 74
Operation, 73
Programming Procedures, 74
Waveforms, 74
Reading Counter Values and Status, 69
Reading Digital Input Data, 71
Register offsets
Description, 129
List, 137
RegisterClient, 117
Registering and unregistering program instances,
37
Requirements for PCI-20428W, 4
RGConfigure, 73, 121
RGDisable, 73, 122
RGEnable, 73, 123
S
Segment Address Finding, 38
Index - 4
Index
Setting the Board's Base Address, 5
Single-Ended and Differential Configurations , 8
Slot Assignment Functions, 38
Slot Inquiry Functions, 38
Slot Inquiry, 38
Slot Parameter, 78
SlotAssignIO, 38, 118
SlotInquire, 38, 118
SlotSearchIO, 39, 119
Software controlled acquisition, 42
Software controlled analog output, 54
Software initialization
Functions, 37, 117
Source code file, 16, 17, 18, 24, 25, 32, 33
Software Libraries
DOS Installation, 14
Files
DOS
C, 16
Pascal, 16
QuickBASIC, 17
Win32
C, 32
Visual Basic, 33
Windows 3.x
C, 24
Pascal, 25
Visual Basic, 23
Linking, 20, 27, 34
Win32 Installation, 28
Windows 3.x Installation, 21
Software License Agreement, 14
Special software support, 37
Specification Structure and
Notational Conventions, 82
Specifications, 143
Square-Wave Operation, 74
Start on Command - Stop on Command, 45, 57
Start on Command - Stop on Command, 57
Start on Command - Stop on
Terminal Count, 44, 57
Start on Trigger - Stop on Command, 46
Start on Trigger - Stop on Terminal Count, 45
Steps for using the DOS interface files, 20
Steps for using the Win32 interface files, 34
Steps for using the Windows 3.x interface
files, 26
SWInit, 37, 117
Switch Settings, 5
SWReset, 37, 118
SYSCHECK, 11
System configuration requirements, 13
System configuration summary, 80
System requirements, 4
T
TCLinearize, 124
TCMeasure, 125
Termination Panel and Cable
Adapter Products, 155
Termination Panel, 11, 155
Thermocouple conversion tables, 15, 23
Transient cautions, 11
Turbo Pascal Units, 19
U
UnregisterClient, 120
Using the DOS interface libraries, 18
Using the Microsoft Windows 3.x
interface files, 26
Using the Win32 interface files, 33
Utility Functions
CountsToVolts, 127
FrequencyToRGCounts, 128
VoltsToCounts, 128
V
VDMAD (Virtual DMA Device Driver), 165
VDMAD.VXD, 48, 60
VoltsToCounts, 54, 128
W
Win32 Based Software Libraries Files, 31
Win32 Environment - Programming
Language Support, 14
Windows 3.x and DMA, 165
Windows 3.x Based Software Libraries Files, 23
Windows NT and DMA, 166
Windows 95 and DMA, 165
Writing Digital Output Data, 72
X
XMS Drivers, 13, 163
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Index - 5