Chinese Journal of Electronics Vol.18, No.4, Oct. 2009 An Ultra Low-Power FCC-Compliant 5th-Derivative Gaussian Pulse Generator for IR-UWB Transceiver∗ QIN Bo1 , CHEN Hongyi1 , WANG Xin2 , WANG Albert2 and HAO Yinghui3 (1.Institute of Microelectronics, Tsinghua University, Beijing 100084, China) (2.Department of Electrical Engineering, University of California, Riverside, CA 92521, USA) (3.Yantai Vocational College, Yantai 264670, China) Abstract — A FCC-compliant ultra low-power lowcost 5th-derivative Gaussian Pulse generator (PG) for full 3.1-10.6GHz Impulse-radio (IR) carrier-free Ultra wideband (UWB) transceiver was designed and fabricated in foundry 0.13µm CMOS. This PG integrates three cascade stages to generate square wave, Gaussian pulse and 5thorder Gaussian derivative waveform, respectively. Measurement shows the lowest reported power consumption of 5.1pJ/pulse at 100MHz Pulse repeating frequency (PRF), the smallest die area of only 0.02mm2 , short 5th-derivative Gaussian pulse width of 770ps and peak to peak amplitude of 66mV. The FCC-compliant IR-UWB pulse generator potentially allows up to 1.3Gbps throughput for low-cost low-power hi-QoS wireless multimedia and video streaming. Key words — Ultra wideband (UWB), Pulse generator (PG), 5th-derivative Gaussian, FCC-compliant, Low power. I. Introduction During the past several years after Federal communication commission (FCC) permitted the commercial development of Ultra wideband (UWB) technology from 3.1GHz to 10.6GHz in 2002[1] , more and more momentums have been attracted on this rising technology. While industrial development has been focusing on DS-UWB and MB-OFDM UWB, it is commonly agreed that they do not fully use the available UWB spectrum to eventually realize the highly desired multi-Gbps wireless streaming throughput. On the other hand, Impulse radio (IR) UWB technology can transmit extremely short impulse trains using the full 3.1-10.6GHz available spectrum and in a carrier-free scheme. It hence allows a much simpler RF frontend, BPSK modulation and digital baseband, which make fullCMOS IR-UWB system a low-power low-cost hi-performance wireless solution to eventually realize multi-Gbps hi-QoS multimedia and video wireless applications. In order to completely comply with and take full use of the Effective isotropic radiated power (EIRP) spectral mask over 3.1–10.6GHz regulated by FCC, the pulse width and am∗ Manuscript plitude of radiated UWB signals must follow very tight restriction, i.e., pulse width < 1ns and pulse amplitude < 1V. It is hence extremely challenging to design UWB Pulse generator (PG) meeting such strict specifications while achieving low-power for hi-throughput operation and enabling low-cost simple CMOS IR-UWB systems. Early reported PG designs used step recovery diode and microstrip technique for pulse generation[2,3] , which do not meet the integration, low-power and low-cost requirements. Recently, Ref.[4] reports 1.7ns 313pJ/pulse Gaussian pulse generated and up-converted to a 550MHz band at 5GHz using complicated analog topology. Ref.[5] depicts a traditionally modulated 17ns PG for 7–9GHz band with programmable carrier where the bandwidth and pulse width greatly limit the wireless data throughput. Threeoptional channels concept is presented in Ref.[6] with 3ns pulse width and 550MHz bandwidth, which requires a hi-pass filter for FCC compliance and uses a very complex digital topology. Refs.[7] and [8] present 8-delay-cell type 5th-derivative Gaussian pulse generator whose delay stages can be further simplified for low-power low-cost operation. Ref.[9] reports a 2nd-derivative Gaussian PG requiring off-chip bandpass filters to deliver FCC-compliant 1.5ns 63pJ/pulse pulses over 0.55GHz. A Gaussian PG with complex calibration to produce accurate 1ns pulse is presented in Ref.[10], which however consumes high power of 1.8nJ/pulse and big size of 1.95mm2 . This paper presents a new approximated methodology for Gaussian pulse generation and novel 4-delay-cell all-digital 3.1–10.6GHz full-band 5th-derivative Gaussian PG circuit in 0.13µm CMOS with record low power of 5.1pJ/pulse and size of 0.02mm2 . Section II discusses design of a 5th-derivative Gaussian PG as the competitive candidate for IR-UWB. The new FCC-compliant UWB pulse generator circuit is described in Section III. Section IV presents the measurement results, followed by the conclusions. II. 5th-Derivative Gaussian Pulse Practically, there are several different pulse generation Received Nov. 2008; Accepted Feb. 2009. This work is supported by the National Natural Science Foundation of China (No.60776025, No.90607021, No.60729308) and Foundation of Tsinghua University (No.SIST2027). 606 Chinese Journal of Electronics schemes available for impulse UWB PG, such as rectangular, sinusoidal and Gaussian methods. However, considering the spectrum characteristics, Gaussian pulse and its nth-derivative (n = 1, 2, 3 · · ·), especially 5th-order, are considered as the best fit since their side lobes have the smallest energy, making them easier to meet the strict FCC EIRP spectrum mask requirement[11] . Thus, in this work, Gaussian pulse and its 5th-derivative pulse generation scheme will be fully discussed. The time sequence and Power spectrum density (PSD) for Gaussian pulses can be respectively expressed as following ¶ µ t2 1 (1) exp − 2 G0 (t) = A √ 2σ 2πσ ε0 (f ) = A2 exp[−(2πf σ)2 ] Tf (2) where A is amplitude parameter, σ is time parameter also called variance and Tf is pulse interval equaling to reciprocal of Pulse repeating frequency (PRF). Apparently from Eq.(2), the maximum PSD of Gaussian pulse is located at DC, making it not suitable for FCC-compliant UWB. However, when applying derivation to Eq.(1), the corresponding PSD peak after Laplace transformation will move toward to high frequency. Considering the characteristics of Laplace transformation where a jω item will be introduced once there is a derivation occurring in time domain, hence combining Eqs.(1) and (2), the expressions of 5th-derivative Gaussian pulse in time and frequency domains can be derived as µ ¶ −15σ 4 t + 10σ 2 t3 − t5 t2 √ G5 (t) = A exp − 2 (3) 2σ 2πσ 11 A2 (2πf )10 exp[−(2πf σ)2 ] (4) ε5 (f ) = Tf 2009 transmitted pulse width in a certain extent. Defined the pulse width τ as the period across which the energy accumulated achieves 99.9% of that over infinite time span, we can get Z τ /2 −τ /2 ÁZ G2n (t) ∞ G2n (t) ≥ 99.9% (6) −∞ According to Eq.(6), we have τ = 8σ for 5th-derivative Gaussian pulse. From Eqs.(5) and (6), we can illustrate the relationships among the time parameter σ, pulse width τ and the optimized frequency fopt as shown in Fig.1. Apparently, an optimized 5th-derivative Gaussian pulse shall feature fopt = 6.85GHz and τ = 8σ ≈ 420ps, which is our design goal in this work. III. Circuit Design 1. Approximate algorithm for Gaussian pulse Actually, it is infeasible to implement a 5th-derivative Gaussian pulse generator directly based on Eq.(3) in CMOS, since it implies a very complicated circuit topology. For example, Ref.[12] reports a 2nd-derivative Gaussian pulse generator using MOSFET operating in sub-threshold region to generate the waveform, which makes accurate control close to impossible in actual design under PVT variations. To realize low power and low cost design, a new systematic approximation method is proposed in this paper. The new Gaussian PG design method utilizes a simple CMOS inverter concept where the exponential function associated with capacitive load charging and discharging serves to generate the required various Gaussian pulses, which can be understood using the conceptual two CMOS inverter schematic and its equivalent circuit as shown in Fig.2. Clearly, Eq.(4) suggests an optimized frequency fopt where PSD achieves the maximum. Careful design to locate the maximum PSD at the center of UWB spectrum, i.e., fopt = 6.85GHz, can certainly utilize the FCC-allowed UWB bandwidth the most. In order to find the optimized frequency point corresponding to the maximum PSD, by differentiating Eq.(4) against frequency f and setting it to zero, we have √ fopt = 5/2πσ (5) Fig. 2. Approximate concepts to generate Gaussian pulse and comparison with ideal Gaussian waveform Fig. 1. Relationships among time parameter, pulse width and optimized frequency for 5th-derivative Gaussian pulse Obviously, the optimized center frequency fopt is only related to the time constant σ. Meanwhile, σ also represents the Inverter M1p -M1n generates a delayed square wave at Vg , while inverter M2p -M2n produces a Gaussian pulse at Vo by carefully sizing MOSFETs and tuning the charging/discharging procedure. M1p , M1n , M2p & M2n are modeled by R1p , R1n , R2p & R2n and switches K1p , K1n , K2p & K2n . To understand it, assume input changes from low to high, K1n turns on and M1n moves from saturation to linear region. The charged C1 starts discharge via M1n and Vg drops An Ultra Low-Power FCC-Compliant 5th-Derivative Gaussian Pulse Generator for IR-UWB Transceiver gradually to zero, which progressively turns on K2p with M2p transferring from sub-threshold to saturation for small Vo . Assume C1 being charged to VDD initially, neglecting transistor high-order effects and using the I-V characteristics described in Ref.[13], the Vg waveform can be derived as In t , t ≤ t1 = Vthn C1 /In VDD − C1 Vg = (7) t−t1 − (VDD − Vthn )e Req C1 , t > t1 where Vthn is threshold voltage, In = Kn (VDD − Vthn )2 is constant saturate current and Req = 1/Kn (VDD − Vthn ) is equivalent linear region resistor for M1n . Next, assuming same threshold voltage for NMOS and PMOS, i.e., Vthn = −Vthp = Vth , M2p will operate at weak inversion for t < t1 while in saturation when t > t1 . Using Kirchhoff law, we have In t I0 e ζVT C1 , t ≤ t1 = Vth C1 /In dVo = Ip ≈ C2 t−t1 ´2 ³ − dt Kp (VDD − Vth )2 1 − e Req C1 , t > t1 (8) where I0 and ζ are process dependant parameters and VT = kT /q is thermal voltage. Solving Eq.(8) by integration results in the required output signal waveform as ´ ³ t η −1 , M e t ≤ t1 = Vth C1 /In ³ t1 ´ Vo = (9) M e η − 1 + P (t − t1 ) 2(t−t1 ) ´ 1 − Q ³ − Rt−t + 4e eq C1 − e Req C1 − 3 , t > t1 4 where η = ζVT C1 /In , M = I0 η/C2 , P = Kp (VDD − Vth )2 /C2 and Q = P · 2Req C1 . To validate the new approximate Gaussian generation method, the output pulse amplitude obtained using our approximation algorithm for a 2-inverter circuit is compared with that from accurate Gaussian simulation in time domain as illustrated in Fig.2, which shows that the new design method matches ideal simulation very well. The minor discontinuity point observed, marked with a dashed circle, is attributed to adoption of simplified two-segment CMOS modeling for weak inversion to saturation transition used in this approximation method, referring to Eqs.(7) to (9), which could not occur in real transistor operation. 2. Circuit implementation Fig.3 shows a block diagram for our novel 4-delay-cell 5thderivative Gaussian PG using the above 2-inverter Gaussian approximation concept. 607 In Fig.3, the 5th-derivative Gaussian pulse generator consists of three cascade stages: Square wave (SW) generation, Gaussian pulse formation and 5th-derivative combination. A square wave generator produces needed square waveforms from a common sinusoid. Sharp rising/falling edges are critical to extremely narrow pulse generation. A novel 4-delay-cell topology is used to generate four carefully delayed phases and the delay time ∆t can be controlled by adjusting the delay cell. Four 2-inverter units, each composed of a delay cell and a Separate pulse generator (SPG), produce four phase-shifted 0th-order Gaussian pulses, which are combined by a multiplexing unit to generate the desired 5th-derivative Gaussian pulse at the output. The detailed schematic and timing diagram of the proposed 4-delay-cell 5th-derivative Gaussian pulse generator are shown in Fig.4. Five square waveforms (SW1–SW5) are produced by four delay cells, which go through the NAND/NOR gates (i.e., SPG) to generate the four phase-shifted 0th-order Gaussian pulses. A final 5th-derivative Gaussian pulse is then produced by M1 /M2 /M3 /M4 multiplexing. This greatly simplified 4-delay-cell PG topology leads to significantly reduced power dissipation and circuit size. Fig. 4. Schematic and timing diagram of the proposed 4delay-cell 5th-derivative Gaussian pulse generator IV. Measurements A fully integrated FCC-compliant 4-delay-cell 5thderivative Gaussian pulse generator for impulse-based carrierfree IR-UWB transceiver is designed and fabricated in a foundry 0.13µm CMOS. The die photo is shown in Fig.5 and the occupied area without testing pads is merely 0.02mm2 . Fig. 5. Die photo of the proposed 5th-derivative Gaussian PG Fig. 3. Topology of the proposed 5th-derivative Gaussian pulse generator Fig.6 shows the measured 5th-derivative Gaussian pulse 608 Chinese Journal of Electronics train and one single zoomed in pulse in time domain with 100MHz PRF. The measured pulse width is τ ∼ 770ps and signal amplitude is Vpp ∼ 66mV, which somewhat deviate from the preferred values from circuit analysis as mentioned in Section II. This discrepancy is mainly attributed to inaccuracy in the foundry provided PDK models because the 0.13µm CMOS process used was still in its early qualification phase at the time of this design. Although the maximum PSD does not locate at the proposed optimum frequency of 6.85GHz and the whole spectrum does not fully occupy the FCC EIRP mask room, the relationship between the pulse width and fopt still meets Eq.(5). In future work, revision will be applied to improve the 5th-derivative PG performance by further narrowing the pulse width. Since the measured 5th-derivative Gaussian pulse still has fairly narrow width, the proposed PG circuit can be used and embedded in the IR-UWB single-chip transmitter with simple BPSK modulation, which is favorable to avoid complicated baseband modulation topology and capable of potentially support up to 1.3Gbps wireless data throughput with low cost and low power. 2009 dissipation at 1.2V supply measured at 100MHz PRF. Table 1 is the performance summary and comparison with other published papers, indicating that this design achieves the record lowest power consumption, the smallest die area and the second narrowest pulse width. Table 1. Performance summary and comparison with other reported papers f -Band Vpp Power Size τ (ns) Tech. Refs. (GHz) (mV) (pJ/pulse) (mm2 ) [4] 5.1–5.6 1.7 250 313 2.38 0.18µm BiCMOS [5] 7–9 17 200 40 0.066 90nm CMOS [6] 2.9–5.2 3 700 47 0.08 90nm CMOS [7] 3.1–10.6 2.4 148 58 0.18 0.5µm CMOS [8] 0–10 0.42 51 36 0.13 0.18µm CMOS [9] 0.5–5 0.8 330 63 1.56 0.13µm CMOS [10] 1 600 1800 1.95 0.35µm CMOS [14] 3.1–8 1.75 1280 825 0.4 0.18µm CMOS This 3.1–10.6 0.77 66 5.1 0.02 0.13µm CMOS work V. Conclusions We demonstrated a new FCC-compliant ultra low-power fully integrated 5th-derivative Gaussian PG circuit designed in 0.13µm CMOS for full-band IR-UWB transceiver, which features novel approximated algorithm and new all-digital 4delay-cell topology and reasonably complies with FCC UWB power mask. Measurement shows the lowest reported power dissipation of 5.1pJ/pulse at 100MHz PRF, a very short pulse width of 770ps and a very small die area of less than 0.02mm2 . It can potentially support a very high data rate up to 1.3Gbps for hi-quality wireless video streaming. References Fig. 6. Measured pulse train and waveform of the 5thderivative Gaussian pulse generator (100MHz PRF) Fig. 7. Measured PSD of the proposed 5th-derivative Gaussian PG Fig.7 shows measured pulse spectrum that reasonably complies with FCC mask, yet centers at 4GHz, lower than the expected fopt = 6.85GHz due to the same reasons above. The simplified topology results in a record low 5.1pJ/pulse power [1] FCC, First Report and Order, FCC 02-48, February 14, 2002. [2] J. Han and C. Nguyen, “A new ultra-wideband ultra-short monocycle pulse generator with reduced ringing”, IEEE Microwave and Wireless Components Letters, Vol.12, No.6, pp.206–208, 2002. [3] S. Yilmaz and I. Tekin, “Ultra-wideband N-bit digitally tunable pulse generator”, Proc. IEEE International Conference on Ultra-Wideband, Zurich, Switzerland, pp.438–441, 2005. [4] D. Wentzloff and A. Chandrakasan, “Gaussian pulse generators for subbanded ultra-wideband transmitters”, IEEE Transactions on Microwave Theory and Techniques, Vol.54, No.4, pp.1647–1655, 2006. [5] J. Ryckaert, G. Van der Plas, V. De Heyn, C. Desset, B. Van Poucke and J. Craninckx, “A 0.65-to-1.4nJ/Burst 3-to-10 GHz UWB All-Digital TX in 90nm CMOS for IEEE 802.15.4a”, IEEE Journal of Solid-State Circuits, Vol.42, No.12, pp.2860– 2869, 2007. [6] D. Wentzloff and A. Chandrakasan, “A 47pJ/pulse 3.1-to-5GHz all-digital UWB transmitter in 90nm CMOS”, IEEE International Solid-State Circuits Conference Digest, San Francisco, California, USA, pp.118–591, 2007. [7] H. Kim and Y. Joo, “Fifth-derivative Gaussian pulse generator for UWB system”, Proc. IEEE Radio Frequency Integrated Circuits Symposium, Long Beach, California, USA, pp.671–674, 2005. [8] H. Xie, X. Wang, A. Wang, B. Zhao, Y. Zhou, B. Qin, H. Chen and Z. Wang, “A Varying pulse width 5th-derivative Gaus- An Ultra Low-Power FCC-Compliant 5th-Derivative Gaussian Pulse Generator for IR-UWB Transceiver sian pulse generator for UWB transceivers in CMOS”, Proc. IEEE Radio and Wireless Symposium, Orlando, Florida, USA, pp.171–174, 2008. [9] L. Smaini, C. Tinella, D. Helal, C. Stoecklin, L. Chabert, C. Devaucelle, R. Cattenoz, N. Rinaldi and D. Belot, “Single-chip CMOS pulse generator for UWB systems”, IEEE Journal of Solid-State Circuits, Vol.41, No.7, pp.1551–1561, 2006. [10] C.F. Liang, S.T. Liu and S.I. Liu, “A calibrated pulse generator for impulse-radio UWB applications”, IEEE Journal of SolidState Circuits, Vol.41, No.11, pp.2401–2407, 2006. [11] H. Sheng, P. Orlik, A.M. Haimovich, L.J. Cimini, Jr. and J. Zhang, “On the spectral and power requirements for ultrawideband transmission”, Proc. IEEE International Conference on Communications, Anchorage, Alaska, USA, pp.738– 742, 2003. [12] Y.J. Zheng, H. Dong and Y.P. Xu, “A novel CMOS/BiCMOS UWB pulse generator and modulator”, IEEE Microwave Symposium Digests, Fort Worth, Texas, USA, pp.1269–1272, 2004. [13] T.H. Lee, The Design of CMOS Radio-Frequency Integrated Circuits, First Edition, Cambridge University Press, New York, USA, pp.53–55, 1998. [14] T. Norimatsu, R. Fujiwara, M. Kokubo, M. Miyazaki, A. Maeki, Y. Ogata, S. Kobayashi, N. Koshizuka and K. Sakamura, “A UWB-IR transmitter with digitally controlled pulse generator”, IEEE Journal of Solid-State Circuits, Vol.42, No.6, pp.1300– 1309, 2007. QIN Bo received B.S. degree in electrical engineering from Xi’an Jiaotong University, China, in 2004. He is currently working toward the Ph.D. degree in Institute of Microelectronics, Tsinghua University, China. His research interests include ultra wideband system and circuit design, RF circuit design and mixed-signal IC design. (Email: [email protected]) CHEN Hongyi Professor of Institute of Microelectronics in Tsinghua University (IMETU), Senior member of Chinese Institute of Electronics (CIE), Senior member of Institute of Electric and Electronic Engineers (IEEE). His research accesses semiconductor device structures and integrated circuit design. He is currently working on ASIC and SOC (system on a chip) design methodology, library development technology, algorithm mapping to hardware architecture and realization, VLSI-DSP and applications in multimedia signal (e.g. 609 speech, audio, image and video) processing and information security fields, etc. He has published more than 230 academic articles, co-published two books and co-translated two textbooks, claimed 21 items of US innovation patents (among which 13 items have been awarded) with his colleagues and students. He has been advising 28 M.S. students with 22 receiving M.S./M.E. degrees and 27 Ph.D. candidates with 20 receiving Ph.D. degree. (Email: [email protected]) WANG Xin received the B.S. degree from Beijing University of Posts and Telecommunications, Beijing, China in 2005 and the MSEE degree from Illinois Institute of Technology, Chicago, USA in 2007. He is currently working toward Ph.D. degree in Department of Electrical Engineering, University of California, Riverside, USA. His research interests are Ultra wideband (UWB) SoC design, RF circuit design and Electrostatic discharge (ESD) design and applications. (Email: [email protected]) WANG Albert IEEE Fellow, received the B.S. degree from Tsinghua University, China, and the Ph.D. degree from The State University of New York at Buffalo in 1985 and 1996, respectively. From 1995 to 1998, he was a Staff Engineer at National Semiconductor Corporation. From 1998 to 2007, he was a Professor of Electrical and Computer Engineering in Illinois Institute of Technology, USA, where he directed the Integrated Electronics Laboratory. He is currently a Professor of Electrical and Computer Engineering and Director for the Laboratory of Integrated Circuits and Systems at the University of California, Riverside, USA. His research interests focus on Analog/Mixed-Signal/RF ICs, Advanced on-Chip ESD Protection, IC CAD and Modeling, SoC, and Nano Devices, etc. He received the CAREER Award from the National Science Foundation in 2002. He is the author of the book “On-Chip ESD Protection for Integrated Circuits” (Kluwer, 2002) and 130+ peer-reviewed papers in the field, and holds several U.S. patents. Dr. Wang is Editor for the IEEE Electron Device Letters and Guest Editor for IEEE Transactions on Microwave Theory and Techniques. He was an Associate Editor for the IEEE Transactions on Circuits and Systems I, Associate Editor for the IEEE Transactions on Circuits and Systems II, Guest Editor for the IEEE Journal of Solid-State Circuits and Guest Editor-in-Chief for the IEEE Transactions on Electron Devices. (Email: [email protected])
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