ISSN (Online) 2278-1021
ISSN (Print) 2319 5940
International Journal of Advanced Research in Computer and Communication Engineering
Vol. 4, Issue 9, September 2015
Sine-Cosine Computation Using CORDIC
Algorithm
Ranjita Naik1, Riyazahammad Nadaf2
UG Student, Dept of Computer Science, BVB College of Engineering & Technology, Hubli, India 1
PG Student, Dept of Electronics and Communication, SDM College of Engineering & Technology, Dharwad, India 2
Abstract: CORDIC stands for Coordinate Rotation Digital Computer. The CORDIC algorithm was introduced for the
computation of Trigonometric functions, Multiplication, Division, Data type conversion, Square Root and Logarithms.
It is a highly efficient, low complexity, hardware efficient algorithm giving a robust technique to compute the
elementary functions. In the paper the CORDIC algorithm, its usage in calculating quadrature functions, its applications
and advantages and disadvantages are explained.
Keywords: CORDIC (Coordinate Rotation Digital Computer), Sine-Cosine, CORDIC Algorithm.
I. INTRODUCTION
II. CORDIC ALGORITHM
CORDIC stands for Coordinate Rotation Digital
Computer. It calculates the value of trigonometric
functions like sine, cosine, magnitude and phase to any
desired precision. It can also calculate hyperbolic
functions (such as sinh, cosh and tanh). The CORDIC
algorithm does not use calculus based methods such as
polynomial or rational function approximation. It is used
as approximation function values on all popular graphic
calculators, including HP-48G as the hardware restriction
of calculators require that the elementary functions should
be computed using only additions, subtractions, digit
shifts, comparisons and stored constants. CORDIC
algorithm revolves around the idea of "rotating" the phase
of a complex number, by multiplying it by a succession of
constant values.
However, the "multipliers" can all be powers of 2, so in
binary arithmetic they can be done using just shifts and
adds. There is no actual "multiplier" needed, thus it is
simpler and does not require a complex hardware structure
as in the case of multiplier. Earlier methods used for
evaluation of trigonometric functions are table look up
method, polynomial approximation method etc. CORDIC
is useful in designing computing devices. As it was
originally designed for hardware applications, there are
features that make CORDIC an excellent choice for small
computing devices. Since it is an iterative method it has
the advantage over the other methods of being able to get
better accuracy by doing more iteration, whereas the
Taylor approximation and the Polynomial interpolation
methods need to be averaged to get better results.
Volder's algorithm is derived from the general equations
for a vector rotation. If a vector V with coordinates (x, y)
is rotated through an angle Ø then a new vector V’ with
new coordinates (x’, y’) is formed where x’ and y’ can be
obtained using x, y and Ø from the following method.
For the ease of calculation here only rotation in
anticlockwise direction is observed first. So the individual
equations for x’ and y’ can be rewritten as
Fig 2.Rotation of vector V by an angle Ø
Volder observed that by factoring out a {cos Ø} from both
sides, resulting equation will be in terms of the tangent of
the angle Ø. Next if it is assumed that the angle φ is being
an aggregate of small angles, and composite angles is
These properties, in addition to getting a very accurate chosen such that their tangents are all inverse powers of
approximation is perhaps the reason why CORDIC is used two, then this equation can be rewritten as an iterative
in many scientific calculators today. Due to thesimplicity formula
of the involved operations the CORDIC algorithm is very
well suited for VLSI implementation. However, the
CORDIC iteration is not a perfect rotation which would
involve multiplications with sine and cosine. The rotated
vector is also scaled making a scale factor correction
here Ø is the angle of rotation and z is the argument.
necessary.
Copyright to IJARCCE
DOI 10.17148/IJARCCE.2015.4910
44
ISSN (Online) 2278-1021
ISSN (Print) 2319 5940
International Journal of Advanced Research in Computer and Communication Engineering
Vol. 4, Issue 9, September 2015
The multiplication by the tangent term can be avoided if
the rotation angles and tan(Ø) are restricted so that tan(Ø)
= 2-i .In digital hardware thisdenotes a simple shift
operation.
Furthermore, if those rotations are performed iteratively
and in both directions every value of tan(Ø) is
representable. With Ø = tan-1(2-i) the cosine term could
also be simplified and since cos(Ø) = cos(-Ø ) it is
constant for a fixed number of iterations. This iterative
rotation can now be expressed as:
Then
Where, i denotes the number of rotations required to reach
the required angle of the required vector Ki=cos (tan-1 2-i)
and d=±1. αiis nothing but φi ,represented for convenience
purpose.The product of the Ki represent the so called K
factor
Where φiis the angle of rotation of each iteration.
ki is the gain and its value changes as the number of
iteration increases. For 8-bit hardware CORDIC
approximation method the value of kias
The computation of xi+1 or yi+1 requires an i-bit right shift
and an add/subtract. If the function tan-12-i is pre computed
and stored in table for different values of i, a single
add/subtract suffices to compute zi+1. Each CORDIC
iteration thus involves two shifts, a table lookup and three
additions.
If the rotation is done by the same set of angles (with + orsigns), then the expansion factor K, is a constant, and can
be pre computed. For example to rotate by 30 degrees, the
following sequence of angles be followed that add up to ϵ
30 degree. 30.0 ϵ 45.0 - 26.6 + 14.0 - 7.1 + 3.6 + 1.8 -0.9 +
0.4 - 0.2 + 0.1 ϵ 30.1 In effect, what actually happens in
CORDIC is that z is initialized to 30 degree and then, in
each step, the sign of the next rotation angle is selected to
try to change the sign of z, that is, di = sign(zi ) is chosen,
where the sign function is defined to be -1 or 1 depending
on whether the argument is negative or nonnegative. This
is reminiscent of non-restoring division. The table shows
the process of selecting the signs of the rotation angles for
a desired rotation of +30 degree. In CORDIC terminology
the preceding selection rule for di , which makes z
converge to zero, is known as rotation mode. Rewriting
the CORDIC iteration, where αi= tan-12-i
From the previous table it can be seen that precision up to
0.44690 is possible for 8-bit CORDIC hardware. These Øi
are stored in the ROM of the hard ware of the CORDIC
hardware as a look up table.
After m iteration in rotation mode, when z (m) is
The CORDIC Algorithm can be used in iterative mode, to sufficiently close to zero. We have Σαi=z, and the
simplify each rotation, picking αi(angle of rotation in ith CORDIC equations become:
iteration) such that αi= ( di .2-i ). di is such that it has value The constant K in the preceding equation is k =
1.646760258121……
+1 or -1 depending upon the rotation i. e. di ϵ {+1,-1} .
Copyright to IJARCCE
DOI 10.17148/IJARCCE.2015.4910
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ISSN (Online) 2278-1021
ISSN (Print) 2319 5940
International Journal of Advanced Research in Computer and Communication Engineering
Vol. 4, Issue 9, September 2015
Rule: choose di ϵ { -1,1} such that z --> 0
Thus, to compute cos z and sin z, one can start with x =
1/K = 0.607252935….. And y = 0, then, as zm tends to 0
with CORDIC iterations in rotation mode, xm and ym
converge to cos z and sin z, respectively. Once sin z and
cos z are known, tan z can be found out through necessary
division.
CORDIC is a feasible way to approximate cosine and sine.
There are two ways in CORDIC algorithm for calculation
of trigonometric and other related functions. They are
rotation modeand Vector mode. Both methods initialize
the angle accumulator with the desired angle value. The
rotation mode, determines the right sequence as the angle
accumulator approaches zero while the vector mode
minimizes the y component of the input vector.
A straight forward hardware implementation for CORDIC
arithmetic is shownbelow. It requires three registers for x,
y and z, a look up table to store the valuesof αi=tan-12-i,
and two shifter to supply the terms 2-i x and 2-i y to the
adder/subtractor units. The di factor (-1 and 1) is
accommodated by selecting the (shift) operand or its
complement.
Of, course a single adder and one shifter can be shared by
three computations if a reduction in speed by a factor of 3
is acceptable. In the extreme, CORDIC iterations can be
implemented in firmware (micro program)or even
software using the ALU and general purpose registers of a
standard microprocessor. In this case, the look up table
supplying the termαi can be stored in the control ROM or
in main memory.
Fig 2.First 3 iteration of rotating the vector
For k bits of precision in the resulting trigonometric
functions, k CORDIC iterations are needed. The reason is
that for large iit can be approximated that tan-1 2-i≈2-i .
Hence, for i> k, the = change in the z will be less than ulp
(Unit in the Last Place). In the rotation mode, convergence
of z to zero is possible because each angle in table 1 is
more than half the previous angle or, equivalently, each
angle is less than the sum of the entire angle following it.
The domain of convergence is - 99.7 < z < 99.7, where
99.7 is the sum of all the angles in table 3.1. Fortunately,
this range includes angle from -900 to +900. For outside
the preceding range, trigonometric identities can be
converted to the problem, to one that is within the domain
of convergence:
Fig3.Hardware Elements and Architecture for the
CORDIC Algorithm (Single Stage)
III.CORDIC HARDWARE AND ARCHITECTURE
CORDIC is generally faster than other approaches when a
hardware multiplier is unavailable (e.g. in a
microcontroller) or when the number of gates required
toimplement the function is to be minimized (e.g. in an
FPGA). On the other hand, when a hardware multiplier is
available (e.g. in a DSP microprocessor), table lookup
methods and power series are generally faster than
CORDIC. In recent years, the CORDIC algorithm has
been used extensively for various biomedical applications,
Fig 4.Hardware Elements and Architecture for the
especially in FPGA implementations. Various CORDIC
CORDIC Algorithm (Iterative)
architectures like bit parallel iterative CORDIC, a bit
parallel unrolled CORDIC, a bit-serial iterative CORDIC Each branch consists of an adder-subtractor combination,
and the comparison of various CORDIC architecture has a shift unit and a register for buffering the output. At the
been discussed in the literatures. It can be seen that beginning of a calculation initial values are fed into the
Copyright to IJARCCE
DOI 10.17148/IJARCCE.2015.4910
46
ISSN (Online) 2278-1021
ISSN (Print) 2319 5940
International Journal of Advanced Research in Computer and Communication Engineering
Vol. 4, Issue 9, September 2015
Output waveform of sine computation using CORDIC algorithm
Fig 5 . verilog Implementation Showing Outputs
register by the multiplexer where the MSB of the stored Advantages
value in the z-branch determines the operation mode for
 Hardware requirement and cost of CORDIC processor is
the adder-subtractor, signal in the xand y branch pass the
less as onlyshift registers, adders and look-up table
shift units and are then added to or subtracted from the
(ROM) are required.
unshifted signal in the opposite path.
 Number of gates required in hardware implementation,
such as on an FPGA, is minimum as hardware
The z branch arithmetically combines the registers values
complexity is greatly reduced compared to other
with the values taken from a look up table whose address
processors such as DSP multipliers.
is changed accordingly to the number of iteration.

It is relatively simple in design.
For n iterations the output is mapped back to the registers

No multiplication and only addition, subtraction and bitbefore initial values are fed in again and the final
shiftingoperation ensures simple VLSI implementation.
sine value can be accessed at the output. A simple finite
Delay involved during processing is comparable to that
state machine is needed to control the multiplexers, the
during the implementation of a division or squareshift distance and the addressing of the constant values.
rooting operation.
 Either if there is an absence of a hardware multiplier
IV.PIN DIAGRAM OF CORDIC
(e.g. uC, uP) or there is a necessity to optimize the
number of logic gates (e.g. FPGA)CORDIC is the
preferred choice.
Disadvantages
Fig6. Pin Diagram of CORDIC Implementation
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 Large number of iterations required for accurate results
and thus the speed is low and time delay is high.
 Power consumption is high in some architecture types.
 Whenever a hardware multiplier is available, e.g. in a
DSP
 Microprocessor, table look-up methods and good oldfashioned power series methods are generally quicker
than this CORDIC algorithm.
DOI 10.17148/IJARCCE.2015.4910
47
ISSN (Online) 2278-1021
ISSN (Print) 2319 5940
International Journal of Advanced Research in Computer and Communication Engineering
Vol. 4, Issue 9, September 2015
IV. CONCLUSION
Efficient method to calculate sine and cosine is
implemented using Verilog coding. Applications in several
diverse areas including signal processing, image
processing, communication, robotics and graphics apart
from general scientific and technical computations have
been explored.
REFERENCES
[1]
[2]
[3]
J. Volder, The CORDIC trigonometric computing technique, IRE
Transactions on Electronic Computers, Vol. EC-8, 1959,pp. 330334.
R. Andraka, A survey of CORDIC algorithms for FPGA-based
computers, Proceedings of ACM/SIGDA Sixth International
Symposium on Field Programmable Gate Arrays, 1998, pp.191200[]
LeenaVachhani, K. Sridharan, P.K. Meher, Efficient CORDIC
algorithms and architectures for low area and high throughput
implementation, IEEE Transactions on Circuits and Systems - Part
II: Express Briefs, Vol. 56, No. 1, January 2009, pp. 61-65
BIOGRAPHIES
RANJITA NAIK Pursuing Bachelor of
Engineering in Computer science from
BVB College of engineering and
technology Hubli. Area of interest is
cryptography.
RIYAZAHAMMAD NADAF did
Bachelor of Engineering in Electronics
and communication Engineering from
Tontadarya College of Engineering,
Gadag and currently pursuing M.Tech in
Digital
Electronics
from
Sri
Dharmasthala
Manjunatheshwara
college of engineering and Technology
(SDMCET), Dharwad, Karnataka, India. Area of interest
includes cryptography, Nanotechnology and Atomic
Physics.
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