Brazilian Journal of Physics, vol. 27/A, no. 4, december, 1997
237
High Resistivity Silicon Layers Obtained By
Hydrogen Ion Implantation
Henrique Estanislau Maldonado Peresand Francisco Javier Ramirez Fernandezy
Grupo de Sensores Integrados e Microestruturasz- SIM
Laborat
orio de Microeletr^onica - Escola Politecnica da USP
Caixa Postal: 61548 - 05424-970 - S~
ao Paulo - SP - Brazil
Phone: (011) 818-5310 - Fax: (011) 818-5585
Received February 2, 1997
This work presents a study of the perspectives of the use of hydrogen ion implantation in
silicon as option to obtain a supercial stable crystalline layer electrically isolated from the
silicon substrate. High resistivity buried layers are obtained by hydrogen ion implantation on
p doped silicon wafers. Following implantation the wafers are submitted to Rapid Thermal
Annealing (RTA) and Conventional Thermal Annealing (CTA). After the thermal process,
it was veried the permanence of the high resistivity buried layer. Spreading resistance
proles show resistivity peak values around 300 Qcm.
I. Introduction
Microelectronics development have been stimulated
the growing of new structures and the combination of
processing techniques in order to obtain more integration and velocity of electronic devices.
On this context, hydrogen Ion Implantation in silicon shows perspectives as option to obtain a supercial
high quality layer electrically isolated from the silicon
substrate [1].
Obtention of such structure has been studied combining hydrogen Ion Implantation (that creates a damaged high resistivity buried layer [2]) with thermal annealings that promote defects and contaminants gettering on surface by hydrogen [3].
In this work it is studied hydrogen Ion Implantation
to obtain high resistivity layers and its behaviour after
Rapid Thermal Annealing and Conventional Thermal
Annealing.
II. Experimental Procedure
The starting material are P doped < 100 >
Czochralski silicon wafers with resistivity equal to 14
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cm and the study is made in two steps: Variation of
hydrogen ion implantation dose and Variation of Conventional Thermal Annealing time as follows:
II.1 Inuence of Hydrogen Ion Implantation
Dose
Hydrogen ion implantations are made with 100 KeV
H+ ions and doses: 2.0E14, 2.0El5 and 2.0E16 H+ /cm2.
Resistivity modications along samples depth resulting
from lattice silicon damage are measured by Spreading Resistance Probe (SRP) technique. Fig. 1 shows
a schematic picture of the SRP technique and Fig. 2
shows obtained proles.
It is veried a signicant resistivity increase for
all doses including a peak formation at 0.9 m depth
(which is the projected range for 100 KeV H+ implantation in to silicon) where is reached the equipment
measurement limit, indicating a resistivity around 300
cm. So, high resistivity buried layers in silicon are obtained, although in this range is not expected complete
silicon lattice amorphization, but only lattice damage.
238
Figure 1. Schematic picture of the SRP technique.
H. E. M. Peres and F. J. R. Fernandez
annealing are suggested: rst a Rapid Thermal Annealing (RTA) that stimulates H2 \bubbles" formation
(which have very low diusivity) [3,5] in the hydrogen
projected range region. Second a Conventional Thermal Annealing (CTA) that promotes surface recover including defects gettering by hydrogen.
So, samples are prepared with hydrogen ion implantation (100 KeV energy and 5.0E15 H+ /cm2 dose) followed by RTA in argon ambient with temperature slope
of 50 o C/s, plateau temperature at 900 o C, plateau time
of 64 seconds and nally followed by CTA in nitrogen
ambient at 1200 o C for dierent times: t = 16, 36, 64
and 100 minutes (so t1=2 = 4, 6, 8 and 10 minutes1=2
to test diusion model).
Spreading Resistance proles are obtained again as
showed in Fig. 3.
It is veried the permanence of the high resistivity buried layer (more than 300 cm) even after 100
minutes at 1200 o C annealing. That layer permanence
reinforces the assumption of H2 \bubbles" formation
along Rapid Thermal Annealing.
Figure 2. Spreading Resistance proles for hydrogen implanted +samples
with 100 KeV and doses: 2E14, 2E15 and
2E16 H /cm2 .
The resistivity peak broadening from 0.9 m to sample depth while hydrogen dose increases is caused probably by channeling of hydrogen ions.
The resistivity increase maybe attributed to sum of
two factors: By silicon lattice damage caused by ion
implantation process and by neutralization of P type
dopants (boron) by hydrogen [4].
II.2 Thermal Annealing After Ion Implantation
Thermal annealing is necessary to recover crystalline structure of silicon supercial region. To do
this without loosing buried resistivity peak, two steps
Figure 3. Spreading Resistance proles
for hydrogen im+ /cm2 ) followed by RTA
planted
samples
(100
KeV,
SE15
H
(900 o C, 64s) and CTA (1200 o C and indicated times).
Brazilian Journal of Physics, vol. 27/A, no. 4, december, 1997
Other relevant aspect that can be observed is the
regular displacement of resistivity peak to bulk direction while CTA time increases. A graphic of peak position vs. square root of CTA time (Fig. 4) shows
a \like diusion" behaviour for peak displacement; in
other words, the peak position is proportional to t1=2
like general diusion model:
L = 2(Dt)1=2
The straight line tted indicates a diusion coecient around: D 4E ; 12 cm2/s.
239
III. Conclusions
In this work is studied hydrogen ion implantation
directioned to obtain high resistivity silicon layers with
perspectives to build a structure composed of an improved quality surface region electrically isolated from
the substrate.
High resistivity buried layers (above 300 cm) are
obtained in silicon by means of hydrogen Ion Implantation with doses between 2.0E14 and 2.0E16 H+ /cm2.
Processing Rapid Thermal Annealing (RTA) and
Conventional Thermal Annealing (CTA) after hydrogen implantation, it is veried the permanence of high
resistivity layer inside silicon samples indicating structure stability. The regular displacement of high resistivity peak with CTA time shows the possibility to control
its position (depth) inside the sample.
So, a step has been given to obtain the desired structure. To continue the work, electrical isolation between
surface and bulk regions must be tested and devices
must be constructed to study silicon surface conditions.
References
Figure 4. Peak position vs. square root of CTA time showing a \like diusion" behaviour.
1. J. M. Li, M. Chong and J. Zhu, Electronics Letters
28, (1992).
2. Y. V. Bulgakov and T. I. Kolomenskaya, Sov.
Phys. Semicond. 1, (1967).
3. J. I. Pankove and N. M. Johnson, Semiconductors
and semimetals 34, (1991).
4. N. M. Johnson, C. Herring and D. J. Chadi,
Physics Review Letters 56, 769 (1986).
5. J. M. Li, Applied Physics Letters. 55, 2223
(1989).