Semiconductor Materials for Power
Electronics (SEMPEL)
GaN power electronics materials
Kjeld Pedersen
Department of Physics and Nanotechnology, AAU
SEMPEL
Semiconductor Materials
for Power Electronics
AALBORG UNIVERSITY
Physics and Nanotechnology
1
Two main applications of GaN
Power Electronics and LEDs
• Power electronics
– Key enabling technology
• Today 40% of global energy
consumption is electrical
70% expected in 2040:
•
Energy Roadmap 2050, European Commission:
IGBT-module
http://ec.europa.eu/energy/energy2020/roadmap/index_en.htm
•
GaN technology can reduce losses significantly
• LED technology
• 19% of electricity for lighting (14% in EU)
• > 200 TWh in EU, > 70 Mt CO₂
• Light Emitting (GaN) Diodes
will reduce losses significantly
Huge potential for energy savings – Several % just by change of semiconductor!
GaN and SiC potentials
Wide bandgap:
3.4 eV for GaN vs 1.1 for Si
• High switching frequencies, 100
MHz at kW powers
• Efficiency enhancements of 2-10
% ( e.g. from 96 to 99 %)
• Smaller footprint and weight –
down to 10%
3
2D-electron gas – polarization effects
• Spontaneous 𝑃𝑆𝑃
• Piezoelectric 𝑃𝑃𝐸
Engineering of electronic
properties: Polarizations
instead of doping!
Journal of Applied Physics 85, 3222 (1999)
𝑷𝒐𝒍𝒂𝒓𝒊𝒛𝒂𝒕𝒊𝒐𝒏 𝒄𝒉𝒂𝒓𝒈𝒆:
𝜌𝑃 = 𝛻𝑃
𝜎 = 𝑃𝑆𝑃 𝑡𝑜𝑝 + 𝑃𝑃𝐸 (𝑡𝑜𝑝) −
𝑃𝑆𝑃 𝑏𝑜𝑡𝑡𝑜𝑚 + 𝑃𝑃𝐸 (𝑏𝑜𝑡𝑡𝑜𝑚)
2D electron gas at interface
Journal of Applied Physics 87, 334 (2000)
4
WBG power devices
• Vertical SiC MOSFET
• GaN HEMT
GaN vs SiC Devices
•
•
•
SiC avalable as 8” wafers
GaN films on substrate
High electron mobility GaN 2DEG
– Heterojunction GaN/AlₓGa₁˗ₓN –No doping!
– Polarization charges
– →Low ON-resistance of HEMT
•
HEMT
–
–
•
÷ one-sided structure – more space required
+ higher mobility
HEMT
– Normally ON (Depletion Mode) – negative gate
voltage to close
– More complicated structure for normally OFF
(Enhancement Mode)
•
•
Higher thermal conductivity of SiC
SiC – technology more mature
The main challenges
• Substrate- epitaxial growth GaN on Si
• Packaging – high power density
• New type of component – HEMT vs IGBT
– New challenges and opportunities
• Depletion (normally-on) vs
Enhancement (normally-off) mode
• Reliability – long-term stability
– Ohmic contacts – self-heating in drain area
– Gate dielectrics –oxide layers
S
– Buffer stack- defects (dislocations)
Size of connects vs GaN
chip!
G
Dielectric
AlGaN
2DEG
GaN
Buffer
Substrate
D
Epitaxial GaN growth
Substrates: SiC - expensive
Al₂O₃ -poor thermal conductivity
Silicon: Cheap high-quality wafers
Lattice mismatch 16% to GaN
Alloys with Ga –buffer layer needed
Mismatch in thermal expansion (54%)
→Wafer bow with high temp (1100⁰C) growth
→High density of dislocations
Silicon vs Sapphire substrates
GaN-on-Silicon versus GaN-on-Sapphire:
Powdec’s 1200V devices are GaN-on-Sapphire devices.
Not using the Silicon and using Sapphire implies intrinsic
differences in the device structure and operation.
GaN-on-Si power devices:
Thickness of nitride layers for 600V devices is 5μm or
more.
Field Plates are indivisibly needed for the conductive Si
substrate to mitigate the current collapses.
Growth on Si substrate needs chamber-cleaning prior to
the deposition to avoid the unwanted chemical reactions
between GaN and Si interface
Advantages of GaN-on-Sapphire for Power devices:
Common platform for GaN-LED production.
The growth runs successively without chamber-cleaning.
Throughput for GaN PSJ-FET/sapphire growth is roughly 10
times larger than that of the GaN FP-HEMT/Si growth.
The thermal conductivity of sapphire, 40 [W/m K], is lower
than that of Si, 150 [W/m K].
ITME
Limitations for high voltage applications
𝑉𝐵 =
2
𝜀𝑠 𝜀0 𝐸𝑐𝑟
2𝑞𝑁𝐷
𝐸𝑐𝑟 : Break-down field
Buffer break-down
a) Silicon-on-insulator wafers
b) Remove Si below transistor
c)
Semi-insulating GaN
𝑬𝒄𝒓 [𝑽
/𝝁𝒎]
𝑵𝑫 [𝒄𝒎−𝟑 ]
𝜺𝒔
𝑽𝑩 [𝑽]
Si
30
5 × 1014
11.8
600
SiC
300
5 × 1014
9.7
~50.000
GaN
340
5 × 1014
9.5
~50.000
Limits HV devices
on Si substrates!
Efficiency
• Static losses – resistance of
drift region
– Higher voltage
→ longer drift region
→ higher loss
• Dynamic losses
o Main advantage of HEMT: inherently low 𝐶𝑜𝑢𝑡
o + on drain – 2DEG depleted – no contact to gate
– No capacitance to gate – Only static losses!
o SiC: 𝐶𝑜𝑢𝑡 = 500 pF (doped layers), charged to
1000 V, switching at 100 kHz. 𝑃𝑑𝑦𝑛 = 𝑓𝐶𝑜𝑢𝑡 𝑉𝑐2 =
50 W
o 5% on a 1-kW power supply!
The normally-ON problem
1. Cascode configuration
Connection with low-voltage Si MOSFET
High blocking of HEMT – low 𝑅𝑂𝑁 of Si FET
2. True Enhancement mode
Introduction of ions that capture positive
charges at interface
Growth facilities
MOCVD in Aalborg – running since autumn 2015 modified Veco- Showerhead
2” wafers, doping with Si
PE-MBE in Aarhus- modified to GaN 2015
4” wafers, both n- and p-doping
MOCVD at AAU
MBE at AU
SiC on Si – an alternative substrate
Advantages:
Si(100)
• SiC protects against
Ga-Si reactions
• Better lattice match
• Strain relaxation
due to voids
Si(111)
Disadvantage:
Kukushkin, Semiconductors
and Dielectrics 50, 1188
• High growth
temperature
~1300⁰C
Low-temperature process (900 – 1000⁰C) developed at AU
GaN growth on SiC
4H-SiC on Si(111) as
determined from
lattice constant
AlN buffer layer (100 nm) – lattice
matching
GaN layer (750 nm)
Strong correlation between roughness of
SiC and pit hoels in GN film
Mariia Rozhavskaya et al. Semiconductor Science
and Technology (Submitted)
Contacts to GaN semiconductors
Au
Ohmic
Ni
Annealing
A few min 800 C
Au/Ni/Al
Ni
Al
Al
Ti
Ti
Ta
TaN/TiN
AlGaN
AlGaN
GaN
GaN
• Annealing leads to diffusion and formation of new elements
• Formation of TaN/TiN consumes N from the AlGaN layer
– Forms N vacancies → n-type doping
– Thins down the AlGaN layer → easier tunneling to 2D electron gass
• TiN and TaN conducting elements
Schottky: Ni/Au layers
Layout for diodes and contacts
• Circular and linear
structures tested
• Ohmic contact and
diode structures
• n-GaN/SiC ,~1016 cm-3
2.5 µm thick
• Ohmic
contacts:Ti/Al/Ti/Au
30,60,30, 90nm,
annealed at 800 0C for
5 minutes in N2
resistivity 10-5 Ω-cm2
• Schotkey contact:
Ni/Au (25/50 nm)
I-V curves for Schottkey diodes
• High quality I-V
curves
• Ideality factor1.1
𝑞𝑉
𝐼 = 𝐼0 𝑒𝑥𝑝
𝑛𝑘𝑇
• Breakdown voltage
below -100 V
• Passivation by
Si₃N₄ will be tested
Shivakumar D. Thammaiah
Accelerated aging of commercial GaN
High Electron Mobility Transistors
• Reduced thermal conductivity
from the GaN transistor to the
cooling plate
• Cracks in the soldering
between the elements
• Electrical conductivity is
found to decrease as a
consequence of the high
operation temperature
Sungyoung Song, Stig Munk-Nielsen
Summary
• Very large potentials in Wide Band Gap
semiconductors
–
–
–
–
Higher voltages
Higher frequencies
Compact systems
New applications
• GaN far from fully developed
– Still lots of materials issues
– Still room for device developments
– New types of devices
References
•
•
•
•
Power electronics with wide bandgap materials: toward greener more efficient
technologies, MRS Bulletin vol. 40 p 390 (2015) DOI:
http://dx.doi.org/10.1557/mrs.2015.71
Power-switching applications beyond silicon: Status and future prospects of SiC and
GaN devices, MRS Bulletin vol. 40 p 399 (2015) DOI:
http://dx.doi.org/10.1557/mrs.2015.89
High-voltage normally OFF GaN power transistors on SiC and Si substrates, MRS
Bulletin vol. 40 p 418 (2015) DOI: http://dx.doi.org/10.1557/mrs.2015.88
Power GaN Devices, Materials, Applications and Reliability, Springer (2017) (can be
downloaded at AAU).