190 IEEE TRANSACTIONS B. The Smirnov Class Ni The reader is referred to [5] for a full account of the Smirnov class N+ and the Nevanlinna class N. We note that the proper inclusions HP c N+ c N are valid. The following theorem is a generalization of Theorem 1; the proof of Theorem 3 ,is found in [5]. Theorem 3: Every r X m matrix function H(z) of class N+ with rank H( ej”) = m a.e. can be expressedin the form (20) H(z) = %(z)Hi(z) where H,(z) is inner, and H,(z) is any column outer function whose boundary value H,( ej”) satisfies the same magnitudesquared specification as H( ej”). Moreover, the factorization (20) is unique up to multiplication by a constant unitary matrix. By using Theorem 3 and the Parseval identity, we obtain the following theorem, which is a generalization of Theorem 2. Theorem 4: Let H(z) be an r X m matrix function of class N+ with rank H(e@) = m a.e. Then the three properties l), 2), and 3) presented in Theorem 2 are also equivalent if every phrase “class HZ ” is replaced by the phrase “class N+ ” in statements 2) and 3). The proof of this theorem can be made in the same way as the ’ proof of Theorem 2. III. CONCLUSIONS We have considered the linear discrete-time systems with matrix-valued transfer functions of the Hardy class H2 and more generally of the Smimov class N+, and obtained that the notion of minimum phase is equivalent to that of minimum-energy delay for these classes.This equivalence has been presented by means of the inner-outer factorization of transfer functions and the Parseval identity for L2 class functions. REFERENCES 111 A. V. Oppenheim and R. W. Schafer, Digital Signal Processing. Englewood Cliffs, NJ: Prentice-Hall, 1975. 121 E. A. Robinson, Random Wavelets and Cybernetic Systems. New York: Hafner, 1962. [31 Yu. A. Rozanov, “Spectral properties of multivariate stationary processes and boundary properties of analytic matrices,“Theo~ Prob. Appl. (USSR), vol. 5, pp. 362-376, 1960. [41 Yu. A. Rozanov, Stationary Random Processes (A. Feinstain, Trawl.) San Francisco: Holden-Day, 1967. PI Y. Inouye, “Linear systems with transfer functions of bounded type: Canonical factorization,” IEEE Trans. Circuits Syst., vol. CAS-33, pp. 581-589, June 1986. 161 P. L. Dtiren, Theory of HP Space. New York: Academic Press, 1970. High-Speed Delayed Multipath Two-Dimensional Digital Filtering Architecture HON KEUNG KWAN, KOTARO HIRANO, SENIOR SENIOR MEMBER, MEMBER, IEEE, AND IEEE ON CIRCUITS AND SYSTEMS, NO. 2, FEBRUARY 1985 I. IHTR~DUCTION High-speed digital filtering is important in many practical signal-processing applications. Generally speaking, high-speed filtering can be achieved by using high-speed digital componenti and/or by making use of concurrency in arithmetic computation. The latter can be achieved by utilizing the pipeline processing technique and/or parallel-processing technique. Recently, a general decomposition theorem has been proposed [l] for the expansion of a general multidimensional rational function in terms of functions of one-dimensional (1-D) only. Consequently, multidimensional digital filters can be implemented with great modularity and parallelism. Another method to the realization of two-dimensional (2-D) finite-impulse response (FIR) and infinite-impulse response (IIR) digital filter: can be devised [2] using “lower-upper (LU) triangular decomposition” of the matrix coefficients of their two-dimensional polynomials. The method enjoys a number of attributes for VLSI implementation including high parallelism, modularity, and regularity. Moreover, parallel and high throughput structures can also be obtained [3] for the realization of 2-D digital filters UT;AL, well-known transforms such as the discrete Fourier and Walsh-Hadamard. Alternatively, instead of transforming the transfer function of a digital filter into another form with different coefficient value: which facilitates high-speed realization as adopted in [l]-[3], the original transfer function can be used directly with the same coefficient values for realization. In fact, this is the approach characterized by the delayed N-path structure advanced recently in [4] and [5] for the realization of 1-D FIR. and IIR digital filters. The resultant structure possesseshigh regularity, modularity, and parallelism. Moreover, the resultant throughput is N2 times that of the conventional direct-form’ realization. In this contribution, the concept of the delayed N-path 1-D structure is formulated into a delayed multipath structure for 2-D FIR and IIR digital filters. This results in a significant improvement in the throughput rate of 2-D digital filters [7]. These are presented in Sections II and III. In Section IV, a comparison of the throughput and hardware requirements of the conventional direct-form realizations with those of the delayed multipath direct-form realizations of both FIR and IIR digital filters is given. Illustrative examples are also given in Section V. II. DELAYED MULTIPATH FIR DIGITAL FILTER Consider the transfer function of a 2-D FIR digital filter H(z,‘,z;‘) = c M2 c u(m,n)z;mz;n. m=O n=O In general, (1) can be decomposed as Nl-1 N2-1 H(Z;‘,z;‘) Manuscript received January 21, 1986; revised July 8, 1986. H. K. Kwan is with the Denartment of Electrical and Electronic Enaineering, University of Hong Kong, Pokfulam Road, Hong Kong. K. Hirano is with the Department of Electronic Engineering, Kobe University, Rokkodai Nada, Kobe 651, Japan. \ IEEE Log Number 8611463. CAS-34, Each of these transfer function polynomials can be realized efficiently ii terms of a number of processors. Consequently, high-speed computation can be obtained which can be applied to various digital-filtering applications. For a two-dimensional finite-impulse response digital filter of order. Ml and M2, the maximum throughput can be (M2+ l)[(Ml + 1)/2]’ times that of the conventional direct-form realization using one processor. Ml Absrrucr -In this paper, a delayed multipath method for the realization of two-dimensional nonrecursive and recursive digital filters is presented. In this method, a two-dimensional transfer function polynomial is decomposed into a number of shorter transfer function polynomials in parallel. VOL. = c j - 0 Z;jL2 c Z;‘Aij(Z;“‘,Z;‘) (2) i=O ‘In this paper, the conventional direct-form reahzation refers to the direct form realization in the form of a tapped delayed line (i.e., [2, figs. 1.12 and 1.151 using one processor. 0098-4094/87/02OO-0190$01.0001987 IEEE IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, VOL. CAS-34, NO. 2, FEBRUARY 191 1987 INPUT INf ow Fig. 2. An Nl-path structure for A,,(z;~‘, z;l) of Fig. 1. Assuming that a 2-D input signal is sampled from the upper left-hand corner and is proceeded from left to right, top to bottom according to a normal raster scanning manner. As the 2-D transfer function is decomposed into N2Nl parallel transfer functions, Aii(zcN1, z;‘)(i = 0, 1,2;. ., Nl - 1; j = 0,1,2;. .) N2 - l), and each of these N2Nl transfer functions involves LlL2 multiplications and additions (i.e., LlL2 coefficients) instead of (Ml + l)( M2 + 1) multiplications and additions (i.e., (Ml + l)( M2 + 1) coefficients) for the original 2-D transfer function, the throughput improvement is thus N2 Nl times. With Fig. 1. A delayed direct-form 2-D FIR digital-filter structure suitable for multipath realization. where u-1 A,(z;~‘,z;~) = 1 k=O L2-1 1 a(kNl+i,Z+ jL2)zckN’z;‘. (3) I=0 In (2) and (3), N2 represents the number of z;JLz (j = 0,1,2;. . , N2 - 1) branches from the input, L2 represents the incremental power of the z;jL2 branches, Nl represents the number of z;‘(i = 0,1,2;. . , Nl - 1) branches connected to the output of each zs-jL2 branch, and Ll represents the number of in Aij(z;N’,~;l). MoreZl -kN1 terms (k=0,1,2,.+.,Ll-1) over, we have for i =1,2 Mi+l=NiXLi l<N2<M2+1 (4 (5) and tical parallel Aij(zcN1, z;‘) sections as shown in Fig. 2, the overall throughput is thus increased to N2N12 times as compared to that of the conventional direct-form structure using one processor. The corresponding number of processorsrequired for such a delayed multipath structure is N2Nl’. Assuming Sl X S2 is the size of the input data to be processed, the memory requirements of each processor for storing coefficients and data (i.e., present and past input data) are, respectively, LlL2 and [(( L2 - l)Sl+ (Ll- 1) Nl + l)/Nl], (this is because the whole set of input data (see(3)) which have just been used in the present iteration shall be used again for the future iterations. For [Xl,, see Table I). Besides, the shared memory requirement for the delayed path is (N2- 1) L2Sl+ Nl. In each processor for an Nl-path structure, the past input data to be stored (but not the coefficients) have to be updated at intervals of NlT, seconds by storing the new incoming input data and decarding the last unused input data. III. IIR DIGITALFILTER DELAYEDMULTIPATH Consider the transfer function of a 2-D IIR digital filter 1~ Nl; 1~ Ll. (6) Ml As seen from (2) and (3), the transfer function of a 2-D FIR digital filter is decomposedinto N2 Nl parallel transfer functions with each transfer function represented by a polynomial Aij(ZCN’, z;‘) in zi-N1 and z~;’ together with a multiplication factor of zLiz;jL2. Fig. 1 gives a representation of (2). In practice, each of the N2Nl transfer functions Alj(zcN1, z;‘) can be realized in terms of Nl identical parallel sections as shown in Fig. 2. In Fig. 2, the sampled input signal is connected sequentially by the input switch to the input of each of the Nl identical parallel sections in a round robin fashion at intervals of TI (where z;’ = e-j”‘q) seconds. The output of each section is collected by the output switch which is in synchronization with the input switch. By incorporating Fig. 2 into Fig. 1, at any discrete time instant, the overall structure will give us a true realization of H( z; ‘, z; ‘) as given in (1). E, H(z;‘,z;l)= 1+ M2 “~04w;“z;” M1 M2 c . (7) c b(m,n)Z;mZ;n m=O n=O m=n#O In general, (7) can be decomposedas H( z;‘, z;‘) = i+ N2-1 Nl-1 &“, i=O C j=O z;jL2 K-1 c i=O (8) Z;iBii(z;N’,z;l) _ ~ 192 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS,VOL. CAS-34, NO. 2, FEBRUARY 1987 Fig. 3. A delayed direct-form 2-D IIR digital-filter structure suitable for multipath realization. TABLE I THROUGHO~ANDHARDWAREREQUIREMEN-ISOFTHECONVENTIONALDIRECT-FORMAND THEDELA.AYEDMUL~PATHDIRECT-FORM~-DFIRDIGITAL-FILTERSTRUCTURES structure Throughput Improvement Conventional Direct-Form Delayed Multipath Direct-Form No. of PlWXSSOt3 Required 1 N212 1 Memory Requirement of Each Processor Coefficient Data storage storuge (Ml+l)(M2+1) N2N12 LlL2 m2Sl+Ml+l [((L2-1)Sl +(Ll-1)NI + %‘Nll, [Xl, = X if X is an integer; otherwise, [Xl, = integer part of X+ 1. and where Aii(z;““,z;l) = i?,,(z;N’,z;l) Ll-1 L2-1 c c k=O I-0 Ll-1 E-1 = kxo ,Fo l<N1; a(kNl+i,I+jL2)~;~~~z;’ (9) b(kNl+i,I+jL2)z;kNlz;’ i=j=k=[+O (10) Mi+l=NiXLi - Mi+l=xxz for i =1,2 (11) for i =1,2 l<N2<M2+1 (13) l<N2<M2+1 l<Nl; l<Ll (14) (15) l<E. (16) A 2-D IIR digital filter represented by (8) can be realized in a delayed direct-form structure shown in Fig. 3. In a manner similar to the FIR case,-each of the transfer functions Aij(zcN’, z;‘) and Bi,(z;N’,l) of Fig. 3 can be realized, respectively, using Nl and Nl identical parallel sections as shown in Figs. 2 and 4. Consequently, the overall throughput rate is N2N12 or --2 N2Nl (whichever is smaller) times faster than the conventional direct-form II realization (using one processor). The number of processors required for such a delayed multipath structure is N2N12 •k--2 N2Nl . Assuming Sl X S2 is the size of the input data to be processed,the memory requirements of each processor for storing coefficients and data (present and past input data) are, respectively, LlL2 and [((--L2- 1)Sl + (Ll1) Nl + l)/Nl]l_for the- nonrecursive path or Ll L2 and [((n 1)Sl + (n - 1)Nl + l)/Nl], for the recursive path (seeTable II). IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, VOL. CAS-34, NO. 2, FEBRUARY 193 1587 OUTPUT INPUT Fig. 4. A x-path structure for B,j(r-z, 2;‘) of Fig. 3 TABLE II THROUGHPUT AND HARDWARE THE DELAYED MULTIPATH structure REQUIREMENTS DIRECT-FORM Throughput Impr0vement Conventional Direct-Form II 1 No. of Processors Required 1 OF THE CONVENTIONAL DIRECT-FORM II AND 2-D IIR DIGITAL FILTER STRUCTURES Coefficient storage (Ml+l)(M2+1)+ (Ml +l)(M2 Delayed Multipath Direct-Form N2N12 --2 0* N2 Nl whichever is smaller N2N12 -- + 2 N2 Nl Memory Requirement of Each Processor Data storage M2Sl+Ml+l fl)-1 LlL2 0* OX- M2Sl+ Ml fl whichever is larger [((L2-1)Sl +(Ll-1)Nl Ll L2 + l)/Nll, [((EO! 1)Sl +(Ll -1)Nl +l)/Nl II [Xl, = X if X is an integer; otherwise, [Xl, = integer part of X + 1. Besides, the shared memory for the delayed path is - requirement (N2 - 1) L2Sl+ Nl or (N2 - l)L2Sl+ Nl (whichever is larger). In each processor, the input data to be stored has to be updated (in a manner similar to the FIR case)- at intervals of NW, seconds for the nonrecursive path and NlT, seconds for the recursive path. IV. COMPARISON OF THROUGHPUT AND sets of values for Nl and Ll; they are: (a) Nl= 3, Ll= 5 and (b) Nl = 5, Ll = 3. Altogether, there are eight possible combinations of N2, L2, Nl, and Ll; hence, there are eight possible realizations. Table III gives a summary of the throughput and hardware requirements of these eight realizations. For illustration, the delayed multipath structure for N2 = 3, L2 = 5 and Nl = 3, L2 = 5 is shown in Fig. 5. HARDWARE REQUIREMENTS Tables I and II summarize the throughput and hardware requirements of the conventional direct-form structures and the delayed multipath direct-form structures of 2-D FIR and IIR digital filters. V. REALIZATION EXAMPLES In this section, we shall illustrate the delayed multipath realization procedures of one 2-D FIR and one 2-D IIR digital filter examples. In general, the procedures apply to all other cases. A. 2-D FIR DigitaI Filter A 14 X 14th-order 2-D FIR digital filter is chosen for illustration. From (l), we have II(z;l,z;‘) = fJ 5 t2(m,n)z;mz;n m-o n-o whereM1+1=15andM2+1=15.From(4)and(5),thereexist four possible sets of values for N2 and L2; they are: (a) N2 =l, L2 =15; (b) N2 = 3, L2 = 5; (c) N2 = 5, L2 = 3; and (d) N2 =15, L2 =l. From (4) and (6), there exist two possible B. 2-D IIR Digital Filter A 14 x 14th-order 2-D IIR digital filter is chosen for illustration. From (7), we have f, ff(z;‘,z;‘) = n~04-Y 14 ~)Z7%” 14 1+ c c b(m,n)z;mz;” m=On=O m-n20 where M1+1=15, M2+1=15, M1+1=15, and M2+1=15. From (ll), (13), and (15), there exist eight possible sets of values for N2, L2, Nl, and Ll; they are: (a) N2 =l, L2 =15, Nl = 3, and Ll = 5; (b) N2 =l, L2 =15, Nl = 5, and Ll = 3; (c) N2 = 15, L2 =l, Nl= 3, and Ll=5; (d) N2=15, L2=1, Nl=5, and Ll= 3; (e) N2 = 3, L2 = 5, Nl= 3, and Ll= 5; (f) N2 = 3, L2=5, Nl=5, and Ll=3; (g) N2=5, L2=3, Nl=3, and Ll = 5; and (h) N2 = 5, L2 = 3, Nl= 5, and Ll= 3. Similarly, from (12), (14), and (16), there exist eight* such identical sets of ‘Under the conditions that Mi =z for i =1,2, if optimal throughput (see Table II) is desirable, Ni and Li should be, respectively, equal to Ni and z for i=1,2. 194 IEEE TRANSACTIONS ON CIRCUITS SYSTEMS, VOL. CAS-34, NO. 2, FEBRUARY 1981 J+ I Azzki’, AND ZZ’ I %G”T Fig. 5. The delayed multipath direct-from structure of a 14x 14th-order 2-D FIR digital filter (N2 = Nl = 3, L2 = Ll = 5). TABLE III THROUGHPUT AND HARDWARE REQUIREMENTS OF THE CONVENTIONAL DIRECT-FORM AND THE DELAYED MULTIPATH DIRECT-FORM OF A 14 x ~~TH-ORDER 2-D FIR DIGITAL-FILTER STRUClVRE FOR PROCESSING INPUT DATA OF 256 X 256 structure Throughput Improvement Conventional No. of Processors Required Memory Requirement of Each Processor Coefficient Data storage storage 1 1 225 3599 9 9 15 1199 25 25 45 719 21 21 25 346 75 75 15 207 Direct-Form Delayed Multipath DirectForm N2=1 N1=3 N2=1 N1=5 N2=3 N1=3 N2=3 Nl=5 N2=5 N1=3 N2=5 N1=5 N2=15 N1=3 N2=15 N1=5 L2=15 L1=5 L2=15 L1=3 L2=5 L1=5 L2=5 L1=3 L2=3 L1=5 45 45 15 175 L2=3 L1=3 L2=1 125 125 9 105 L1=5 135 135 5 5 L2=1 L1=3 375 315 3 3 --VI. CONCLIJDI&G REMARKS values for N2, L2, Nl, and a. The throughput and hardware requirements of these eight realizations are summarized in Table In this paper, a delayed multipath method for the realization of IV.- For illustration, the delayed multipath structure for N2 2-D FIR and IIR digital filters has been presented. The method ’ =N2=3, L2=n=5, Nl=N1=3, and Ll=L1=5 is shown is flexible in the sensethat the rate of throughput improvement in Fig. 6. and the hardware complexity depend on the choices of values for IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, VOL. CAS-34, NO. 2, FEBRUARY 195 1987 OUTPUT Fig. 6. The delayed multipath direct-form structure of a 14 X 14th-order 2-D II&digitalfilter(N2=~=Nl=~=l,L2=L2= Ll=Ll=5). TABLE Iv THROUGHPUT AND HARDWARE REQ~HWMENTS OF THE CONVENTIONAL DIRECT-FORM II AND THE DELAYED MULTIPATH DIRECT-FORM OF A 14 X 14111-0~~~~ 2-D IIR DIGITAL-FILTER STRUCTURE FOR PROCESSING INPUT DATA OF 256 x 256 structure Throughput Improvement No. of PRXt?SSWS Required Conventional Direct-Form II NZ-z-1 Nl=N1=3 N2=N2=1 Nl=x=5 N2-x=3 Nl=N1=3 Delayed Multipath DirectForm .N2=E=3 L2===15 Ll=L1=5 LZ=‘i;l=15 Ll=E=3 LZ=E=5 Ll= L1=5 L2===5 Memory Requirement of Each Processor Coefficient Data storage StoraRe 1 1 449 3599 9 18 75 1199 25 50 45 719 27 54 25 346 Nl=N1=5 Ll=L1=3 75 150 15 207 N2=N2=5 L2=L2=3 Ll= L1=5 L2= L2=3 45 90 15 175 125 250 9 105 135 270 5 5 375 750 3 3 Nl=N1=3 N2===5 Nl-N1-5 N2=??i=15 Nl=‘iJr=3 N2=%?=15 Nl=x=5 Ll--=3 L2=L2=1 Ll=L1=5 L2= L2 =l Ll=L1=3 196 IEEE TRANSACTlONS N2, L2, Nl, _--- Ll (and N2, L2, Nl, Ll). One can always choose such parameters according to the throughput improvement that is required and the cost of the hardware that one can afford (see Tables I and II). As seen from (4)-(6) and (ll)-(16), there are --restrictions on the values of N2, L2, Nl, Ll, N2, L2, Nl, and z to be chosen. In practice, these restrictions can easily be avoided, if necessary,by assuming that one or more of Ml, M2, Ml, and M2 are raised by the addition of some zero coefficients such that restrictions fixed by (4)-(6) and (ll)-(16) are observed. In this paper, we have considered only the direct-form transfer functions as given in (1) and (7). In fact, if a 2-D FIR or IIR transfer function is given in terms of parallel or cascade sections, the method presented can also -- be applied to individual section provided its Ml, M2 (and Ml, M2) are large enough such that (4)-(6) or (ll)-(16) are observed. Further work on 2-D and 3-D delayed multipath realization methods can be found in [8] and [9]. The finite word-length roundoff error analysis of the 2-D delayed multipath structure and its comparisons with other implementation structures are topics that are currently under investigation. REFERENCES 111 A. N. Venetsanopoulos and B. G. Mertzios, “Decomposition of multidi- mensional filters,” IEEE Tram. Circuits Syst., vol. CAS-30, pp. 915-917, Dec. 1983. C. L. Nikias. A. P. Chrvsafis. and A. N. Venetsanoooulos. “The LU PI decomposition theorem and its implications to the r&lization of twodimensional digital filters,” IEEE Trans. Acourt., Speech, Signal Process., vol. ASSP-33, pp. 694-711, June 1985. [31 J. K. Pitas and A. N. Venetsanopoulos, “Two-dimensional realization of digital filters by transform decomposition,” IEEE Trans. Circuits Syst., vol. CAS-32, pp. 1029-1040, Oct. 1985. [41 K. K. Dhar and K. Hirano, “A digital filter design algorithm suitable for multi-DSP implementation,” in Workshop Dig. of IEEE Int. Workshop on Digital Signal Process., 1985, pp. 2g-l-2g-7. [51 K. Hayashi, K. K. Dhar, K. Sugahara, and K. Hirano, “Design of high-speed digital filters suitable for multi-DSP implementation,” IEEE Tram. Circuits Sysf., vol. CAS-33, pp. 202-217, Feb. 1986. 161 V. Cappelhni, A. G. Constantinides, and P. Emiliani, Digital Filters and their Applications. London, New York, San Francisco: Academic Press, 1978, ch. 1, pp. 49-50. [71 H. K. Kwan and K. Hirano, “High speed delayed multipath 2-D digital filter structures,” in Proc. IEEE Int. Conf. on Acourt., Speech, Signal Process., vol. 2, Apr. 1986, pp. 1029-1032. 181 H. K. Kwan arid K. Hirano, “High speed 2-D FIR digital filtering using similarity transformation,” in Proc. IEEE Int. Symp. on Circuits Syst., May 1986, pp. 523-526. [91 H. K. Kwan and K. Hirano, “Hiah speed delayed multipath 3-D FIR digital filter structures,” in Proc. IEEE Int. Conf. on Circkts Syst., May 1986, pp. 26-27. ON CIRCUITS AND SYSTEMS, VOL. CAS-34, NO. 2, FEBRUARY 1987 by an optimization procedure reported earlier. The number of multiplications per output sample required to implement these filters is shown to be small. I. INTRODUCTION Elliptically symmetric two-dimensional (2-D) filters are useful in many situations. For example, there may be compelling reasons to use different sampling rates in the two spatial directions. In such cases, the design of filters with a circularly symmetric response reduces to the design of filters with elliptic symmetry. One of the most powerful techniques for designing 2-D FIR filters is the transformation of a one-dimensional (1-D) FIR filter using the McClellan transformation [l]. Various techniques [l]-[6] have been proposed to determine the coefficients of the McClellan transformation to approximate a given passband boundary of a 2-D filter with piecewise-constant frequency response. Recently, a simple analytic technique to choose the coefficients of the first-order McClellan transformation so as to map the cutoff frequency of the 1-D filter onto a circular contour in a 2-D frequency plane with a high degreeof accuracy was proposed [7]. Here, we extend this technique to 2-D filters with elliptic symmetry and obtain some interesting results. From the computations of several examples, it is found, for a first-order transformation and for a specific error criterion, that the results obtained by the analytic technique are nearly identical to those obtained by using the optimization procedure of [2]. The number of multiplications required to implement these filters is shown to be quite small. II. THE TECHNIQUE The passband boundary of a low-pass elliptically symmetric filter is described by bI/d+(~2/~2J2 =l (1) where wi and wz are the frequency variables of the 2-D filters. The variables tilr and a2r are the passband edge frequencies on the or-axis and the ~,-a&, respectively. (We shall assume ozc ’ q,; the case w2c< wlc is exactly analogous.)The first-order McClellan transformation is given by c0sw~F’(o,,w,) = t& + tie cos q + $1 cos 02 + q1 cos cd1cos cd*. (2) When expressed in sine functions, (2) reduces to sin2 ( o/2) P F( w1, t.d2)= too+ t,, sir? ( w1/2) + t,, sin2( w2/2) + t,, sin2( @i/2) sin2( oz /2) Design of Elliptically Symmetric Two-Dimensional FIR Filters Using the McClellan Transformation M. SUDHAKARA SATYA i\r. Hz&%& REDDY SENIOR AND MEMBER, IEEE Abstract-An analytic technique for choosing the coefficients of the first-order McClellan transformation for the design of elliptically symmetric two-dimensional FIR filters is described. It is found that the results obtained by this analytic technique are nearly identical to those obtained (3) where w is the frequency variable of the 1-D filters, in rad/s. We choose the coefficients fP4 using the following considerations. The point o = 0 maps onto (O,O),and the point w,, the cutoff frequency of the 1-D protot e filter, maps onto the points (wIc,O), (0, wzc), and (olc/ F2,w,,./fi) in the (w,,w,)-plane. This gives &=O, tia=a/b,, fci=a/b,, and t,,=a[b,(b,/h)c,c21/b2cIc2,where a P sin’ ( 0,/2) bi P sin2(oJ2), (44 i=1,2 (4b) and cjPsin2(wi,/2fi), Manuscript received February 25, 1986; revised June 19, 1986. The authors are with the Department of Electrical Engineering, Indian Institute of Technology, New Delhi 110016 India. IEEE Log Number 8611464. i=1,2. (44 Finally, we choose a, i.e., wc, such that 009%4094/87/0200-0196$01.00 01987 IEEE O<F(w,,w,) <1 (5)
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