FPGA LVDS Output:
Termination resistor 100 Ohm is mounted and Signal probed using single ended and differential
probe.
Fixed data pattern Data Rate is 500Mbps and Frequency is 250 MHz, output across R511
Fixed data pattern: Data Rate is 1Gbps and Frequency is 500 MHz, output across R511
PRBS data pattern: Data Rate is 1Gbps and Frequency is 500 MHz, output across R511
Here R511 is mounted, R446, R417, R419 are mounted, THS4302 is powered.
Fixed data pattern: Data Rate is 500Mbps and Frequency is 250 MHz, output across R511
Comments: When we apply power to the THS4302, there are more ringing due to impedance
mismatching to the LVDS signal. Also if we keep the R511, we are not getting output at THS.
THS OUTPUT when we have R511 and all other series resistors(used for gaining purpose)