US 20050066330A1 (19) United States (12) Patent Application Publication (10) Pub. No.: US 2005/0066330 A1 (43) Pub. Date: Kanai et al. (54) METHOD AND SYSTEM FOR PERFORMING Mar. 24, 2005 Publication Classi?cation REAL-TIME OPERATION (76) Inventors: Tatsunori Kanai, Yokohama-shi (JP); (51) Int. Cl? ..................................................... .. G06F 9/46 (52) Us. 01. ............................................................ ..718/102 Seiji Maeda, KaWasaki-shi (JP); Hirokuni Yano, Tokyo (JP); Kenichiro (57) Yoshii, Tokyo (JP) An information processing system performs a real-time ABSTRACT operation periodically at speci?c time intervals. The system Correspondence Address: OBLON, SPIVAK, MCCLELLAND, MAIER & NEUSTADT, RC. includes a unit for performing a scheduling operation of assigning the real-time operation to a processor to perform the real-time operation periodically at the speci?c time 1940 DUKE STREET intervals by the processor, a unit for computing a ratio of an ALEXANDRIA, VA 22314 (US) execution time of the real-time operation to be performed by the processor at a ?rst operating speed, based on the speci?c (21) Appl, No,: 10/902,938 (22) Aug. 2, 2004 Filed: (30) Foreign Application Priority Data Aug. 14, 2003 (JP) .................................... .. 2003-207572 '4 Penod 1 time intervals and cost information concerning a time required to perform the real-time operation by the processor at the ?rst operating speed, and a unit for performing an operating speed control operation to operate the processor at a second operating speed that is loWer than the ?rst operating speed, the second operating speed being determined based on the computed ratio. > :4 Perlod 2 >: : I " l I l W A1 B1 (100/0) C1 ’/////////A2 // B2 O I ' l I ' T1 C2 W % l l l I 'l : : : . I I : T] | Patent Application Publication Mar. 24, 2005 Sheet 1 0f 35 i Power saving l2 » ll U l ~> 3 l2 v S VPU VPU VPU l l I l 13 Mam memory ~14 ‘ l/o ’ 181 l/O ~16 lg? VPU VPU Processing Processing 31"” unit Processing - unit 3i"v unit j ' Local I 32 Memory I A ‘' storage A management “' 33 ~unit 32 I v Local “’ storage A Memory 33 T v controller 3 | l M . l/O am memory controller 3 14 S FIG-2 Memory controller Connecting device (bus or crossbar switch) 13 15 ‘ l 182 MPU N controller 16*» V0 22 VPll l l A H l _ l—____> 21"“ 12 v S Connecting device (bus or crossbar switch) 8 17 l2 v S v MP Controller US 2005/0066330 A1 l5 Patent Application Publication Mar. 24, 2005 Sheet 2 0f 35 4 US 2005/0066330 A1 64 bit Segment number ‘ Page number Page offset 50 36 bit 8 . Segment , / 16b": / table 52 bit / V V 60 68 bit 8 Page table 52bit / v - tr i 64 bit Real address F|G.3 . blt Patent Application Publication Mar. 24, 2005 Sheet 3 0f 35 US 2005/0066330 A1 F Address N Control registers of l/Ol Control registers of l/OO Main memory Real address space (RA) Local storage of VPUl Control registers of WW Local storage of VPUO Control registers of VPUO Control registers of MPU \ Address 0 Patent Application Publication Mar. 24, 2005 Sheet 4 0f 35 US 2005/0066330 A1 Segment Page table table 60 I I I Progam l I l l I I I l I I I I l I l I I EA VA (Effective address space) F|G 5 (Virtual address space) - ‘ RA [Real address] space N102 A-DEC _>Output of 10] circuit 3 gegjilved g audio signal N103 ‘N105 N106 DEMUX g V-DEC ‘ PROG g BLEND _>Output of circuit ’ ’ ' circuit circuit circuit video signal N104 TEXT FIG 6 circuit Program module DEMUX program I'd/ill 100“ i ' A-DEC program I-VHZ l F I | V—DEC program TEXT program PROG program BLEND program $1113 iMlM |'\/il5 1,116 F|G 7 I | Structural description 1TH? Patent Application Publication Mar. 24, 2005 Sheet 5 0f 35 US 2005/0066330 A1 Structural description 117 Number Program Input Output (1) DEMUX Received (2) signal Cost 100KB (3) 5 (4) _ Buffer MB 10KBv (2) A DEC (1) Output Audio 10 __ (3) V-DEC (1) (5) 50 MB ' (4) TEXT (1) (6) 5 10KB (5) PROG (3) (6) 20 MB (6) BLEND (4) 10 — Video output (5) Thread parameters ( -Tight|y coupled thread group: ' Loosely coupled thread group: _ Others FIG. 8 1 Patent Application Publication Mar. 24, 2005 Sheet 6 0f 35 32> 58 _ 52 5:5 0 % 82:80 80632A!CS3280 _m2QME|> 58:E2530 96_CAB 65:58° 1 25 6:5 xs ma 8: 80 82 m 7T8% M22 3:5 US 2005/0066330 A1 Patent Application Publication Mar. 24, 2005 Sheet 7 0f 35 K VPUO 01 US 2005/0066330 A1 1/30 second . 1/30 second Period 1 i ‘ Period 2 v1 P181 / 02 VPUi /A1T17 v2 I 'i P2 B2 / %;%A2T2 Di : DEMUX operation Ai:A—DEC operation Vi:V—DEC operation Pi : PROG operation Bi : BLEND operation Ti:TEXT operation F | G. 10 1/60 second g! Period 1 VP U0 D] VPUi A0_T0 V] ti 1/60 second ‘:4 Period 2 D2 P0 80 A] T1 V2 1/60 second ‘I '5 Period 3 D3 P] B1 A2 T2 V3 P2 B2 i Patent Application Publication Mar. 24, 2005 Sheet 8 0f 35 ,4 Period 1 A1 B1 C1 // VPUO (100%) : nj ,1 VPUO (50%) A] 54 ‘,4 : Period 1 U4 B1 T1 Period 2 A2 B2 : C1 US 2005/0066330 A1 C2 %% n A2 ‘I = i Period 2 - B2 ( Scheduling‘54 operation ) ‘I C2 T1 r Determine execution timing of real-time N5] operation in each period v Compute term T from start of period to completion of real-time operation N32 v Compute ratio of term T to period ~83 v Determine operating speed of’ processor \JS4 based on computed ratio v Decrease operating speed of processor F | G. i 4 ~85 Patent Application Publication Mar. 24, 2005 Sheet 9 0f 35 VPUO (33%) A1 VPU1 f Period 1 Period 2 Period 1 Period 2 B1 US 2005/0066330 A1 Patent Application Publication Mar. 24, 2005 Sheet 10 0f 35 US 2005/0066330 A1 ( Scheduling operation ) Divide tasks into thread groups wSll l Determine processor that executes each thread group and execution timing of each thread group‘ “[812 i Compute term T from start of period to completion N813 of reai-time operation for each thread group i Select thread group whose term T is longest l F1814 Compute ratio of term T corresponding to lrys15 selected thread group to period l Determine operating speed of processors that N816 executes thread groups based on computed ratio l Decrease operating speed of each processor '\/Sl7 Patent Application Publication Mar. 24, 2005 Sheet 11 0f 35 1 US 2005/0066330 A1 2 O8 @201 V0 MPU VPU VPU Memory controller ll l2 l2 l4 15 Real resources F l G. l8 Application Application 1-] 1-2 _ . . . Application Application 2-1 2-2 - 302 303 N N O81 082 Virtual machine 08 ~30] . l/O MPU VPU VPU Memory Controller 11 l2 l2 l4 l5 FlG.l9 Real resources Patent Application Publication Mar. 24, 2005 Sheet 12 0f 35 f 5%58%595% 5m w w 582 % f f f f _ s 5 2 : a s 2 55N8 US 2005/0066330 A1 am ?gs55%%2.5% ON .0 “_ _ m f w 5053 $0582 $3: wmuhso L s 2 : a Patent Application Publication Mar. 24, 2005 Sheet 13 0f 35 O51 O82 MPU: // US 2005/0066330 A1 O81 \\\\\///////%/A // /A\\ // / W/ \\\V//// %/ vPu2: 7// // VPUS: // // / \ —> Time F|G.21 0S1 ; 4 MPUI 7/// WW: ’ W1 x % / W // [W 7// / / Exclusively for 081 082 OS] /////%//4 \/ W/ //// / \\\\ /////// / ///// Patent Application Publication Mar. 24, 2005 Sheet 14 of 35 US 2005/0066330 A1 08 401 [\J VPU runtime environment <--Power Schedulersaving routine) “201 F|G.23 302 303 N [\j O81 082 Virtual machine 08 N301 401 VPU runtime environment (- Scheduler ) ' Power saving routine F|G.24 304 N 302 N . I 303 - N N401 VPU runtime environment (- Scheduler) ' Power saving routine O51 ' O32 301 N FIG.25 Virtual machine OS Patent Application Publication Mar. 24, 2005 Sheet 15 0f 35 302 US 2005/0066330 A1 303 N N 1 OS @401 082 @1402 VPU runtime VPU runtime environment environment - Scheduler ' Scheduler - Power - Povver savmg _ ' _ . _ ‘ saving routine routine Virtual machine 08 302 303 F O81 M30] P1 O82 N401 VPU runtime environment . . . . . . -Schedu|er ' Power saving routine Virtual machine 08 "V301 Patent Application Publication Mar. 24, 2005 Sheet 16 0f 35 US 2005/0066330 A1 36§m2e1E.rSg0>%e,€S wNdI Patent Application Publication Mar. 24, 2005 Sheet 17 0f 35 US 2005/0066330 A1 r/Sl Oi Receive service call Can service be processed YES in VPU-side VPU runtime environment ’? program on VPU side registered ? /Sl06 Request MPU-side service broker to execute service i K5105 Call service program on VPU program "/8103 Execute service 4 Return service result to calling part FI l/Sl l 1 Receive service call 8112 Can service be processed YES in MPU-side VPU runtime environment ? ls service program on MPU side YES registered ? /Sll7 v /Sll6 “48113 Return result to calling Call service program Execute part as error on MPU service ‘ _‘_—P_—| FI i, /Sll4 Return service result to calling part Patent Application Publication Mar. 24, 2005 Sheet 18 of 35 G - I’ ' rI ‘ US 2005/0066330 A1 :>\ lnteractlons k | . . / Thre%d‘B% E I > Time Tightly coupled thread group I 182 léZ VPUO 31 “v VPUl Processing unit 31 "v I Processing unit I A 32 I Local ‘’ A storage A 33 A“ 32 Local ‘’ I storage M Memory controller Address 33 A“ “* -/33l Memory controller Address ‘ translation unit \ | translation unit ' / Connecting device (bus or crossbar switch) 5% Main memory F|G.32 ’\/33i Patent Application Publication Mar. 24, 2005 Sheet 19 0f 35 Thread A EA US 2005/0066330 A1 RA ‘2% VPUO \ / 32”» L80 - 12 Y Thread B . L3] h 32”» rso VPU1 ' \ / 4 L81 -. F | G. 33 VPUO VPU1 /Thread C ”\ \>/ Thread D > Time Loosely coupled thread group F|G.34
© Copyright 2026 Paperzz