9/26/2016 L07 – Architectural Components ARCHITECTURAL COMPONENTS Reading: Chapter 4 (sections 4.1 – 4.7) ISE218 – Fundamentals of Information Technology © Robert F. Kelly, 2012-2016 2 Objectives • Learn the common computer components • Understand how each component contributes to program execution 1 9/26/2016 L07 – Architectural Components © Robert F. Kelly, 2012-2016 3 CPU • Programs and data are both stored in memory • The computer’s Central Processing Unit (CPU) fetches, decodes, and executes program instructions • The principal parts of most CPUs are • Arithmetic logic unit (ALU) • Registers • Control unit • Internal bus © Robert F. Kelly, 2012-2016 4 ALU • Performs operations • Addition • Multiplication • Comparison • The control unit tells the ALU which operations to perform • Operations synchronized by the clock 2 9/26/2016 L07 – Architectural Components © Robert F. Kelly, 2012-2016 5 Registers • Very fast memory • Located very close to the ALU • Processors vary in • Number of registers • Type of registers (e.g., address, integer, floating point, general purpose) • Bits in each register • Example – register used to hold an instruction loaded from memory © Robert F. Kelly, 2012-2016 6 Control Unit • The control unit • Monitors the execution of instructions • Coordinates traffic to and from the CPU • Decodes instructions • Controls the ALU • Includes a program counter 3 9/26/2016 L07 – Architectural Components © Robert F. Kelly, 2012-2016 7 Internal Computer Bus • Allows CPU components to communicate © Robert F. Kelly, 2012-2016 8 CPU Basics • Registers hold data that can be readily accessed by the CPU • The arithmetic-logic unit (ALU) carries out logical and arithmetic operations as directed by the control unit • The control unit determines which actions to carry out according to the values in a program counter register and a status register e.g., ALU does 2’s complement addition 4 9/26/2016 L07 – Architectural Components © Robert F. Kelly, 2012-2016 9 Printed Circuit Board (PCB) • Keeps computer system components in place • electrically connects electronic components • Contains conductive tracks • More reliable than wiring components © Robert F. Kelly, 2012-2016 10 Motherboard • The central printed circuit board (PCB) in many modern computers • Holds many of the crucial components of the system • provides connectors for other peripherals. • Alternatively known as the mainboard, system board, or, on Apple computers, the logic board 5 9/26/2016 L07 – Architectural Components © Robert F. Kelly, 2012-2016 11 Motherboard Components* • Sockets (or slots) in which one or Relates mainly to desktops and servers more microprocessors may be installed • Slots into which the system's main memory is installed • A chipset - forms an interface between the CPU's front-side bus, main memory, and peripheral buses • Non-volatile memory chips (firmware or BIOS) • Clock generator • Slots for expansion cards (these interface to the system via the buses supported by the chipset) Recent motherboards include • Power connectors * From Wikipedia integrated controllers (e.g., sound, graphics, network) © Robert F. Kelly, 2012-2016 12 CPU Socket • Allows the CPU to be replaced without soldering • Functions: • a physical structure to support the CPU • support for a heat sink • forms an electrical interface both with the CPU and the PCB Also referred to as a slot 6 9/26/2016 L07 – Architectural Components © Robert F. Kelly, 2012-2016 13 © Robert F. Kelly, 2012-2016 14 Connectors • Transmit information from one part of a computer to another The Bus The bus connecting the CPU and memory is called the system bus • The system shares data with other system components by way of a data bus PCI bus slots provide attachment for expansion cards Increasingly integrated into motherboards or by USB devices 7 9/26/2016 L07 – Architectural Components © Robert F. Kelly, 2012-2016 15 Bus Details • A set of connections that connect multiple subsystems within a computer • Usually connects multiple components • Connections for addresses, data, and control • Uses a bus protocol Bus protocol is the set of rules for moving data between devices In a computer with 2n memory addresses, how wide is the address bus? © Robert F. Kelly, 2012-2016 16 Clocks • Every computer contains at least one clock that synchronizes the activities of its components • A fixed number of clock cycles are required to carry out each data movement or computational operation • The clock frequency, measured in megahertz or gigahertz, determines the speed with which operations are carried out • Clock cycle time is the reciprocal of clock frequency • An 800 MHz clock has a cycle time of 1.25 ns 8 9/26/2016 L07 – Architectural Components © Robert F. Kelly, 2012-2016 17 Clocks • Clock speed is related to CPU performance – but not an exact relationship • Improve CPU performance throughput by reducing • the number of instructions in a program, • the number of cycles per instruction, or • the number of nanoseconds per clock cycle Other “superscalar” approaches are possible © Robert F. Kelly, 2012-2016 18 Are We on Track? • What is the approximate instruction rate of the Apple iPhone 6 processor (Apple A9) in GHz? And how many processors? 2 processors, 1.85 GHz • What is the approximate instruction rate of the Samsung Galaxy S5? And how many processors? 4 processors at 2.1 GHz and 4 processors at 1.5 Ghz Most people refer to the processor rate on a multi-core processor as the per-processor rate 9 9/26/2016 L07 – Architectural Components 19 © Robert F. Kelly, 2012-2016 Are We on Track? • Is a 1GHz dual core processor as powerful as a 2GHz single core processor? 20 © Robert F. Kelly, 2012-2016 Memory Notation • L x W (length x width) Each byte is addressable • Example – 4K x 8 • Memory has 4K (212) addressable locations • Each addressable location is 8 bits wide (byte addressable) Address Data 0000 0000 0000 0 1 1 0 0 1 1 0 0000 0000 0001 0 0 0 0 0 0 0 0 0000 0000 0010 0 0 0 0 0 0 0 0 0000 0000 0011 1 1 1 0 0 0 0 0 1 1 0 0 0 0 0 0 … 1111 1111 1111 10 9/26/2016 L07 – Architectural Components © Robert F. Kelly, 2012-2016 21 Memory Organization • Computer memory consists of a linear array of addressable storage cells • Memory can be byte-addressable, or wordaddressable, where a word typically consists of two or more bytes • If the memory word size of the machine is 16 bits, then a 4M × 16 RAM chip gives us 4M of 16-bit memory locations © Robert F. Kelly, 2012-2016 22 Addressing Memory • 4M can be expressed as 212 (4,096) × 210 (1,024) = 222 addressable words • The memory locations for this memory are numbered 0 through 222 -1 • Thus, the memory bus of this system requires at least 22 address lines • The address lines “count” from 0 to 222 - 1 in binary • Each line is either “on” or “off” (1 or 0), indicating the address of the desired memory element 11 9/26/2016 L07 – Architectural Components © Robert F. Kelly, 2012-2016 23 Address Lines • Addresses and data are usually transmitted in parallel © Robert F. Kelly, 2012-2016 24 Memory Addressing Example • If memory contains: Memory Size Memory Addresses Address Size 2 bytes 0 and 1 1 bit 4 bytes 00, 01, 10, 11 2 bits 8 bytes 000, 001, 010, 011, 100, 101, 110, 111 3 bits 2n 00000, 00001, … n bits e.g., n=5 12 9/26/2016 L07 – Architectural Components 25 © Robert F. Kelly, 2012-2016 Memory Organization • Physical memory usually consists of more than one RAM chip • Access is more efficient when memory is organized into banks of chips with the addresses interleaved across the chips • Low-order interleaving - low order bits of the address specify which memory bank contains the address of interest • High-order interleaving - high order address bits specify the memory bank 1 0 1 1 0 1 0 1 1 © Robert F. Kelly, 2012-2016 1 26 Are We On Track? • How many bits are required to address an 8G x 16 main memory if • Main memory is byte-addressable? • Main memory is word-addressable? 13 9/26/2016 L07 – Architectural Components © Robert F. Kelly, 2012-2016 27 Were We on Track? • How many bits are required to address an 8G x 16 main memory if • Main memory is byte-addressable? • Main memory is word-addressable? • Memory contains 16GB • If each byte is addressable, there are 16G addresses or 24 * 230 = 234 addresses, which requires 34 bits • If each word is addressable, we only need 33 bits for the address © Robert F. Kelly, 2012-2016 28 Interrupts • The normal execution of a program is altered when an event of higher-priority occurs • CPU is alerted to an event through an interrupt • Interrupts can be triggered by I/O requests, arithmetic errors (such as division by zero), or when an invalid instruction is encountered • Each interrupt is associated with a procedure that directs the actions of the CPU when an interrupt occurs • Non-maskable interrupts are high-priority interrupts that cannot be ignored. 14 9/26/2016 L07 – Architectural Components © Robert F. Kelly, 2012-2016 29 The Input/Output Subsystem • A computer communicates with the outside world through its input/output (I/O) subsystem • I/O devices connect to the CPU through various interfaces • I/O can be memory-mapped-- where the I/O device behaves like main memory from the CPU’s point of view • Or I/O can be instruction-based, where the CPU has a specialized I/O instruction set © Robert F. Kelly, 2012-2016 30 Did You Satisfy the Objectives? • Learn the common computer components • Understand how each component contributes to program execution 15
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