International Journal of Electronics Communication and Computer Technology (IJECCT) Volume 3 Issue 3 (May 2013) Implementation of Electronic Voting Machine with Multiple Preferences and Priority Ramya G. P., S. S. Manvi Department of Electronics and Communication Engineering, Reva Institute of Technology and Management, Bangalore, India Abstract— Traditional paper based voting procedure was very long and time-consuming process and very much prone to errors. Polling by Electronic Voting Machine (EVM) is a simple, safe and secure method that takes minimum of time. Current Electronic Voting Machine (EVMs) used in LOK SABHA and ASSEMBLY elections accepts only one vote from each voter. But in elections such as GRAMA PANCHAYATH and COOPERATIVE SOCIETIES, where each voter casts their votes to more than one candidate, available voting machines will not work. The paper presents a PROGRAMMABLE ELECTRONIC VOTING MACHINE that accepts one or more votes depending on requirement. Mode control is included in EVM, through which it is possible to set the EVM to accept more than one vote from each voter depending on the type of elections. The main advantage of this type of EVM is to avoid the invalid votes especially in co-operative society elections where each voter has to cast vote for nine candidates. Keywords- Election; Polling; EVMs; Ballot Uni;, Control Unit . I. INTRODUCTION Elections in India are conducted almost exclusively by using electronic voting machines developed over the past two decades by a pair of government-owned companies. These devices, known in India as EVMs, have been praised for their simple design, ease of use, and reliability. The Electronic Voting Machine (EVM) consists of two interconnected units, the Ballot Unit where the voter casts his vote by pressing a button alongside the name of the candidate and symbol of the party for whom the person chooses to vote for and the Control Unit by which the polling official enables the Ballot Unit for the voter to cast his vote and where all related data like number of votes polled for each candidate, total number of votes cast etc. resides. EVMs reduce the time in both casting a vote and declaring the results compared to the old ballot paper system. The control unit can store the result in its memory for more than 10 years. Invalid votes can be greatly reduced by use of EVMs. Blank votes can be counted. Despite many advantages of EVMs, there are certain issues in terms of software and hardware. There must be at least two official technical evaluations of EVM security performed by the Election Commission. First one deals with source code of EVMs and second one with hardware parts of EVMs. Hackers can break ISSN:2249-7838 the security algorithm and can change the actual results. Hence there is a need of strong and fast algorithms like DES (Data Encryption Standard) or AES (Advanced Encryption Standard) [10]. There may be a chance of replacing the entire system with a fake one, and inserting a device between the ballot unit cable and the control unit. The EVM firmware is stored in masked read-only memory inside the microcontroller chips, and there is no provision for extracting it or verifying its integrity. This means that if the software was modified before it was built into the CPUs, the changes would be very difficult to detect. The risks would appear to be greater when electronic voting involves the transfer of data by means of network to a server centralizing the result. Varying climate has great extremes of temperature, as well as other environmental hazards such as dust and pollution. EVMs must be operated under these adverse conditions and must be stored for long periods in facilities that lack climate control. EVMs must be protected from dangers “attack by vermin, rats, fungus or due to mechanical danger, [that might cause] malfunction”[1]. It is very necessary to perform security analysis of real time EVMs. In spite of the machines’ simplicity and minimal software trusted computing base, they are vulnerable to serious attacks that can alter election results and violate the secrecy of the ballot. Two attacks are identified and solved by implementing custom hardware, which could be carried out by dishonest election insiders or other criminals with only brief physical access to the machines. Those attacks are replacing the entire system with a fake one, and inserting a device between the ballot unit cable and the control unit. Both attacks, the report states, can be defeated by inspection of the machine [5]. In 1992, 40 out of 758 machines used in Franklin country had problems that require service. Seven memory cartridges couldn’t be read and were entered in hand. Finally, there were problems combining DRE results with hand-entered lever machine results. In 1998, Ohio (in Franklin) votes for congressional candidates incorrectly tabulated in 95 of the country 735 voting precincts because memory cartridges didn’t match ballot faces for 371 voting machines. In 2000, Tennessee (in Fayette), problems included double countering of same ballots were resolved after barrowing a tabulation machine from a neighboring country.[2] In the existing voting machines, number of candidates supported is limited to around 20 only, if number of candidates exceeds 20 we are supposed to use 2 voting machines. At present, EVMs are used only in LOK SABHA and IJECCT | www.ijecct.org 412 International Journal of Electronics Communication and Computer Technology (IJECCT) Volume 3 Issue 3 (May 2013) ASSEMBLY elections (it accepts only 1 vote from each voter), but in elections such as GRAMA PANCHAYATH and COOPERATIVE SOCIETIES where each voter cast their votes to more than one candidate; available voting machines can not be used. This paper presents a PROGRAMMABLE ELECTRONIC VOTING MACHINE that accepts one or more votes depending on our requirement. Here, we have included the mode control, through this we can set the EVM to accept more than one vote from each voter (it can accept 1 or 2 or 3 …. or n votes) depending on the type of elections [3]. Our Contributions are mainly in designing priority and multiple weighted based voting, where a vote for multiple persons for a positions. Weights of preferences will be used to get final vote counting. The voting sequence using the EVM has been kept as close to the traditional voting process as possible. The process of voting is as follows. Once the validity of the voter has been ensured, the polling official enables the ballot unit and the voter is asked to go to the area where the ballot unit is placed. Then, the voter scrutinizes the names of the candidates or parties displayed on the ballot unit and cast his vote by pressing the blue button beside the chosen candidate’s name or symbol. The corresponding LED is lit and an audible beep is heard confirming the registration of vote in the system. This process is repeated for the next voter. At the end of polling, the process is completed by the official by pressing the “Close” button on the control unit. On operation of the “Result”button of the Control Unit, the display indicates the results of the poll including total number of votes cast and the number of votes polled for each candidate. The paper is organized as follows. First, working of present EVM is discussed, with its limitations in present Voting system Second, proposed work to overcome present EVM is discussed along with block diagram (modules) and working(in terms of state diagram.). Finally, simulation results, conclusion, and future work are presented. II. PROPOSED EVM EVM consists of mainly two interconnected units, ballot (implemented with FPGA/CPLD) and control unit (implemented with FPGA), and display module (LEDs) as given in figure 1. In the ballot unit, voter casts his/her vote by pressing a button alongside the name of the candidate and symbol of the party for whom the person chooses to vote. Control unit is given to the polling official, who enables the ballot unit for the voter to cast his vote, and all related data, like number of votes polled for each candidate, total number of votes cast, etc., resides in it. The controls such as ballot, close, result, clear, total, Nvotes, ready, and cd are used to control operations of control unit. Display module is used to display alphanumeric characters. MSB 2 digits are used to display candidate serial number and rest 4 digits are used to display the total number of votes casted for corresponding candidate. Figure 2. Circuit diagram of Ballot unit The figure 2 shows the internal block diagram of the ballot unit of the programmable EVM. It consists of LEDs and push to on switches corresponding to the number of candidates on the ballot unit along with 220 ohms resistors in series used to drive the push to on switches, with the power supply of +5v . The operation is as follows when the voter presses the blue button (one of sw0 to sw19) to cast the vote for his chosen candidate, the corresponding push to on switch gets closed, and a high signal is sent to the control unit, if this signal is enabled, then the counter gets incremented indicating the registration of the vote and the confirmation is done when the red LED glows (corresponding to pressed switch) and a beep sound is heard. Control unit is as shown in figure 3. The inputs to the FPGA are Close, Clear, Total, Result, Nvotes, Ballot. The 'Nvotes' is set by the presiding officer, which indicates the number of votes to be accepted from individual voters. 'Ballot' is also under the control of presiding officer, which is set to accept votes from voter. 'Clear' is set in order to store the votes registered for individual candidate in to FPGA ROM. When 'Result' is set high, number of votes accepted for each candidate, which is stored in ROM is displayed on multiplexed seven segment LED display. Figure 1. Block Diagram of Programmable EVM ISSN:2249-7838 IJECCT | www.ijecct.org 413 International Journal of Electronics Communication and Computer Technology (IJECCT) Volume 3 Issue 3 (May 2013) Nvotes is the maximum number of votes that has to be accepted by each voter. for ex it is set to 9 for Co-operative election. Enc is enable counter signal which is set to enable counter for incrementing result after voting for individual candidate. Buz is buzzer signal which will set by hearing beep sound after voting is proceeded. Cd is the candidate number (or identity number) given for all candidates. Mode(N votes) is the maximum value of votes that need to be accepted by individual voter. Ready signal is set high to enable all counters. When in state 0, the decision box below it checks for Ballot input, if asserted by election officer then state changes to 1, else it remains in the same state. Figure 3. Block Diagram of Control Unit A 7-segment display shown in figure 4 consists of 7 LED’s arranged in a figure-eight pattern, and then by selectively powering-on various combinations of segments, alphanumeric characters may be displayed. The LED display can be driven by a common cathode or common anode. With a common cathode display, the common cathode must be connected to the 0V rail and the LEDs are turned on with a logic one. When in state 1, it checks whether close is high, if so then it remains in the same state, Else, Ready signal is set high, all the counters are enabled and state changes to 2. When in state 2, the decision box checks for the key pressed (i.e., Cd=1), if so then state changes to 3, else it remains in the same state until key pressed. When in state 3, key pressed is scanned and is as follows: If cd(0)=1( i.e., voter has cast vote for 1st candidate), then the decision box below the decision box for cd(0)=1 checks whether enc0=1, which indicates counter 1 is enabled. Then the counter corresponding to candidate 1 is incremented and is then disabled, the buz0 signal is asserted, general counter is incremented and state changes to 4. In case if enc0=0 indicating counter 1 is disabled, then the state changes directly to 4 without incrementing any counter and without asserting buz0 signal. If cd(0)=0 then the next button cd(1) for candidate 1 is scanned in similar way. When in state 4, all buzzers are disabled and the decision box in state 4 checks if general counter has reached the mode value (nvotes), if so then the ready signal is disabled and state changes to 0. Else the state changes to 2 in order to accept the remaining votes from that voter. Figure 4. Six digit multiplexed seven-segment display Fig.4 depicts the state diagram indicating working of software in EVM. Nomenclature used in diagram is as follows. The EVM can be used to allow a person to vote for multiple persons (may be upto 3), with priority (by having priority buttons). The candidate's vote values will be counted as follows. Vote_value = preference_1_votes * x + preference_2_votes * y + preference_3_votes * z. Where x, y and z are weights assigned to preferences and x>y>z. The signals (inputs) to FPGA(control unit) are Ballot unit is set to accept votes from voter. Clear is set in order to store the votes registered for individual candidate. Result is set high to display the number of votes counted for candidate. ISSN:2249-7838 IJECCT | www.ijecct.org 414 International Journal of Electronics Communication and Computer Technology (IJECCT) Volume 3 Issue 3 (May 2013) Xilinx offered two main FPGA families, High performance Virtex series and high volume Spartan series. Spartan series targets applications with a low power footprint, extreme cost sensitivity and high volume (eg: displays, set-top boxes etc). The Spartan-6 Family is built on a 45-nanometer ,9-metal layer, dual-oxide process technology. The board has 50MHz Oscillator; therefore clock signal is so fast that the human eye is unable to see the sequence of the flashing lights. So it is necessary to add an additional file called counter.vhd which will slowdown the incoming clock. S0 No Ballot Yes S1 Yes Close No For this article, biometric reader can be added to increase the security. These biometric readers read the finger print from the voter, check for valid voter. If valid voter then accepts the vote. Finger print based locking and open system can be added so that unauthorized persons cannot be possible to change data. Ready, Enc S2 No Cd Yes IV. SIMULATION RESULTS S3 No Preference_1 a>b No Preference_2 b>c Yes ...... No Yes Yes No Cd(0) Preference_19 y>z No ...... Cd(1) Cd(19) No Yes Yes Yes No ...... No Enc(0) Enc(1) Enc(19) No Yes Yes Yes Sc0=Sc0+1, Enc0=0, Buz0=1, Cont=Cont+1 Sc1=Sc1+1, Enc1=0, Buz1=1, Cont=Cont+1 Sc19=Sc19+1, Enc19=0, Buz19=1, Cont=Cont+1 S4/Buz=0 No Count==mode Yes Ready=0,Enc, Count=0 Figure 5. State diagram The main advantage of this article is to avoid the invalid votes especially in co-operative society elections where each voter has to cast vote for nine candidates. The cost of this project is very less and operation is simple. III. SOFTWARE DESIGN Xilinx Software is used to implement programmable voting machine on FPGA [4]. Testing of an EVM can be obtained through simulation results by using VHDL[7]. Figure 6. Nvotes is set to 3 Fig 6 shows the simulation result , when the ballot is set one, The ready signal is asserted indicating the voter can cast his votes now and all counters are enabled. Xilinx Co-Founders, Ross Freeman and Bernard Vonderschmitt, invented the first commercially viable field programmable gate array in 1985 – the XC2064. The XC2064 had programmable gates and programmable interconnects between gates, the beginnings of a new technology and market. The XC2064boasted a mere 64 configurable logic blocks (CLBs), with two 3-input lookup tables (LUTs). More than 20 years later, Freeman was entered into the National Inventor's Hall of Fame for his invention. ISSN:2249-7838 IJECCT | www.ijecct.org 415 International Journal of Electronics Communication and Computer Technology (IJECCT) Volume 3 Issue 3 (May 2013) Figure 9. Enables the ballot unit until accepting of 4 votes. Figure 7. Asserted ready signal Fig 7 shows, the ready signal is asserted and nvotes set to 3. Hence control unit is ready to accept 3 votes from each voter. Fig 9 shows, once the ballot is pushed, it outputs the ready signal high until nvotes are accepted. if the accepted votes reaches n then ready signal becomes low. Figure 10. Disabling counter after accepting the vote. Figure 8. Displays number of Votes accepted from voter st Fig 8 shows, When the voter cast vote for 1 candidate then 1 is displayed on the LED display (“0000110” is send to LED display) ISSN:2249-7838 Fig 10 shows when the voter cast vote for 1st candidate the corresponding counter gets incremented and is then disabled automatically, so that the same voter cannot cast any more votes to same candidate, but allowed to cast to other candidates. IJECCT | www.ijecct.org 416 International Journal of Electronics Communication and Computer Technology (IJECCT) Volume 3 Issue 3 (May 2013) V. CONCLUSIONS In earlier elections, we as a voter, casted vote to our favourite candidate by putting the stamp against his/her name and then folding the ballot paper as per a prescribed method before putting it in the Ballot box. This is a long, timeconsuming process and very much prone to errors. Polling by Electronic Voting Machine (EVM) is a simple, safe and secure method that takes minimum of time. In this article, Programmable EVM that accepts more than one vote from individual voter, depending on type of elections, is presented. This voting machine has an advantage that it can be used in all kinds of elections like gramapanchyat, Co-operative societies, assembly elections etc. It can also consider priority as weightage when voter has capability to provide multiple preferences. REFERENCES [1] [2] [3] [4] [5] Figure 11. When close is asserted to 1. [6] [7] Fig 11 shows when Close is set to 1,the counter values(Sc0.Sc1…Sc19) are stored in ROM Locations (ie..,output1(0),output1(1),….output1(19)). [8] [9] [10] [11] [12] [13] www.elections.tn.nic.in, accessed date-Mar 2 2012 www.eci.nic.in, accessed date-Mar 2 2012 http://IndiaEVM.org, accessed date-Feb 15 2012 www.xilinx.com/itp/xilinx9/help/iseguide/mergedProjects/coregen/html/ cgn_df_vhdl_flow.htm, accessed date- Mar 4 2013 http://www.sciencefriday.com/segment/11/02/2012/how-secure-areelectronic-voting-machines.html accessed date- Apr 19 2012 http://www.belIndia.com/BELWebsite/images/EVM_Features.pdf Institute of Electrical and Electronics Engineers, “1076-1993 IEEE Standard VHDL Language Reference Manual,” 1993. http://pib.nic.in/elections2009/volume1/chap-39 accessed date-Apr 13 2012 http://www.firstpost.com/fwire/new-evms-to-have-paper-trail-bel187950.html, accessed date-Mar 5 2013. http://www.rollingstone.com William Stallings, “Advanced Encryption Standard”, Taylor and Francis Journal of Cryptology, vol. 26, no. 3, 2002, pp. 165- 188 Voting: What Is; What Could Be, July 2001. http://www.vote.caltech.edu/ Reports/, accessed date-Feb 10 2012 http://www.ece.wpi.edu/spartan3_Tutorial.pdf , accessed date- Mar 5 2103. Figure 12. When result is asserted Fig 12 shows simulation results when the result is set high, the counter values (number of votes for each candidate) stored in ROM locations are displayed in counter one after the other for every rising edge of clock pulse. ISSN:2249-7838 IJECCT | www.ijecct.org 417
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