ST139N65M5D7 - STMicroelectronics

ST139N65M5D7
650 V N-channel, 0.014 Ω typ., MDmesh™ M5
Power MOSFET die in D7 packing
Datasheet - production data
Description
'
This device is an N-channel Power MOSFET
based on MDmesh™ M5 innovative vertical
process technology combined with the well known
PowerMESH™ horizontal layout. The resulting
product offers extremely low on-resistance,
making it particularly suitable for applications
requiring high power and superior efficiency.
*
6
$0Y
Features
• Extremely low RDS(on)
• Low gate charge and input capacitance
• Excellent switching performance
• 100% avalanche tested
Applications
•
Switching applications
Table 1. Device summary
Order code
VDS
RDS(on) max.
Die size
Package
ST139N65M5D7
650 V
0.017 Ω
12.78 x 9.63 mm2
D7
October 2015
This is information on a product in full production.
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Contents
ST139N65M5D7
Contents
1
Mechanical parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.2
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3
Die layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4
Additional information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5
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4.1
Additional testing and screening . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4.2
Shipping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4.3
Handling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4.4
Wafer/die storage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
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1
Mechanical parameters
Mechanical parameters
Table 2. Mechanical parameters
Parameter
Die size with scribe line
Wafer size
Die thickness
Maximum possible dice per wafer
Value
Unit
12.78 x 9.63
mm2
200
mm2
280±20
µm
209
Front side passivation
Silicon nitride
Source pad size
2.54 x 8.80
mm2
Gate pad size
0.33x0.46
mm2
composition
Ti/TiN
Front side metallization
thickness
composition
4.5
µm
Ti/Ni/Ag
Back side metallization
thickness
Die bond
0.52
µm
Electrically conductive glue or soft solder
Source
Recommended wire bonding
Gate
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Source ≥ 4x382 Al wires
µm
one (bonding both pads) or two
gate ≤ 125 Al wires
µm
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Electrical ratings
ST139N65M5D7
2
Electrical ratings
2.1
Absolute maximum ratings
Table 3. Absolute maximum ratings(TC = 25 °C unless otherwise specified)
Symbol
Value
Unit
VDS
Drain-source voltage
650
V
VGS
Gate-source voltage
±25
V
IAR
Avalanche current, repetitive or not-repetitive
17
A
EAS
Single pulse avalanche energy
(starting Tj = 25°C, ID = IAR, VDD = 50 V)
2400
mJ
- 55 to 150
°C
Tj
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Parameter
Operating junction temperature
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ST139N65M5D7
2.2
Electrical ratings
Electrical characteristics
Table 4. Static characteristics (tested on wafer unless otherwise specified)
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
Drain-source breakdown
voltage
VGS = 0 V, ID =1 mA
IDSS
Zero gate voltage
Drain current
VDS = 650 V, VGS = 0 V
10
µA
IGSS
Gate-source leakage
current
VGS = ± 25 V, VDS= 0 V
± 100
nA
VGS(th)
Gate threshold voltage
VDS = VGS, ID = 250 µA
4
5
V
RDS(on)(1)
Static drain-source onresistance
VGS = 10 V, ID = 65 A
0.014
0.017
Ω
VBR(DSS)
650
3
V
1. These values are referred to the characterization for the device STY139N65M5 with specific circuit test,
please refer to STY139N65M5 datasheet for more information
This product is 100% tested at the wafer level and is manufactured using established,
mature and well characterized processes. Due to restrictions in die level test processing, the
die may not be equivalent to standard package products and is therefore offered with a
conditional performance guarantee. Special testing can be carried out or the product can be
purchased as known good die. Please refer to the relevant note at the end of the datasheet.
For customers requiring specific die level testing please refer to the Section 4: Additional
information.
Table 5. Dynamic(1)
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
-
15600
-
pF
-
365
-
pF
-
9
-
pF
Ciss
Input capacitance
Coss
Output capacitance
Crss
Reverse transfer
capacitance
Co(tr)(2)
Equivalent
capacitance time
related
VGS = 0, VDS = 0 to 520 V
-
1559
-
pF
Co(er)(3)
Equivalent
capacitance energy
related
VGS = 0, VDS = 0 to 520 V
-
360
-
pF
RG
Intrinsic gate
resistance
f = 1 MHz open drain
-
1.2
-
Ω
Qg
Total gate charge
-
363
-
nC
-
88
-
nC
-
164
-
nC
Qgs
Gate-source charge
Qgd
Gate-drain charge
VDS = 100 V, f = 1 MHz,
VGS = 0
VDD = 520 V, ID = 65 A,
VGS = 10 V
1. These values are referred to the characterization for the device STY139N65M5 with specific circuit test,
please refer to STY139N65M5 datasheet for more information
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Electrical ratings
ST139N65M5D7
2. Co(tr) is a constant capacitance value that gives the same charging time as Coss while VDS is rising from 0
to 80% VDSS.
3. Co(er) is a constant capacitance value that gives the same stored energy as Coss while VDS is rising from 0
to 80% VDSS.
Table 6. Switching times(1)
Symbol
Parameter
td(v)
Voltage delay time
tr(v)
Voltage rise time
tf(i)
Current fall time
tc(off)
Test conditions
VDD = 400 V, ID = 80 A,
RG = 4.7 Ω, VGS = 10 V
Crossing time
Min.
Typ.
Max. Unit
-
295
-
ns
-
56
-
ns
-
37
-
ns
-
84
-
ns
1. These values are referred to the characterization for the device STY139N65M5 with specific circuit test,
please refer to STY139N65M5 datasheet for more information
Table 7. Source drain diode(1)
Symbol
Parameter
Test conditions
trr
Reverse recovery time
Qrr
Reverse recovery charge
IRRM
Reverse recovery current
trr
Reverse recovery time
Qrr
Reverse recovery charge
IRRM
Reverse recovery current
ISD = 130 A,
di/dt = 100 A/µs, Tj = 25 °C
VDD = 100 V
ISD = 130 A,
di/dt = 100 A/µs
VDD = 100 V, Tj = 150 °C
Min.
Typ.
Max. Unit
-
570
-
ns
-
15
-
µC
-
53
-
A
-
720
-
ns
-
24
-
µC
-
68
-
A
1. These values are referred to the characterization for the device STY139N65M5 with specific circuit test,
please refer to STY139N65M5 datasheet for more information
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3
Die layout
Die layout
Figure 1. Die drawing and dimensions(a)
0)1B1,
a. Dimensions are in µm.
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Die layout
ST139N65M5D7
Table 8. Die delivery
Package option
D7
Description
Details
Wafer (8 inches) tested, inked, cut on
sticky foil on 10.8" (276 mm)
plastic ring (see Figure 2)
Wafer (8 inches) is held by a plastic
ring protected by two carton shells,
inside a plastic envelope sealed under
vacuum. Maximum number of wafers
for each package is 5, weight is about
3.7 Kg.
Figure 2. D7 drawing and die orientation
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Additional information
4
Additional information
4.1
Additional testing and screening
For customers requiring products supplied as known good die (KGD) or requiring specific
die level testing, please contact the local ST sales office.
4.2
Shipping
Several shipping options could be offered, consult the local ST sales office for availability:
• D1 unsawn wafer-suffix D1 on sales type
• Die on film sticky foil - suffix on sales type D7
• Carrier tape - suffix on sales type D8+KGD
4.3
Handling
• Products must be handled only at ESD safe workstations. Standard ESD precautions and
safe work environments are as defined in MIL-HDBK-263.
• Products must be handled only in a class 10,000 or better-designated clean room
environment.
• Singular die are not to be handled with tweezers. A vacuum wand with a non-metallic ESD
protected tip should be used.
4.4
Wafer/die storage
Unsawn wafer in unopened packaging can be stored at 21 °C ± 3 °C for 1 year after
shipment. Once the packaging is opened, the wafer must be stored in a dry, inert
atmosphere, such as nitrogen.
For sawn wafer optimum temperature for storage is 18 °C ± 2 °C with as few variations as
possible to avoid parasitic polymerization of the adhesive. Sawn wafers must be processed
within 12 weeks after receipt by customer.
After the customer opens the package, the customer is responsible for the products.
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Revision history
5
ST139N65M5D7
Revision history
Table 9. Document revision history
10/11
Date
Revision
29-Oct-2015
1
Changes
Initial release.
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