ENIAC-GB-176-14
Communication to the Governing Board of the ENIAC Joint
Undertaking regarding the selection of project proposals and
the allocation of public funding following negotiations for Call
2013-2
Excerpt
ENIAC-GB-176-14
ANNEX 2
DEep SubMicron System-on-Chip (SoC) for Harsh
Environment applicaTions using EuRopean Technologies
Acronym
Duration of project
Date of end of negotiation
Project start date
DEMETER
42m
03/12/2013
15/09/2014
Project Summary
DEMETER aims at providing a pilot platform to produce and demonstrate Systems On chip which are
not available on the market today, e.g. FPGAs satisfying severe European requirements to be used in
harsh environment. The project will bring unique innovative solutions by integrating Dynamic Partial
Reconfiguration, protection through native code, directly on chip and in software and packaging
technology in a European pilot line platform delivering circuits free of export control in the whole
European Union. The DEMETER demonstrator is an FPGA device, but a clear objective is that all the
deployed development chain, design tools, libraries, IP blocks, dynamic (partial) configurability
management, cryptography, security, hardened 65nm 300mm wafers process, high-end packaging,
will also be used for Application Specific Standard Products (ASSP) and Application Specific
Integrated Circuits (ASIC) later on.
Potential impact
One of the emerging applications of FPGAs in Europe is in harsh environment markets, especially
with semiconductor process technology becoming more and more aggressive. If aerospace is a clear
driver for such platform, it is crucial to expand the scope to other harsh environment markets
including, but not limited to, avionics, automotive, transportation and energy. Hardened FPGA
allows the implementation of functions that are often only available in commercial temperature
grade, plastic packages and non-hardened technology. FPGA can also help answering the problem of
component obsolescence. European industry must have access to an independent source for harshenvironment FPGA, not only to suit the needs of European industry but also to position Europe in
this market segment.
DEMETER will offer the European community a development platform for new families of
reprogrammable Systems-on-Chip for harsh environments. This will (a) enhance the technical
capabilities and overall competiveness of Europe on the worldwide harsh environment market,
especially the satellite market, but also for automotive, avionic, transportation and energy
applications, (b) reduce the dependence on critical technologies and capabilities from outside
Europe for future space programs, (c) enable the European industry to get non-restricted access to
high performance technologies that will allow increasing its competitiveness and expertise in the
harsh environment domains, (d) improve the overall European space technology landscape and
complement the activities of European and national space programmes.
ENIAC-GB-176-14
Maximum eligible costs and public funding
The negotiation concluded with the following eligible costs (final). The national funding figures are
indicative until the establishment of the national grant agreements.
Beneficiary
ATMEL Nantes SAS
ASTRIUM SAS
ASTRI POLSKA SPOLKA Z
THALES ALENIA SPACE France
Thales Alenia Space Italy spa
Politecnico di Torino
E2V semiconductors SA
Intrinsic ID bv
Centre Naotional d'Etudes Spatiales
ISD SA
TECHNISCHE UNIVERSITEIT DELFT
European Space Agency
Atmel Munich GmbH
TOTAL
Country
FR
FR
PL
FR
IT
IT
FR
NL
FR
EL
NL
FR
DE
Eligible Cost
23.300.843,00 €
70.090,00 €
745.200,00 €
200.098,00 €
190.500,00 €
50.000,00 €
514.945,00 €
460.000,00 €
149.232,00 €
750.750,00 €
457.740,00 €
308.400,00 €
3.325.000,00 €
30.522.798,00 €
ENIAC JU funding
3.495.126,45 €
10.513,50 €
111.780,00 €
30.014,70 €
28.575,00 €
7.500,00 €
77.241,75 €
69.000,00 €
22.384,80 €
112.612,50 €
68.661,00 €
0,00 €
498.750,00 €
4.532.159,70 €
ENIAC-GB-176-14
European 450mm Lithography and Metrology Development
for Advanced Patterning
Acronym
Duration of project
Date of end of negotiation
Project start date
E450MLDAP
36m
03/12/2013
01/10/2014
Project Summary
The overall goal of the E450LMDAP project is to develop 450 mm lithography and metrology
modules and tools and to initiate distributed pilot line activities over the 450 mm lithography and
metrology tool platform eco system. These pilot line activities will complement the activities from
the already initiated ENIAC JU E450EDL project. In addition, also early 450 mm wafer 1x node
advanced patterning process development at the IMEC’s pilot line will be part of the project.
Lithography, metrology and deposition equipment performance suited for 450 mm will be
demonstrated in the IMEC pilot line, interconnected with holistic methodologies to the 450 mm pilot
line at IMEC which is equipped with European systems. The project will complement the
engagement of the European semiconductor equipment industry in the 450mm wafer size transition
that started with the ENIAC JU EEMI450 initiative and proceeded with subsequent projects funded
with public money, amongst others NGC450, SOI450, EEM450PR and E450EDL which will result into
first critical process module availability in the IMEC pilot line.
The consortium comprises 44 members from 7 different European countries with SMEs and research
institutes and also IDM as end users. The project is organized in three technical work packages and a
work package on management and coordination.
The main objective in the work package on lithography is to develop and to have prototyping
activities comprising amongst others wafer stage, wafer handler, optics, electronic as well as
preliminary tool system qualification.
In the dedicated work package on metrology 450mm metrology tool types will be developed for
wafer and mask platforms as well as a holistic metrology data hub for advance lithography data
management and fab.
Finally, in the work package on advanced patterning a selection of critical N10 layers, which are
currently under development at 300mm wafer sizes, will be transferred to an early 450mm
lithography platform.
ENIAC-GB-176-14
Maximum eligible costs and public funding
The negotiation concluded with the following eligible costs (final). The national funding figures are
indicative until the establishment of the national grant agreements.
Beneficiary
Country Eligible Cost
ENIAC JU funding
ASML Netherlands B.V.
NL
103.442.909,67 €
15.516.436,45 €
AAE B.V.
NL
503.227,87 €
75.484,18 €
adixen Vacuum Products
FR
2.513.656,47 €
377.048,47 €
Applied Materials Israel
IL
48.943.814,53 €
7.341.572,18 €
Advanced Mask Technologie Center GmbH & Co. KG
DE
3.242.562,67 €
486.384,40 €
ASM BELGIUM NV
BE
2.820.240,00 €
423.036,00 €
ASML Belgium BVBA
BE
2.415.046,00 €
362.256,90 €
ASYS GmbH & Co. KG
Berliner Glas KGaA, Herbert Kubatz GmbH & Co
DE
NL
DE
1.667.463,27 €
1.680.400,00 €
21.851.955,13 €
250.119,49 €
252.060,00 €
3.277.793,27 €
Robert BOSCH GMBH
DE
3.439.081,60 €
515.862,24 €
Bosch Rexroth B.V.
NL
781.000,00 €
117.150,00 €
CCM Centre for Concepts in Mechatronics B.V.
NL
1.981.117,00 €
297.167,55 €
CEA-LETI
FR
3.107.090,73 €
466.063,61 €
Coventor SARL
FR
1.149.271,80 €
172.390,77 €
Entegris Cleaning Process (ECP) SAS
FR
355.204,20 €
53.280,63 €
GLOBALFOUNDRIES
DE
0,00 €
0,00 €
Integrated Dynamics Engineering GmbH
DE
9.788.134,00 €
1.468.220,10 €
imec - Interuniversitair Micro-Electronica Centrum
vzw
BE
4.207.673,33 €
631.151,00 €
Ippon Innovation
FR
354.477,60 €
53.171,64 €
Irmato Industrial Solutions Eindhoven BV
NL
1.686.072,67 €
252.910,90 €
Jordan Valley Semiconductors, LTD.
IL
5.155.562,00 €
773.334,30 €
KLA-Tencor Corporation Israel
IL
15.252.650,40 €
2.287.897,56 €
KMWE Systems eindhoven B.V.
NL
3.233.800,93 €
485.070,14 €
LTM-CNRS
Neways Technologies B.V.
FR
IL
NL
394.489,93 €
2.706.341,07 €
1.683.310,53 €
59.173,49 €
405.951,16 €
252.496,58 €
Nova Measuring Instruments Ltd
IL
10.674.645,67 €
1.601.196,85 €
Oxford Instruments Nanotechnology Tools Ltd
UK
1.080.100,00 €
162.015,00 €
Prodrive B.V.
NL
1.906.340,00 €
285.951,00 €
RECIF Technologies S.A.S
FR
301.381,40 €
45.207,21 €
Reden B.V.
NL
389.088,20 €
58.363,23 €
SEGULA Technologies Nederland B.V.
NL
441.910,00 €
66.286,50 €
SemiLev GmbH
DE
436.272,07 €
65.440,81 €
STMICROELECTRONICS CROLLES 2 SAS
FR
4.110.539,93 €
616.580,99 €
TNO
NL
5.323.236,40 €
798.485,46 €
Toppan Photomasks Germany GmbH
DE
3.936.545,93 €
590.481,89 €
Delft University of Technology
NL
1.375.962,00 €
206.394,30 €
Benchmark Electronics B.V.
Nanomotion Ltd.
ENIAC-GB-176-14
VDL Enabling Technologies Group Eindhoven B.V.
NL
69.155.618,60 €
10.373.342,79 €
Carl Zeiss SMS Ltd.
IL
DE
DE
2.001.351,93 €
2.790.569,07 €
111.026.343,13 €
459.306.457,73 €
300.202,79 €
418.585,36 €
16.653.951,47 €
68.895.968,66 €
Carl Zeiss SMS GmbH
Carl Zeiss SMT GmbH
TOTAL
ENIAC-GB-176-14
Excellence in Speed and Reliability for More than Moore
Technologies
Acronym
Duration of project
Date of end of negotiation
Project start date
eRamp
36m
03/12/2013
01/04/2014
Project Summary
eRamp will strengthen Europe’s leadership in power semiconductors by addressing (a) methodology
research and (b) product development. Clear focus is put on fast and reliable product behavior by
learning in European pilot line environments to get fast feedback for the development process. In
addition, eRamp will enable the realization of innovative MtM devices by development of innovative
process and manufacturing chains. Research will focus on enhanced, next generation, MtM
semiconductor product ramp ups, dedicated to energy efficient power, MEMS and 3D based
applications. Power chip technologies based on 300mm wafer diameter will be enforced by
combining them with advanced assembly and interconnect technologies based on chip embedding.
eRamp are complementary pilot line activities tailoring special solutions for design and competitive
production of energy efficient MtM semiconductors. The expected solutions will be demonstrated
along the value chain, in manufacturing and in application, from design to product.






New methods to perform early and advanced learning’s from existing pilot lines to extract
device characterization data and enhance design base for first time right ramp up.
New approaches for fast learning in pilot lines, such as visualization and testing approaches
for failure detection and localization during production (chip, package and application) e.g.
Monte Carlo simulations.
Research on cloud based principles of circuit simulation methods capable to handle
complex circuits and large number of influencing parameters in significantly reduced
runtime.
New design and testing tools for forecast and efficient yield learning.
New efficient power management solutions in the selected application areas.
Advanced, competitive and sustainable technologies in Europe for heterogeneous packaging
solutions, proven on low volume pilot line production.
In the application domains at least three types of demonstrators will be addressed. One for energy
efficient motor drives, one in the healthcare domain and one in the LED lighting domain. In addition
the enabling WPs will demonstrate their effectiveness in pilot lines.
Potential impact
eRamp aims to set an innovative step forward to strengthen Europe’s leading position in MtM
semiconductor technologies and MtM manufacturing capabilities relating to energy efficient
electronic solutions. Fast time-to-market and further improved reliability of MtM semiconductor
products will significantly strengthen the position of European electronic industry in energy efficient
solutions for automotive and industrial applications.
ENIAC-GB-176-14
Maximum eligible costs and public funding
The negotiation concluded with the following eligible costs (final). The national funding figures are
indicative until the establishment of the national grant agreements.
Beneficiary
Infineon Technologies Dresden GmbH
HSEB Dresden GmbH
Infineon Technologies AG
Robert BOSCH GMBH
SGS Institut Fresenius GmbH
Siemens AG
SYSTEMA Systementwicklung Dipl.-Ing. Manfred Austen
GmbH
OSRAM GmbH
Technische Universität Dresden
Westsachsische Hochschule Zwickau
ams AG
CISC Semiconductor GmbH
Infineon Technologies Austria AG
Infineon Technologies IT-Services GmbH
Joanneum Research ForschungsgesellschaftmbH
Lantiq A GmbH
Material Center Leoben Forschung GmbH
NXP Semiconductors Austria GmbH
Polymer Competence Center Leoben GmbH
Technische Universität Wien
Universität Innsbruck
SPTS Technologies Ltd
NXP SEMICONDUCTORS NETHERLANDS BV
Stichting IMEC Nederland
Infineon Technologies Romania & Co.
Technical University of Bratislava
TOTAL
Country Eligible Cost
ENIAC JU
funding
DE
DE
DE
DE
DE
DE
9.024.000,00 €
800.000,00 €
15.112.998,00 €
3.695.590,00 €
465.920,00 €
518.215,00 €
1.353.600,00 €
120.000,00 €
2.266.949,70 €
554.338,50 €
69.888,00 €
77.732,25 €
DE
599.489,00 €
89.923,35 €
DE
DE
DE
AT
AT
AT
AT
AT
AT
AT
AT
AT
AT
AT
UK
NL
NL
RO
SK
535.000,00 €
733.008,00 €
350.200,00 €
2.897.125,00 €
740.886,00 €
4.752.992,00 €
482.674,67 €
484.412,92 €
1.121.503,00 €
543.197,59 €
1.372.006,00 €
323.000,00 €
407.150,00 €
419.350,00 €
828.680,00 €
3.906.000,00 €
3.887.950,00 €
880.500,00 €
350.000,00 €
55.231.847,18 €
80.250,00 €
109.951,20 €
52.530,00 €
434.568,75 €
111.132,90 €
712.948,80 €
72.401,20 €
72.661,94 €
168.225,45 €
81.479,64 €
205.800,90 €
48.450,00 €
61.072,50 €
62.902,50 €
124.302,00 €
585.900,00 €
583.192,50 €
132.075,00 €
52.500,00 €
8.284.777,08 €
ENIAC-GB-176-14
Micro-Optical MEMS, micro-mirrors
and pico-projectors
Acronym
Duration of project
Date of end of negotiation
Project start date
Lab4MEMSII
36m
03/12/2013
01/06/2014
Project Summary
Lab4MEMS II will feature the Pilot Line for innovative technologies on advanced Micro-Opto-ElectroMechanical Systems (MOEMS). MOEMS includes two major technologies: MEMS and Micro-optics.
Both these technologies involve batch processing capability, similar to integrated circuits, and
micromachining similar to fabrication of microsensors. As such, it inherently features device
miniaturization and wide applications in integrated platforms of sensors, actuators and data
processing and control. MEMS merged with Micro-optics, involves sensing or manipulating optical
signals on a very small size scale, using integrated mechanical, optical, and electrical systems.
MOEMS includes a variety of devices including optical switch, array of micro-mirrors, optical crossconnect, lasers and micro lens amongst others. These devices are usually fabricated using microoptics and standard micromachining technologies using materials like silicon, molybdenum (Mo),
silicon dioxide, silicon nitride (Si3N4), piezo coating, etc.
Potential impact
Merging all these multi technologies make MOEMS an ideal platform for many industrial
demonstrators and future commercial products, such as optical switches, digital micro-mirrors
devices and dynamic displays, bistable mirrors, laser micro-scanners, optical shutters, microspectrometers and micro lens.
Lab4MEMS II will be promoted as a specific add-on (yet with the resources given by the call) to the
current facility, aiming to implement and optimize the industrial processes and to validate the
demonstrators suitable to penetrate the market. Therefore, this Pilot Line will add on the larger
manufacturing facility already operating in ST Agrate Brianza for MEMS accelerometers, gyroscope
and other smart sensors. This strategy would allow increasing and maintaining the know-how on
those very strategic enabling technologies while combining scientific skills and the ability to design
and manufacture a wide range of smart micro-nano systems on silicon.
ENIAC-GB-176-14
Maximum eligible costs and public funding
The negotiation concluded with the following eligible costs (final). The national funding figures are
indicative until the establishment of the national grant agreements.
Beneficiary
STMICROELECTRONICS SRL
Politecnico di Torino
Politecnico di Milano
Consorzio Nazionale Interuniversitario per la
Nanoelettronica
CNR-IMM MDM
CEA
Arkema France SA
STMicroelectronics Ltd.
University of Malta
Okmetic OY
Murata Electronics Oy
VTT Memsfab Ltd.
Teknologian tutkimuskeskus VTT
Aalto University
KLA-Tencor ICOS
University POLITEHNICA of Bucharest - CSSNT
Instytut Technologii Elektronowej, Warsaw
Stiftelsen SINTEF
Polewall AS
Besi Austria GmbH
TOTAL
Country Eligible Cost
ENIAC JU
funding
IT
IT
IT
6.015.600,00 €
600.000,00 €
500.000,00 €
902.340,00 €
90.000,00 €
75.000,00 €
IT
500.000,00 €
75.000,00 €
450.000,00 €
465.511,00 €
930.087,00 €
4.800.000,00 €
376.470,00 €
1.100.000,00 €
500.000,00 €
280.000,00 €
800.000,00 €
336.000,00 €
2.515.175,00 €
529.411,73 €
322.575,00 €
819.048,00 €
403.806,00 €
1.500.283,00 €
23.743.966,73 €
67.500,00 €
69.826,65 €
139.513,05 €
720.000,00 €
56.470,50 €
165.000,00 €
75.000,00 €
42.000,00 €
120.000,00 €
50.400,00 €
377.276,25 €
79.411,76 €
48.386,25 €
122.857,20 €
60.570,90 €
225.042,45 €
3.561.595,01 €
IT
FR
FR
MT
MT
FI
FI
FI
FI
FI
BE
RO
PL
NO
NO
AT
ENIAC-GB-176-14
Pilot line for Advanced Nonvolatile memory technologies
for Automotive microControllers, High security applications
and general Electronics
Acronym
Duration of project
Date of end of negotiation
Project start date
Panache
48m
03/12/2013
02/01/2014
Project Summary
The PANACHE project objective is to set-up a pilot line for embedded Flash technology design and
manufacturing platform for the prototyping of innovative μ-controllers in Europe. The current 40nm
technology platform as well as the already defined 55nm technology platform will be developed and
consolidated in order to build a solid manufacturing platform on these technology nodes.
The project will also extend to build the basic blocks of the technology node after 40nm; with the
ambition to achieve a prototyping maturity for a new BEOL based non-volatile memory architecture
suitable with the 28 nm node. To achieve this goal of generating high value added semiconductor
circuits in Europe in a breakthrough leading edge technology the project will deploy all the necessary
activities to bring a new technology to an early industrial maturity stage. These activities encompass
such developments as: technology enhancements for various specific application requirements such
as wide temperature range and reliability, high security requests, high flexibility…, design
enablement allowing first time silicon success, prototyping demonstrator products in the different
application areas: Automotive, Consumer/Industrial and Secure, insuring reliability of technology
and designs.
Potential Impact
"Europe is currently losing technology and IP, product prototyping pilot lines and most importantly
manufacturing capability and capacity". This statement from the KET high level group's report
applies to Nano electronics. Nano electronics underpin a tremendous variety of developments in all
applications areas. It is therefore important for Europe to keep its leadership in the effective current
and future production of Nano electronic devices. This production is performed on 300 mm wafers
for the majority of current and upcoming silicon processes, some important processes using the 200
mm diameter, and niche processes and different materials using even smaller substrate diameters.
300 mm has become in 2010 the world-wide dominant production diameter and will represent more
than 50% of world-wide Nano electronics production for the next 12 to 15 years. It is therefore of
utmost importance for Europe to stay competitive in a large variety of 300 mm relevant processes
(system on chip, low power processes, embedded memories, RF, and power processes to name a
few). To achieve this objective, the establishment of pilot projects within 300 mm lines ("pilot lines")
is a very effective way.
ENIAC-GB-176-14
Maximum eligible costs and public funding
The negotiation concluded with the following eligible costs (final). The national funding figures are
indicative until the establishment of the national grant agreements.
Beneficiary
STMICROELECTRONICS CROLLES 2 SAS
Robert BOSCH GMBH
IHP GMBH/LEIBNIZ-INSTITUT
CEA
TECHNISCHE UNIVERSITAET DARMSTADT
ASM BELGIUM NV
ASM MICROCHEMISTRY OY
INSTITUT MIKROELEKTRONICKYCH APLIKACI S.R.O.
USTAV TEORIE INFORMACE A AUTOMATIZACE AV CR,
v.v.i.
TECHNISCHE UNIVERSITEIT DELFT
STMICROELECTRONICS GRENOBLE 2 SAS
GEMALTO SA
TURKIYE BILIMSEL VE TEKNOLOJIK ARASTIRMA KURUMU
LiveU Ltd.
THALES COMMUNICATIONS & SECURITY SAS
UNIVERSITAT AUTONOMA DE BARCELONA
ADIXEN VACUUM PRODUCTS
Sabanci University
Inovent Coop.
Centre National de la Recherche Scientifique
ST-Le Mans
ST Alpes (former ST Ericsson-Crolles)
TOTAL
Country Eligible Cost
ENIAC JU funding
FR
DE
DE
FR
DE
BE
FI
CZ
88.784.970,21 €
9.833.124,00 €
590.000,00 €
60.392.605,67 €
649.724,00 €
203.144,00 €
181.000,00 €
274.300,00 €
13.317.745,53 €
1.474.968,60 €
88.500,00 €
9.058.890,85 €
97.500,00 €
30.471,60 €
27.150,00 €
41.145,00 €
CZ
114.400,00 €
17.160,00 €
NL
FR
FR
TR
IL
FR
ES
FR
TR
TR
FR
FR
FR
0,00 €
13.298.569,71 €
961.744,04 €
1.321.600,00 €
8.200.000,00 €
1.264.770,00 €
357.114,56 €
3.096.375,33 €
736.000,00 €
256.000,00 €
3.450.506,24 €
10.963.603,45 €
19.802.072,50 €
224.731.623,71 €
0,00 €
1.994.785,46 €
144.261,61 €
198.240,00 €
1.230.000,00 €
189.715,50 €
53.567,18 €
464.456,30 €
110.400,00 €
38.400,00 €
517.575,94 €
1.644.540,52 €
2.970.310,88 €
33.709.784,97 €
ENIAC-GB-176-14
Pilot Line for Self Assembly Copolymers Delivery
Acronym
Duration of project
Date of end of negotiation
Project start date
PLACYD
36m
03/12/2013
01/01/2014
Project Summary
PLACYD aims at developing and industrializing a series of nano-structured materials, devoted to
sub-20nm lithography together with the required ecosystem (including metrology, design tools,
integration processes) that will secure its adoption into manufacturing. It is focused on developing a
program that links the production of the block polymer materials used for directed self-assembly
and lithographic pattern development with wafer level fabrication to originate a robust process that
can be used in commercial manufacturing.
PLACYD will define, assemble and optimise the first material pilot line to produce block copolymers
for DSA technology including both the random copolymers, which are used to form a (block) neutral
wetting layer on wafer surfaces and the block copolymers, which produce the patterned layer. It will
include a dedicated material synthesis and formulation pilot line that is sufficiently flexible to insure
material development for several nodes (i.e. compatible with both PS-b-PMMA based polymers and
high chi systems and fulfilling all semiconductor standards) as well as all the monitoring and
characterisation means. PLACYD will also define and qualify design tools that will support the
realization of the proper design rules for the guiding patterns. The project will deliver modelling
modules through the EDA partner for end user’s. Finally, PLACYD will define and qualify the
integration scheme for implementation in the 1X CMOS environments.
Maximum eligible costs and public funding
The negotiation concluded with the following eligible costs (final). The national funding figures are
indicative until the establishment of the national grant agreements.
Beneficiary
Arkema France SA
CEA
ST Microelectronics
Applied Materials Israel
ASML Netherlands B.V.
Mentor Graphics
Centro Nacional de Microelectronica
University College Cork
LCPO
LTM-CNRS
Intel (IPLS)
NN
TOTAL
Country
FR
FR
FR
IL
NL
FR
ES
IE
FR
FR
IE
NL
Eligible Cost
5.086.680,00 €
2.631.473,64 €
446.291,80 €
3.660.000,00 €
630.000,00 €
827.995,20 €
229.764,00 €
292.500,00 €
300.014,99 €
645.459,84 €
179.746,00 €
562.897,00 €
15.492.822,47 €
ENIAC JU funding
763.002,00 €
394.721,05 €
66.943,76 €
549.000,00 €
94.500,00 €
124.199,28 €
34.464,60 €
43.875,00 €
45.002,25 €
96.818,98 €
26.961,90 €
84.434,55 €
2.323.923,37 €
ENIAC-GB-176-14
Pilot Optical Line for Imaging and Sensing
Acronym
Duration of project
Date of end of negotiation
Project start date
POLIS
48m
03/12/2013
06/01/2014
Project Summary
Polis will implement at pilot line level specific technological modules to enable new products based
on innovative technologies such as back-side-illuminated sensors, single photon avalanche diodes,
silicon micro-bolometers, Time-of-Flight, OLED on silicon, through-silicon vias and 3D-stacking. It will
focus on the following core objectives:



To push back the frontiers of the existing Imaging Market by devising new products,
exploiting existing or new technologies, improving manufacturing and testing tools,
To explore new opportunities for sensors and systems development in a wider spectral
range (from X and gamma rays to Infrared), using innovative detection techniques (single
photon avalanche diodes), materials or technologies (OLED-on- Silicon),
To significantly improve the state-of-the-art and performance of existing technologies and
work on yield and production cost
The ST-Crolles 200mm and 300mm sites which host production and pilot lines, both capable of
handling medium volume production and developing and qualifying new technologies, in
conjunction with the close proximity of an optical packaging line and of the CEA-LETI facility,
provides the manufacturing robustness required by POLIS consortium.
Potential Impact
Today the imaging market is dominated by mobile applications (mobile smartphones, laptops and
tablets) and by digital still cameras. However, close scrutiny of market intelligence and of the
dynamics of emerging applications reveals enormous growth in new markets, exhibited both by
Imaging product penetration in existing domains, like automotive, medical and consumer products
(TV, gaming…) and also by the explosion of brand new applications. Innovation in photonic sensor
technologies, particularly those with on-board intelligence, has triggered an array of new products
for things like proximity sensing, optical navigation and various human-machine interfaces based on
optical systems.
In addition to the production & technology jobs and associated indirect employment, significant
business expansion of imaging and photonic products has already generated hundreds of new
positions in design, marketing and customer support activities in Europe. We fully expect that new
applications developed in Polis will allow all industrial partners to maintain or create jobs in their
organizations and along the value chain.
ENIAC-GB-176-14
Maximum eligible costs and public funding
The negotiation concluded with the following eligible costs (final). The national funding figures are
indicative until the establishment of the national grant agreements.
Beneficiary
STMICROELECTRONICS GRENOBLE 2 SAS
STMicrolectronics SA (Crolles1)
STMICROELECTRONICS CROLLES 2 SAS
CEA-LETI
MicroOled
ULIS
ENCAPSULIX
Fogale nanotech
Aldebaran Robotics
Umicore IR Glass
Umicore
STMicroelectronics (R&D) Ltd
University of Edinburgh
Polaris Vision Systems EU Ltd
Horiba Jobin Yvon IBH Ltd
Delft University of Technology
PHOT
EV Group
Materials Center Leoben
Mediso
AUDI
TOTAL
Country
FR
FR
FR
FR
FR
FR
FR
FR
FR
FR
BE
UK
UK
UK
UK
NL
NL
AT
AT
HU
DE
Eligible Cost
10.168.843,58 €
8.516.465,03 €
29.387.645,16 €
32.316.811,31 €
3.002.627,00 €
8.142.719,66 €
307.612,00 €
1.410.140,79 €
924.100,00 €
3.029.622,00 €
173.518,00 €
4.606.880,00 €
203.618,00 €
205.000,00 €
0,00 €
593.020,00 €
593.600,00 €
1.332.976,00 €
524.445,00 €
1.457.380,00 €
0,00 €
106.897.023,53 €
ENIAC JU funding
1.525.326,54 €
1.277.469,75 €
4.408.146,77 €
4.847.521,70 €
450.394,05 €
1.221.407,95 €
46.141,80 €
211.521,12 €
138.615,00 €
454.443,30 €
26.027,70 €
691.032,00 €
30.542,70 €
30.750,00 €
0,00 €
88.953,00 €
89.040,00 €
199.946,40 €
78.666,75 €
218.607,00 €
0,00 €
16.034.553,53 €
ENIAC-GB-176-14
THIN but Great Silicon 2 Design Objects
Acronym
Duration of project
Date of end of negotiation
Project start date
Things2DO
48m
03/12/2013
01/01/2014
Project Summary
The program THINGS2DO is focused on building the Design & Development Ecosystem for FD-SOItechnology. This technology is uniquely positioned to take advantage of some very distinct strengths
of the European Semiconductor Industry. The baseline 28nm FD-SOI-technology is available at an
inflection point in the semiconductor progression path and offers unique features at this particular
point in time. 14nm-FD-SOI will then take the technology’s integration potential to unprecedented
levels, utilizing the design/development ecosystem developed here.
In this context, the development groundwork needs to be created, in view to enable IC-products and
electronic systems to be migrated into the FD-SOI environment and to take advantage of the new
possibilities, which FD-SOI offers on the product- and systems-level. A new and game-changing
technology such as FD-SOI can only be successful with a rich mix of product- and service-offerings in
the development space.
The design/development ecosystem is based on 3 pillars:
– EDA - design automation is the basis to perform complex design creation and porting tasks.
The EDA industry in Europe is particularly powerful with implantations from the big USbased companies as well as a lively ecosystem of small and medium size European
companies active in this domain.
– IP - availability of pre-designed building blocks is an absolute must for any emerging
technology. The implementation environment is a vital part in conjunction with the IP
needed for every complex SOC-development.
– Services are a combination of IP and EDA-tooling. There is a rich mix of SMEs in Europe
focused on this topic, providing service offerings to bring the innovative potential of FD-SOItechnology into the leading systems and end-applications, of which Europe is so rich.
The work-packages of this project are focused on the creation and enhancement of the above 3
pillars with specific targets to European end-applications. The application domains identified for
THINGS2DO are: Biomedical, Aeronautics and spatial, Personal Portable Devices, among others. They
all need energy efficient systems to meet market needs.
The measurable results will show in the availability of a rich ecosystem of EDA-design flows, porting
tools and design centering systems, a rich IP-portfolio of design building blocks from a number of –
sometimes competing- Design houses. The embedment of the IPs into Design Platforms is also a
significant criterion to look for.
In addition this project will create results which are less measurable, but of equal or higher
importance: the interconnectedness of European companies or European foreign implants will
ENIAC-GB-176-14
increase dramatically through this project thus contributing to strengthen the European
Semiconductor Industry as a whole.
As this project will significantly impact the end applications, an area where Europe has particular
strength, the competiveness of Europe as an industrial region will profit all together.
Maximum eligible costs and public funding
The negotiation concluded with the following eligible costs (final). The national funding figures are
indicative until the establishment of the national grant agreements.
Beneficiary
STMICROELECTRONICS GRENOBLE 2 SAS
STMICROELECTRONICS SA
CEA-LETI
CEA-LIST
Design&Reuse
Mentor Graphics
Atrenta
Docea Power
Magillem
Asygn
Circuit Multi Projets
Cassidian
Dolphin Integration
Tiempo
TIMA
GLOBALFOUNDRIES
MunEDA
ZMDI
Ericsson
Tubitak
VTT
Politechnika Warszawska
ISD SA
Easii-IC
Institutul de Cercetare-Dezvoltare si Inovare POLITEHNICA
Institute of information theory and automation
IMEP-LAHC
Science and Technology Facilities Council
METAIO
DXO-LAB
DXO-SIG
Dream Chip Technologies GmbH
EADS DEUTSCHLAND GMBH
EADS France
IMA
Institut National de l'Information Géographique et
Forestière
Instituto de Telecomunicações
Country Eligible Cost
ENIAC JU
funding
FR
FR
FR
FR
FR
FR
FR
FR
FR
FR
FR
FR
FR
FR
FR
DE
DE
DE
TR
TR
FI
PL
EL
FR
RO
CZ
FR
UK
DE
FR
FR
DE
DE
FR
CZ
20.323.178,40 €
4.505.253,98 €
17.509.607,05 €
9.341.504,14 €
922.180,00 €
2.155.557,55 €
7.455.194,62 €
2.086.442,85 €
1.218.160,00 €
614.424,00 €
350.400,00 €
647.031,36 €
1.981.699,20 €
4.499.550,00 €
704.898,74 €
2.163.947,00 €
1.471.196,00 €
4.495.634,00 €
2.143.246,40 €
1.213.520,00 €
46.100,00 €
443.527,00 €
502.350,00 €
4.895.720,00 €
637.354,00 €
98.342,40 €
682.403,56 €
569.844,17 €
1.741.606,08 €
2.505.010,00 €
5.569.640,00 €
2.431.194,73 €
1.222.151,56 €
546.757,96 €
98.278,38 €
3.048.476,76 €
675.788,10 €
2.626.441,06 €
1.401.225,62 €
138.327,00 €
323.333,63 €
1.118.279,19 €
312.966,43 €
182.724,00 €
92.163,60 €
52.560,00 €
97.054,70 €
297.254,88 €
674.932,50 €
105.734,81 €
324.592,12 €
220.679,40 €
674.345,10 €
321.486,96 €
182.028,00 €
6.915,00 €
66.529,05 €
75.352,50 €
734.358,00 €
95.603,10 €
14.751,36 €
102.360,53 €
85.476,63 €
261.240,91 €
375.751,50 €
835.446,00 €
364.679,21 €
183.322,73 €
82.013,69 €
14.741,76 €
FR
1.178.600,00 €
176.790,00 €
PT
347.212,50 €
52.081,88 €
ENIAC-GB-176-14
Fraunhofer IIS/EAS
Fraunhofer EMFT
Eberhard Karls Universität Tübingen
CADENCE
Sorin CRM
M3 System
NXP Semiconductors Belgium NV
IMS bordeaux
TOTAL
DE
DE
DE
DE
FR
FR
BE
FR
1.895.886,63 €
1.753.748,18 €
938.255,84 €
264.956,57 €
5.084.111,00 €
924.277,19 €
305.752,87 €
300.078,00 €
120.785.783,91 €
284.382,99 €
263.062,23 €
140.738,38 €
39.743,49 €
762.616,65 €
138.641,58 €
45.862,93 €
45.011,70 €
18.117.867,66 €
ENIAC-GB-176-14
VCSEL Pilot Line for IR Illumination, Datacom and Power
Applications
Acronym
Duration of project
Date of end of negotiation
Project start date
VIDaP
36m
03/12/2013
01/04/2014
Project Summary
Vertical Cavity Surface Emitting Lasers (“VCSEL”) are key components that drive and enable a
number of fast growing markets, such as data transmission, camera surveillance, optical sensors and
industrial production processes. They are III-V semiconductor components made from GaAs, which
can be processed in a way that resembles LED or CMOS processing: Growth of epitaxial layers,
lithography, metallization, packaging, integration of optics etc. Yet, the status of VCSEL
manufacturing is still embryonic when compared to LED manufacturing or CMOS silicon
manufacturing processes. Substrates are largely still 3”, process control is rather limited and many
production steps are still manual.
This VIDaP project will bring VCSEL manufacturing to a level comparable to LED manufacturing.
Potential Impact
The impact of the project is manifold:

The project helps to significantly reduce energy consumption in data centres and in thermal
industrial processes.
 The project helps to enable radically new solutions (e.g. “digital” industrial thermal
processing, high speed data communication, 3d recognition)
 The project will, directly and indirectly, generate employment at the involved companies,
but also at other companies using VCSELs
 The project helps to secure the leading European position in this growing segment of optoelectronics.
The consortium consists of two production facilities: IQE is a manufacturer of epitaxial material,
while Philips has a production line for front-end and back-end processing of the lasers. Next to that,
four end customers, supported by one university, participate in the project, and will design the
VCSELs into their products: High speed interconnects for data-centres, Time-of-Flight sensors,
heaters for plastic processing, illumination for 3D cameras. These partners represent a broad class of
applications of VCSELs.
ENIAC-GB-176-14
Maximum eligible costs and public funding
The negotiation concluded with the following eligible costs (final). The national funding figures are
indicative until the establishment of the national grant agreements.
Beneficiary
Philips Technologie GmbH
Sick AG
IQE (Europe) LTD
STMicroelectronics (R&D) Ltd
Mellanox Technologies LTD - MLNX
Sidel Blowing and Services
STMICROELECTRONICS GRENOBLE 2 SAS
Philips Electronics Nederland B.V.
Technische Universiteit Eindhoven
TOTAL
Country
DE
DE
UK
UK
IL
FR
FR
NL
NL
Eligible Cost
9.094.566,00 €
1.059.826,00 €
5.986.196,00 €
640.960,00 €
1.140.000,00 €
2.561.210,00 €
680.317,00 €
1.786.554,00 €
275.988,00 €
23.225.617,00 €
ENIAC JU funding
1.364.184,90 €
158.973,90 €
897.929,40 €
96.144,00 €
171.000,00 €
384.181,50 €
102.047,55 €
267.983,10 €
41.398,20 €
3.483.842,55 €