TuffDriveTM
SlimSATA
Product Specification
VSS 100 Efficiency Series
Product Specification
VSS SlimSATA 100 Efficiency Series
Rev.: 1.2
1.0 Introduction
Virtium’s VSS100 SlimSATA Efficiency Series is intended as embedded flash solution for embedded and
communication OEMs.
Features
 4GB to 64GB Capacity
 Sustained Read/ Write Performance
Design Target Read: 100MB/s(min) - 150MB/s(max)
Design Target Write: 80MB/s(min) - 130MB/s(max)
 ATA -7 Compatible
 ATA Transfer Modes
UDMA 0-6
MWDMA 0-2
PIO 0-4
 ECC corrects up to 8/24 bits per 512/1024Bytes

Operating Temperature Range
Commercial: 0oC to 70oC
 S.M.A.R.T. attribute reporting
 Power Usage
Active Read: 150 mA (max) @ 5V
Active Write: 200 mA (max) @ 5V
Idle Mode: 140 mA (max) @ 5V
 MO-297 Compliant
2
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Product Specification
VSS SlimSATA 100 Efficiency Series
Rev.: 1.2
2.0 Ordering Information and Part Numbering System
Table 1: Ordering information (most common SlimSATA configurations)
Part Number
Description
VSS10-04G-SBCS-AAS
4GB SlimSATA, 3 Gb/s interface, SLC, 0oC to 70oC
VSS10-08G-SBCS-AAS
8GB SlimSATA, 3 Gb/s interface, SLC, 0oC to 70oC
VSS10-16G-SBCS-AAS
16GB SlimSATA, 3 Gb/s interface, SLC, 0oC to 70oC
VSS10-32G-SBCS-AAS
32GB SlimSATA, 3 Gb/s interface, SLC, 0oC to 70oC
VSS10-64G-SBCS-AAS
64GB SlimSATA, 3 Gb/s interface, SLC, 0oC to 70oC
VSS 10 – XXX – S B C X – X X X – ZZ
Customer
Specific
Brand Code
Product Family
10: 100 Series
Capacity
04G: 4GB
08G: 8GB
16G: 16GB
32G: 32GB
64G: 64GB
Serial ATA
Configuration
A: SATA I 1.5 Gb/s
B: SATA II 3.0 Gb/s
C: SATA III 6.0 Gb/s
NAND Type
S: SLC
M: MLC
E: eMLC
T: TLC
Firmware Rev Control
Hardware Rev Control
Flash
Manufacturer
S: Samsung
T: Toshiba
M: Micron
H: Hynix
Operating
Temperature
C: 0oC to 70oC
3
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Product Specification
VSS SlimSATA 100 Efficiency Series
Rev.: 1.2
3.0 Contents:
1.0 INTRODUCTION ................................................................................................................................................ 2 2.0 ORDERING INFORMATION AND PART NUMBERING SYSTEM ................................................................... 3 3.0 CONTENTS:....................................................................................................................................................... 4 4.0 ENVIRONMENTAL SPECIFICATIONS ............................................................................................................. 7 4.1.1 Temperature Range ....................................................................................................................................... 7 4.1.2 Humidity ......................................................................................................................................................... 7 4.1.3 Shock and Vibration ....................................................................................................................................... 7 4.2 System Reliability ............................................................................................................................................... 7 4.2.1 ECC Technology ............................................................................................................................................ 7 4.2.2 Wear Leveling ................................................................................................................................................ 7 4.2.3 Mean Time Between Failures ........................................................................................................................ 7 4.3 Power Requirements .......................................................................................................................................... 7 4.3.1 Power Consumption (max) ............................................................................................................................ 8 4.4 FCC and CE Requirements ............................................................................................................................... 8 4.4.1 ROHS Compliance......................................................................................................................................... 8 4.5 Read/Write Performance .................................................................................................................................... 8 5.0 PHYSICAL SPECIFICATION ............................................................................................................................. 9 5.1 Pin Assignments................................................................................................................................................. 9 5.2 Mechanical Dimensions ................................................................................................................................... 10 6.0 ATA COMMANDS ............................................................................................................................................ 11 6.1 Check Power Mode E5h .................................................................................................................................. 12 6.2 Device Configuration B1h ................................................................................................................................ 13 6.3 Execute Diagnostics 90h .................................................................................................................................. 15 6.4 Flush Cache E7h .............................................................................................................................................. 17 6.5 Identify Device ECh .......................................................................................................................................... 18 6.6 Idle E3h ............................................................................................................................................................ 28 6.7 Idle Immediate E1h .......................................................................................................................................... 29 6.8 Initialize Device Parameters 91h...................................................................................................................... 30 6.9 Read DMA C8h or C9h .................................................................................................................................... 31 6.10 Read Multiple C4h ............................................................................................................................................ 33 6.11 Read Sectors 20h or 21h ................................................................................................................................. 35 6.12 Read Verify Sectors 40h .................................................................................................................................. 37 6.13 Recalibrate 10h ................................................................................................................................................ 39 6.14 Security Disable Password F6h ....................................................................................................................... 39 6.15 Security Set Password F1h .............................................................................................................................. 41 6.16 Security Erase Unit F4h ................................................................................................................................... 43 6.17 Security Erase Prepare F3h ............................................................................................................................. 46 6.18 Security Unlock F2h ......................................................................................................................................... 48 6.19 Security Freeze Lock F5h ................................................................................................................................ 50 6.20 Seek 7xh .......................................................................................................................................................... 51 6.21 Set Features EFh ............................................................................................................................................. 52 6.22 Set Multiple Mode C6h ..................................................................................................................................... 53 6.23 Sleep ................................................................................................................................................................ 54 6.24 Smart B0h ........................................................................................................................................................ 56 6.25 Standby E2h ..................................................................................................................................................... 63 6.26 Standby Immediate E0h ................................................................................................................................... 64 6.27 Write DMA CAh or CBh .................................................................................................................................... 66 6.28 Write Multiple 30h............................................................................................................................................. 67 6.29 Write Sectors 30h or 31h ................................................................................................................................. 70 7.0 REVISION TABLE ............................................................................................................................................ 71 4
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Product Specification
VSS SlimSATA 100 Efficiency Series
Rev.: 1.2
List of Tables:
TABLE 1: ORDERING INFORMATION (MOST COMMON SLIM SATA CONFIGURATION) ....................................... 3 TABLE 2: SHOCK AND VIBRATION TESTING ............................................................................................................. 7 TABLE 3: POWER CONSUMPTION .............................................................................................................................. 8 TABLE 4: READ/WRITE PERFORMANCE .......................................................ERROR! BOOKMARK NOT DEFINED. TABLE 5: PIN ASSIGNMENTS....................................................................................................................................... 9 TABLE 6: ATA COMMANDS ........................................................................................................................................ 11 TABLE 7: CHECK POWER MODE COMMAND INPUTS ............................................................................................ 12 TABLE 8: CHECK POWER MODE NORMAL OUTPUTS ............................................................................................ 12 TABLE 9: SECTOR COUNT RESULT DECODER ....................................................................................................... 12 TABLE 10: DEVICE CONFIGURATION FEATURE FIELD VALUES ........................................................................... 13 TABLE 11: DCO IDENTIFY DATA STRUCTURE ........................................................................................................ 14 TABLE 12: EXECUTE DEVICE DIAGNOSTIC COMMAND INPUTS .......................................................................... 15 TABLE 13: EXECUTE DIAGNOSTIC NORMAL OUTPUTS......................................................................................... 16 TABLE 14: EXECUTE DEVICE DIAGNOSTIC COMMAND ERROR REGISTER ....................................................... 16 TABLE 15: FLUSH CACHE COMMAND INPUTS ........................................................................................................ 17 TABLE 16: FLUSH CACHE COMMAND NORMAL OUTPUTS.................................................................................... 17 TABLE 17: FLUSH CACHE COMMAND ERROR OUTPUTS ...................................................................................... 18 TABLE 18: IDENTIFY DEVICE COMMAND INPUTS................................................................................................... 18 TABLE 19: IDENTIFY DEVICE COMMAND NORMAL OUTPUTS .............................................................................. 19 TABLE 20: IDENTIFY DEVICE COMMAND OUTPUTS............................................................................................... 20 TABLE 21: IDLE COMMAND INPUTS.......................................................................................................................... 28 TABLE 22:IDLE COMMAND SECTOR COUNT REGISTER ....................................................................................... 28 TABLE 23: IDLE COMMAND NORMAL OUTPUTS ..................................................................................................... 28 TABLE 24: IDLE COMMAND ERROR OUTPUTS ....................................................................................................... 29 TABLE 25: IDLE IMMEDIATE COMMAND INPUTS .................................................................................................... 29 TABLE 26: IDLE IMMEDIATE COMMAND NORMAL OUTPUTS ................................................................................ 30 TABLE 27: READ DMA COMMAND INPUTS .............................................................................................................. 31 TABLE 28: READ DMA NORMAL OUTPUTS .............................................................................................................. 31 TABLE 29: READ DMA ERROR OUTPUTS ................................................................................................................ 32 TABLE 30: READ MULTIPLE COMMAND INPUTS ..................................................................................................... 33 TABLE 31: READ MULTIPLE NORMAL OUTPUTS .................................................................................................... 33 TABLE 32: READ MULTIPLE ERROR OUTPUTS ....................................................................................................... 34 TABLE 33: READ SECTOR COMMAND INPUTS ....................................................................................................... 35 TABLE 34: NORMAL OUTPUTS .................................................................................................................................. 35 TABLE 35: READ SECTOR ERROR OUTPUTS ......................................................................................................... 36 TABLE 36READ VERIFY SECTORS COMMAND INPUTS ......................................................................................... 37 TABLE 37: READ VERIFY SECTOR NORMAL OUTPUTS ......................................................................................... 37 TABLE 38: READ VERIFY SECTOR ERROR OUTPUTS ........................................................................................... 38 TABLE 39: SECURITY DISABLE PASSWORD COMMAND INPUTS ........................................................................ 39 TABLE 40: SECURITY DISABLE PASSWORD NORMAL OUTPUTS ........................................................................ 39 TABLE 41: SECURITY DISABLE PASSWORD ERROR OUTPUTS ........................................................................... 40 TABLE 42: SECURITY SET PASSWORD COMMAND INPUTS ................................................................................ 41 TABLE 43: SECURITY SET PASSWORD NORMAL OUTPUTS ................................................................................. 41 TABLE 44: SECURITY SET PASSWORD ERROR OUTPUTS ................................................................................... 42 TABLE 45: SECURITY SET PASSWORD CONTENT ................................................................................................. 42 TABLE 46: SECURITY SET PASSWORD SECURITY LEVEL BIT INTERACTION .................................................... 43 TABLE 47:SECURITY ERASE UNIT COMMAND INPUTS.......................................................................................... 43 TABLE 48: SECURITY ERASE UNIT NORMAL OUTPUTS ........................................................................................ 43 TABLE 49: SECURITY ERASE UNIT ERROR OUTPUTS........................................................................................... 44 TABLE 50: SECURITY ERASE UNIT PASSWORD CONTENT ................................................................................. 45 TABLE 51: SECURITY ERASE PREPARE COMMAND INPUTS ................................................................................ 46 TABLE 52: SECURITY ERASE PREPARE COMMAND NORMAL OUTPUTS ........................................................... 46 TABLE 53: SECURITY ERASE PREPARE ERROR OUTPUTS .................................................................................. 47 5
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Product Specification
VSS SlimSATA 100 Efficiency Series
Rev.: 1.2
TABLE 54: SECURITY UNLOCK COMMAND INPUTS ............................................................................................... 48 TABLE 55: SECURITY UNLOCK COMMAND NORMAL OUTPUTS ........................................................................... 48 TABLE 56: SECURITY UNLOCK ERROR OUTPUTS ................................................................................................. 49 TABLE 57: SECURITY FREEZE LOCK COMMAND INPUTS ..................................................................................... 50 TABLE 58: SECURITY FREEZE LOCK COMMAND NORMAL OUTPUTS................................................................. 50 TABLE 59: SECURITY FREEZE LOCK ERROR OUTPUTS ....................................................................................... 51 TABLE 60: SET FEATURES REGISTER VALUE AND ASSOCIATED MODE. .......................................................... 52 TABLE 61: SATA FEATURES VALUE AND FEATURE DESCRIPTION ..................................................................... 52 TABLE 62: SET MULTIPLE MODE COMMAND INPUTS ............................................................................................ 53 TABLE 63: SET MULTIPLE MODE NORMAL OUTPUTS............................................................................................ 53 TABLE 64: SET MULTIPLE MODE ERROR OUTPUTS .............................................................................................. 54 TABLE 65: SLEEP NORMAL COMMAND INPUTS ..................................................................................................... 54 TABLE 66: SLEEP NORMAL OUTPUTS...................................................................................................................... 55 TABLE 67: SLEEP ERROR OUTPUTS ........................................................................................................................ 55 TABLE 68: SMART READ DATA COMMAND INPUTS ............................................................................................... 56 TABLE 69: SMART READ DATA NORMAL OUTPUTS ............................................................................................... 57 TABLE 70: SMART READ DATA COMMAND DATA STRUCTURE ........................................................................... 57 TABLE 71: BYTES 2-361 INDIVIDUAL ATTRIBUTE DATA ......................................................................................... 57 TABLE 72: ATTRIBUTE ID ........................................................................................................................................... 58 TABLE 73: ECC FAIL RECORD DATA STRUCTURE E9H ......................................................................................... 59 TABLE 74: AVERAGE ERASE COUNT DATA STRUCTURE EAH ............................................................................. 59 TABLE 75: GOOD AND SYSTEM BLOCK COUNT DATA STRUCTURE ................................................................... 59 TABLE 76: SMART ENABLE COMMAND INPUTS...................................................................................................... 60 TABLE 77: SMART ENABLE NORMAL OUTPUT ........................................................................................................ 61 TABLE 78: SMART DISABLE COMMAND INPUTS..................................................................................................... 61 TABLE 79: SMART DISABLE NORMAL OUTPUTS .................................................................................................... 62 TABLE 80: SMART READ ATTRIBUTE DATA STRUCTURE ..................................................................................... 62 TABLE 81: STANDBY COMMAND INPUTS................................................................................................................. 63 TABLE 82: STANDBY NORMAL OUTPUTS ................................................................................................................ 63 TABLE 83: STANDBY ERROR OUTPUTS................................................................................................................... 64 TABLE 84: STANDBY IMMEDIATE COMMAND INPUTS ........................................................................................... 64 TABLE 85: STANDBY IMMEDIATE NORMAL OUTPUTS ........................................................................................... 65 TABLE 86: STANDBY IMMEDIATE ERROR OUTPUTS ............................................................................................. 65 TABLE 87: WRITE DMA COMMAND INPUTS ............................................................................................................. 66 TABLE 88: WRITE DMA NORMAL OUTPUTS ............................................................................................................ 66 TABLE 89: WRITE DMA ERROR OUTPUTS- .............................................................................................................. 67 TABLE 90: WRITE MULTIPLE COMMAND INPUTS ................................................................................................... 67 TABLE 91: WRITE MULTIPLE NORMAL OUTPUTS ................................................................................................... 68 TABLE 92: WRITE MULTIPLE ERROR OUTPUTS ..................................................................................................... 68 TABLE 93: WRITE SECTOR COMMAND INPUTS ...................................................................................................... 70 TABLE 94: WRITE SECTOR COMMAND NORMAL OUTPUTS ................................................................................. 70 TABLE 95: WRITE SECTOR ERROR OUTPUT .......................................................................................................... 71 Figures:
FIGURE 1: MECHANICAL DIMENSIONS .................................................................................................................... 10 6
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Product Specification
VSS SlimSATA 100 Efficiency Series
Rev.: 1.2
4.0 Environmental Specifications
4.1.1 Temperature Range
Commercial Grade Operating Temperature Range: 0°C to 70oC
Storage Temperature Range: -55°C to +95°C
4.1.2 Humidity
Relative Humidity: 10-95%, non-condensing
4.1.3 Shock and Vibration
Table 2: Shock and Vibration Testing
Reliability
Test Conditions
Vibration
7 to 2000 Hz, 20G, 3 axes
Mechanical Shock
Duration: 10ms, 50G, 3 axes
4.2
System Reliability
4.2.1 ECC Technology
The controller provides hardware and software to implement error correction code which can detect and correct up to
8/24 bit errors within one/two sector(s) boundary.
4.2.2 Wear Leveling
The VSS SlimSATA 100 Series flash solution supports Static Wear Leveling. Wear leveling is required since flash
memory has a finite lifetime based on the number of writes and erasures to each individual block. The wear leveling
algorithm in the VSS SlimSATA 100 Series product moves data to distribute block erases and writes across the
available block population. The VSS SlimSATA 100 Series product uses flash devices to enhance endurance,
retention and reliability.
4.2.3 Mean Time in Between Failures
Using the Telcordia SR-332 specification at a temperature of 25°C, the Mean Time in Between Failures (MTBF) is
calculated to be greater than three million hours.
4.3
Power Requirements
5V (±10%) single power supply operation
7
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Product Specification
VSS SlimSATA 100 Efficiency Series
Rev.: 1.2
4.3.1 Power Consumption (max)
Table 3: Power Consumption
Parameter(s)
(Maximum)
Sustained Read
150 mA
Sustained Write
200 mA
Idle
140 mA
4.4
FCC and CE Requirements
VSS SlimSATA 100 Series products conform to CE and FCC requirements.
4.4.1 ROHS Compliance
VSS SlimSATA 100 Series products are compliant with the ROHS directive.
4.5
Read/Write Performance
Transfer Rate
Interface Bandwidth
Burst Speed Rate
Sustained Read
Sustained Write
Table 4: Read/Write Performance
Value
Min.
Typical
Max.
3.0
300
100
150
80
130
Units
Note
Gb/s
MB/s
MB/s
MB/s
1
1
Note 1: Read/ Write Performance vary depending on systems and product configuration. Actual Read/ Write Performance per product configuration
is available upon request.
8
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Product Specification
VSS SlimSATA 100 Efficiency Series
Rev.: 1.2
5.0 Physical Specification
5.1
Pin Assignments
Name
Type
S1
GND
S2
Rx+
S3
Rx-
S4
GND
S5
Tx-
S6
Tx+
S7
GND
Table 5: Pin Assignments
Description
Ground
Differential Receive Signal
Ground
Differential Transmit Signal
Ground
Power Pin Assignments
P1
V33
N/A
P2
V33
N/A
P3
V33
N/A
P4
GND
Ground
P5
GND
Ground
P6
GND
Ground
P7
V5
5V Power, Pre-Charge
P8
V5
5V Power
P9
V5
5V Power
P10
GND
Ground
P11
DAS
Device Activity Signal
P12
GND
Ground
P13
V12
N/A
P14
V12
N/A
P15
V12
N/A
9
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Product Specification
VSS SlimSATA 100 Efficiency Series
5.2
Rev.: 1.2
Mechanical Dimensions
Figure 1: Mechanical Dimensions
10
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Product Specification
VSS SlimSATA 100 Efficiency Series
Rev.: 1.2
6.0 ATA Commands
Table 6: ATA Commands
Command Name
Parameters Used
Code
Sector
Count
Register
Sector
Number
Registers
Cylinder
Low/High
Register
Device
Select
Bit
Head
Select
Bit
Feature
RegisterT
CHECK POWER MODE
E5h
X
X
X
O
X
X
DEVICE CONFIGURATION OVERLAY
B1h
X
X
X
O
X
O
EXECUTE DIAGNOSTICS
90h
X
X
X
O
X
X
FLUSH CACHE
E7h
X
X
X
O
O
X
IDENTIFY DEVICE
ECh
X
X
X
O
X
X
IDLE
E3h
O
X
X
O
X
X
IDLE IMMEDIATE
E1h
X
X
X
O
X
X
INITIALIZE DEVICE PARAMETERS
91h
O
X
X
O
O
X
READ BUFFER
E4h
X
X
X
X
O
X
C8h or C9h
O
O
O
O
O
X
READ MULTIPLE
C4h
O
O
O
O
O
X
READ SECTORS
20h or 21h
O
O
O
O
O
X
READ VERIFY SECTORS
40h or 41h
O
O
O
O
O
X
RECALIBRATE
10h
X
X
X
O
X
X
SECURITY DISABLE PASSWORD
F6h
X
X
X
O
X
X
SECURITY ERASE PREPARE
F3h
X
X
X
O
X
X
SECURITY ERASE UNIT
F4h
X
X
X
O
X
X
SECURITY FREEZE LOCK
F5h
X
X
X
O
X
X
SECURITY UNLOCK
F2h
X
X
X
O
X
X
SECURITY SET PASSWORD
F1h
X
X
X
O
X
X
SEEK
7xh
X
X
O
O
O
X
SET FEATURES
EFh
O
X
X
O
X
O
SET MULTIPLE MODE
C6h
O
X
X
O
X
X
SLEEP
E6h
X
X
X
O
X
X
SMART
B0h
X
X
O
O
X
O
STANDBY
E2h
X
X
X
O
X
X
STANDBY IMMEDIATE
E0h
X
X
X
O
X
X
WRITE BUFFER
E8h
X
X
X
X
O
X
CAh or CBh
O
O
O
O
O
X
WRITE MULTIPLE
C5h
O
O
O
O
O
X
WRITE SECTORS
30h or 31h
O
O
O
O
O
X
READ DMA
WRITE DMA
11
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Product Specification
VSS SlimSATA 100 Efficiency Series
6.1
Rev.: 1.2
Check Power Mode E5h
Table 7: Check Power Mode Command Inputs
Register
7
6
5
4
Features
Na
Sector Count
Na
LBA Low
Na
LBA Mid
Na
LBA High
Na
Device
Obs
Na
Obs
DEV
Command
3
2
1
0
Na
Na
Na
Na
E5h
Device Register:
DEV specifies the selected device, Obs shows obsolete, Na shows Not Applicable.
Check Power Mode Output:
The device returns the power mode in the Sector Count Register.
Table 8: Check Power Mode Normal Outputs
Register
7
6
5
4
Features
3
2
1
0
Na
Na
Na
Na
Sector Count
Result Value
LBA Low
Na
LBA Mid
Na
LBA High
Na
Device
Obs
Command
Na
Obs
DEV
Na
E5h
Table 9: Sector Count Result Decoder
Sector Count Value
Indicated Power Mode
00h
Device in Standby Mode
80h
Device in Idle Mode
FFh
Device in Active Mode or Idle mode
12
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Product Specification
VSS SlimSATA 100 Efficiency Series
6.2
Rev.: 1.2
Device Configuration B1h
The Individual Device Configuration Overlay command B1h is augmented by an additional command placed in the
feature register. The subcommands are listed in Table 9.
Table 10: Device Configuration Feature Field Values
Value
Commands
C0h
Device Configuration Restore
C1h
Device Configuration Freeze Lock
C2h
Device Configuration Identify
C3h
Device Configuration Set
DEVICE CONFIGURATION RESTORE (B1h/C0h)
The DEVICE CONFIGURATION RESTORE command provides a method for a host to restore any setting previously
changed by a DEVICE CONFIGURATION SET command and to restore the content of the IDENTIFY DEVICE data,
IDENTIFY PACKET DEVICE data, and other feature settings in a device to their factory default settings. The results
of this action are indicated by the data returned from the Input Data of a DEVICE CONFIGURATION IDENTIFY
command.
DEVICE CONFIGURATION FREEZE LOCK (B1h/C1h)
The DEVICE CONFIGURATION FREEZE LOCK command provides a method for the host to prevent accidental
modification of a device's DCO settings. After a device has completed a DEVICE CONFIGURATION FREEZE LOCK
command without error, the device shall return command aborted for all DEVICE CONFIGURATION SET, DEVICE
CONFIGURATION FREEZE LOCK, DEVICE CONFIGURATION IDENTIFY, and DEVICE CONFIGURATION
RESTORE commands until after the device processes a power-on reset. A device shall be in the factory_config state
or the reduced_config state after processing a power-on reset. A device shall not exit the DCO_Locked state as the
result of processing a hardware reset or a software reset.
DEVICE CONFIGURATION IDENTIFY (B1h/C2h)
The DEVICE CONFIGURATION IDENTIFY command causes a device to return a 512-byte data structure. The
content of this data structure indicates the selectable commands, modes, and feature sets that the device is capable
of disabling or modifying through processing of a DEVICE CONFIGURATION SET command. If a DEVICE
CONFIGURATION SET command reducing a device's capabilities has completed without error, then:
a) the response by a device to an IDENTIFY DEVICE, IDENTIFY PACKET DEVICE, and other commands,
except the DEVICE CONFIGURATION IDENTIFY command, shall reflect the reduced set of capabilities; and
b) the response to a DEVICE CONFIGURATION IDENTIFY command reflects the entire set of selectable
capabilities.
The phrase “is changeable” indicates that the feature may be disabled by the host using a DEVICE
CONFIGURATION SET command. If the feature is not changeable then the device may support the feature but the
DEVICE CONFIGURATION SET command shall not affect support of the feature.
DEVICE CONFIGURATION SET (B1h/C3h)
The DEVICE CONFIGURATION SET command allows a host to reduce the set of optional commands, modes, or
feature sets supported by a device as indicated by a DEVICE CONFIGURATION IDENTIFY command. The DEVICE
CONFIGURATION SET command may modify the data returned by IDENTIFY DEVICE or IDENTIFY PACKET
DEVICE. When the IDENTIFY DEVICE data or IDENTIFY PACKET DEVICE data is changed, the device shall
respond in a manner consistent with the new data.
If a bit is set to one in the DEVICE CONFIGURATION SET data transmitted to the device that is not set in the DCO
data received from a DEVICE CONFIGURATION IDENTIFY command, no action is taken for that bit.
13
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Product Specification
VSS SlimSATA 100 Efficiency Series
Rev.: 1.2
Modifying the maximum LBA of the device also modifies the LBA value returned by a READ NATIVE MAX
ADDRESS or READ NATIVE MAX ADDRESS EXT command.
Word
0
1
Value
0002h
0007h
2
0007h
3-6
Native MAX
LBA
7
0089h
8
0000h
9
0000h
Table 11: DCO Identify data structure
Description
Data structure revision number
Multiword DMA modes supported
Bit15:3Reserved
Bit2 1 = Reporting support for Multiword DMA mode 2 and below is
changeable
Bit1 1 =Reporting support for Multiword DMA mode 1 and below is
changeable
Bit0 1 =Reporting support for Multiword DMA mode 0 is changeable
Ultra DMA modes supported
Bit15:7
Reserved
Bit6 1 = Reporting support for Ultra DMA mode 6 and below is changeable
Bit5 1 = Reporting support for Ultra DMA mode 5 and below is changeable
Bit4 1 = Reporting support for Ultra DMA mode 4 and below is changeable
Bit3 1 = Reporting support for Ultra DMA mode 3 and below is changeable
Bit2 1 = Reporting support for Ultra DMA mode 2 and below is changeable
Bit1 1 = Reporting support for Ultra DMA mode 1 and below is changeable
Bit0 1 = Reporting support for Ultra DMA mode 0 is changeable
Maximum LBA (QWord)
Bit63:48 Reserved
Bit47:0
Maximum LBA
Command set/feature set supported part 1
Bit15
Reserved
Bit14 1 = Reporting support for the Write-Read-Verify feature set is
changeable
Bit13 1 = Reporting support for the SMART Conveyance self-test is
changeable
Bit12 1 = Reporting support for the SMART Selective self-test is changeable
Bit11 1 = Reporting support for the Forced Unit Access is changeable
Bit10
Reserved for TLC
Bit9 1 = Reporting support for the Streaming feature set is changeable
Bit8 1 = Reporting support for the 48-bit Addressing feature set is
changeable
Bit7 1 = Reporting support for the HPA feature set is changeable
Bit6 1 = Reporting support for the AAM feature set is changeable
Bit5 1 = Reporting support for the TCQ feature set is changeable
Bit4 1 = Reporting support for the PUIS feature set is changeable
Bit3 1 = Reporting support for the Security feature set is changeable
Bit2 1 = Reporting support for the SMART error log is changeable
Bit1 1 = Reporting support for the SMART self-test is changeable
Bit0 1 = Reporting support for the SMART feature set is changeable
Serial ATA Command set/feature set supported
Bit15:5
Reserved for Serial ATA
Bit4 1 = Reporting support for the SSP feature set is changeable
Bit3 1 = Reporting support for asynchronous notification is changeable
Bit2 1 = Reporting support for interface power management is changeable
Bit1 1 = Reporting support for non-zero buffer offsets is changeable
Bit0 1 = Reporting support for the NCQ feature set is changeable
Reserved for Serial ATABit0 1 = Reporting support for the NCQ feature set is
14
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Product Specification
VSS SlimSATA 100 Efficiency Series
10-20
21
0000h
0000h
22
0000h
23-207
208-254
255
0000h
0000h
Checksum +
A5h
6.3
Rev.: 1.2
changeable
Reserved
Command set/feature set supported part 2
Bit15 1 = Reporting support for the NV Cache feature set is changeable
Bit14 1 = Reporting support for the NV Cache Power Management feature
set is changeable
Bit13 1 = Reporting support for WRITE UNCORRECTABLE EXT is
changeable
Bit12 1 = Reporting support for the Trusted Computing feature set is
changeable
Bit11 1 = Reporting support for the Free-fall Control feature set is
changeable
Bit10:0
Reserved
Command set/feature set supported part 3
Bit15:0
Reserved
Reserved
Vender Specific
Integrity word
Bit15:8
Checksum
Bit7:0
Signature
Execute Diagnostics 90h
Table 12: Execute Device Diagnostic Command Inputs
Register
7
6
5
4
Features
Na
Sector Count
Na
LBA Low
Na
LBA Mid
Na
LBA High
Na
Device
Command
Obs
Na
Obs
DEV
3
2
1
0
Na
Na
Na
Na
90h
Device Register:
DEV shall be ignored.
Normal Outputs:
The diagnostic code written into the Error Register is an 8-bit code.
15
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Rev.: 1.2
Table 13: Execute Diagnostic Normal Outputs
Register
7
6
5
Error
4
3
1
Na
Na
0
Diagnostic Code
Sector Count
Signature
LBA Low
Signature
LBA Mid
Signature
LBA High
Signature
Device
Signature
Status
2
BSY
DRDY
DF
Na
DRQ
ERR
Error Register:
Diagnostic Code
Sector Count, LBA Low, LBA Mid, LBA High, and Device Registers contain the Device signature.
Device Register:
DEV shall be cleared to zero.
Status Register:
TBD
Table 14: Execute Device Diagnostic Command Error Register
Code
Description
01h
Device passed
Others
Device failed
Error Outputs:
Table 14 shows the error information that is returned as a diagnostic code in the Error Register.
Prerequisites:
This command shall be accepted regardless of the state of DRDY.
Description:
This command shall cause the devices to perform the internal diagnostic tests.
16
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Product Specification
VSS SlimSATA 100 Efficiency Series
6.4
Rev.: 1.2
Flush Cache E7h
Table 15: Flush Cache Command Inputs
Register
7
6
5
4
Features
Na
Sector Count
Na
LBA Low
Na
LBA Mid
Na
LBA High
Na
Device
Obs
Na
Obs
DEV
Status
3
2
1
0
Na
Na
Na
Na
E7h
Device Register:
DEV specifies the selected device, Obs shows obsolete, Na shows Not Applicable.
Normal Outputs:
Table 16: Flush Cache Command Normal Outputs
Register
7
6
5
4
Features
Na
Sector Count
Na
LBA Low
Na
LBA Mid
Na
LBA High
Na
3
2
1
0
Device
Obs
Na
Obs
DEV
Na
Na
Na
Na
Status
BSY
DRDY
DF
Na
DRQ
Na
Na
ERR
Device Register:
DEV specifies the selected device, Obs shows obsolete, Na shows Not Applicable.
Status Register:
BSY shall be cleared to zero indicating command completion.
DRDY shall be set to one.
DF (Device Fault) shall be cleared to zero.
DRQ shall be cleared to zero
ERR shall be cleared to zero.
17
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Rev.: 1.2
Error Outputs:
Table 17: Flush Cache Command Error Outputs
Register
Error
7
6
5
4
3
2
1
0
Na
Na
Na
Na
Na
ABRT
Na
Na
Sector Count
Na
LBA Low
LBA(7:0)
LBA Mid
LBA(15:8)
LBA High
LBA(23:16)
Device
Obs
Na
Obs
DEV
Status
BSY
DRDY
DF
Na
LBA(27:24)
DRQ
Na
Na
ERR
Error Register:
ABRT may be set to one if the device is not able to complete the action requested by the command.
LBA Low, LBA Mid, LBA High, and Device Registers shall be written with the address of first unrecoverable error.
Status Register:
BSY shall be cleared to zero indicating command completion.
DRDY shall be set to one.
DF (Device Fault) shall be set to one if a device fault has occurred.
DRQ shall be cleared to zero.
ERR shall be set to one if an Error register bit is set to one.
Prerequisites:
DRDY set to one.
Description:
This command is used by the host to request the device to flush the write cache. If there is data in write cache,
that data shall be written to the SSD. The BSY bit shall remain set to one until all data has been successfully
written or an error occurs.
6.5
Identify Device ECh
Table 18: Identify Device Command Inputs
Register
7
6
5
4
3
Features
Na
Sector Count
Na
LBA Low
Na
LBA Mid
Na
LBA High
Na
Device
Command
Obs
Na
Obs
DEV
Na
2
Na
1
0
Na
Na
ECh
18
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Device Register:
DEV specifies the selected device, Obs shows obsolete, Na shows Not Applicable.
Normal Outputs:
Table 19: Identify Device Command Normal Outputs
Register
7
6
5
4
Error
Na
Sector Count
Na
LBA Low
Na
LBA Mid
Na
LBA High
Na
3
2
1
0
Device
Obs
Na
Obs
DEV
Na
Na
Na
Na
Status
BSY
DRDY
DF
Na
DRQ
Na
Na
ERR
Device Register:
DEV specifies the selected device, Obs shows obsolete, Na shows Not Applicable.
Status Register:
BSY shall be cleared to zero indicating command completion.
DRDY shall be set to one.
DF (Device Fault) shall be cleared to zero.
DRQ shall be cleared to zero
ERR shall be cleared to zero.
Prerequisites:
DRDY set to one.
Description:
The IDENTIFY DEVICE command enables the host to receive parameter information from the device. When
the command is issued, the device sets the BSY bit to one, prepares to transfer the 256 words of device
identification data to the host, sets the DRQ bit to one, clears the BSY bit to zero, and asserts an interrupt if
interrupts are enabled. The host may then transfer the data by reading the Data register. Table 8 defines the
arrangement and meaning of the parameter words in the buffer. All reserved bits or words shall be zero.
Some parameters are defined as a 16-bit value. A word that is defined as a 16-bit value places the most
significant bit of the value on signal line DD15 and the least significant bit on signal line DD0. Some
parameters are defined as 32-bit values (e.g. words (61:60)). Such fields are transfer using two successive
word transfers. The device will first transfer the least significant bits, bits (15:0) of the value, on signal lines
DD (15:0) respectively. After the least significant bits have been transferred, the most significant bits, bits
(31:16) of the value, shall be transferred on DD (15:0) respectively.
Some parameters are defined as a string of ASCII characters.
19
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Product Specification
VSS SlimSATA 100 Efficiency Series
1
2
3
4-5
6
7-8
9
Table 20: Identify Device Command Outputs
Description
General configuration bit-significant information:
15
0 = ATA device
14-8
Retired
7
1 = removable media device
6
Obsolete
5-3
Retired
2
Response incomplete
1
Retired
0
Reserved
Number of Logical Cylinders
Specific configuration
Number of Logical Heads
Retired
Logical Sectors per Logical Track
Reserved for assignment by the CompactFlashTM Association
Retired
10-19
Serial number (20 ASCII characters)
20-21
22
Retired
Obsolete
23-26
Firmware revision (8 ASCII characters)
27-46
Model number (40 ASCII characters)
Word
0
47
48
49
50
51-52
53
15-8
7-0
80h
00h = Reserved
01h-FFh = Maximum number of sectors that shall be transferred
per interrupt on READ/WRITE MULTIPLE commands
Reserved
Capabilities
15-14 Reserved for the IDENTIFY PACKET DEVICE command.
13
1 = Standby timer values as specified in this standard are
supported
0 = Standby timer values shall be managed by the device
12
Reserved for the IDENTIFY PACKET DEVICE command.
11
1 = IORDY supported
0 = IORDY may be supported
10
1 = IORDY may be disabled
9
1 = LBA supported
8
1 = DMA supported.
7-0
Retired
Capabilities
15
Shell be cleared to zero
14:
Shall be set to one
13-2
Reserved
1
Obsolete
0
Shall be set to one to indicate a device specific Standby timer
value
minimum.
Obsolete
15-3
Reserved
Rev.: 1.2
Value
0040h
XXXXh
C837h
0010h
0000h
003Fh
0000h
0000h
20 ASCII
characters
0000h
0000h
8 ASCII
characters
40 ASCII
characters
8001h
0000h
2F00h
4000h
0000h
0007h
20
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VSS SlimSATA 100 Efficiency Series
2
54
55
56
57-58
59
1 = the fields reported in word 88 are valid Reserved
0 = the fields reported in word 88 are not valid
1
1 = the fields reported in words (70:64) are valid
0 = the fields reported in words (70:64) are not valid
0
Obsolete
Number of current logical cylinders
Number of current logical heads
Number of current logical sectors per logical track
Current capacity in sectors
15-9
Reserved
8
1 = Multiple sector setting is valid
7-0
xxh = Current setting for number of sectors that shall be
transferred per interrupt on R/W Multiple command
Rev.: 1.2
60-61
Total number of user addressable sectors
62
Obsolete
15-11 Reserved
10
1 = Multiword DMA mode 2 is selected
0 = Multiword DMA mode 2 is not selected
9
1 = Multiword DMA mode 1 is selected
0 = Multiword DMA mode 1 is not selected
8
1 = Multiword DMA mode 0 is selected
0 = Multiword DMA mode 0 is not selected
7-3
Reserved
2
1 = Multiword DMA mode 2 and below are supported
1
1 = Multiword DMA mode 1 and below are supported
0
1 = Multiword DMA mode 0 is supported
63
0101h
XXXXXXX
Xh
0000h
XX07h
64
15-8
7-0
65
Minimum Multiword DMA transfer cycle time per word
15-0
Cycle time in nanoseconds
0078h
66
Manufacturer’s recommended Multiword DMA transfer cycle time
15-0
Cycle time in nanoseconds
0078h
67
Minimum PIO transfer cycle time without flow control
15-0
Cycle time in nanoseconds
0078h
68
Minimum PIO transfer cycle time with IORDY flow control
15-0
Cycle time in nanoseconds
0078h
69-70
71-74
Reserved (for future command overlap and queuing)
Reserved for the IDENTIFY PACKET DEVICE command.
0000h
0000h
75
Queue depth
15-5
Reserved
4-0
Maximum queue depth - 1
0000h
76-79
Reserved
PIO modes supported
XXXXh
XXXXh
XXXXh
XXXXh
Reserved for Serial ATA
Major version number
0003h
0006h
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80
81
82
83
0000h or FFFFh = device does not report version
15
Reserved
14
Reserved for ATA/ATAPI-14
13
Reserved for ATA/ATAPI-13
12
Reserved for ATA/ATAPI-12
11
Reserved for ATA/ATAPI-11
10
Reserved for ATA/ATAPI-10
9
Reserved for ATA/ATAPI-9
8
Reserved for ATA/ATAPI-8
7
1 = supports ATA/ATAPI-7
6
1 = supports ATA/ATAPI-6
5
1 = supports ATA/ATAPI-5
4
1 = supports ATA/ATAPI-4
3
Obsolete
2
Obsolete
1
Obsolete
0
Reserved
Minor version number
0000h or FFFFh = device does not report version
0001h-FFFEh = See 6.17.41
Command set/feature supported extension
15
Shall be cleared to zero
14
Shall be set to one
13
1 = IDLE IMMEDIATE with UNLOAD FEATURE supported
12
Reserved for technical report
11
Reserved for technical report
10
1 = URG bit supported for WRITE STREAM DMA EXT and
WRITE STREAM EXT
9
1 = URG bit supported for READ STREAM DMA EXT and READ
STREAM EXT
8
1 = 64-bit Worldwide name supported
7
1 = WRITE DMA QUEUED FUA EXT command supported
6
1 = WRITE DMA FUA EXT and WRITE MULTIPLE FUA EXT
commands supported
5
1 = General Purpose Logging feature set supported
4
1 = Streaming feature set supported
3
1 = Media Card Pass Through Command feature set supported
2
1 = Media serial number supported
1
1 = SMART self-test supported
Command and feature sets supported
15
Shall be cleared to zero
14
Shall be set to one
13
1 = The FLUSH CACHE EXT command is supported
12
Shall be set to one to indicate that the mandatory FLUSH
CACHE command is supported
11
1 = The DCO feature set is supported
10
1 = The 48-bit Address feature set is suported
9
1 = The AAM feature set is supported
8
1 = SET MAX security extension supported
7
Reserved
6
1 = SET FEATURES subcommand required to spinup after
power-up
Rev.: 1.2
00F0h
0000h
304Bh
7D08h
22
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84
85
86
5
1 = Power-Up In Standby feature set supported
4
1 = Removable Media Status Notification feature set supported
3
1 = Advanced Power Management feature set supported
2
1 = CFA feature set supported
1
1 = READ/WRITE DMA QUEUED supported
0
1 = DOWNLOAD MICROCODE command supported
15
Shall be cleared to zero
14
Shall be set to one
13
1 = The IDLE IMMEDIATE command with UNLOAD feature is
supported
12-11
Reserved for TLC
10-9
Obsolete
8
1 = The 64-bit Worldwide name is supported
7
1 = The WRITE DMA QUEUED FUA EXT command is
supported
6
1 = The WRITE DMA FUA EXT and WRITE MULTIPLE FUA
EXT commands are supported
5
1 = The GPL feature set is supported
4
1 = The Streaming feature set is supported
3
1 = The Media Card Pass Through Command feature set is
supported
2
1 = Media serial number is supported
1
1 = SMART self-test supported
0
1 = SMART error logging supported
Command and feature sets supported or enable
15
Obsolete
14
1 = The NOP command is supported
13
1 = The READ BUFFER command is supported
12
1 = The WRITE BUFFER command is supported
11
Obsolete
10
1 = HPA feature set is supported
9
Shall be cleared to zero to indicate that the DEVICE RESET
command is not supported
8
1 = The SERVICE interrupt is enabled
7
1 = The release interrupt is enabled
6
1 = Read look-ahead is enabled
5
1 = The volatile write cache is enabled
4
Shall be cleared to zero to indicate that the PACKET Command
feature set is not supported.
3
Shall be set to one to indicate that the mandatory Power
Management feature is supported
2
Obsolete
1
1 = The Security feature set is enabled
0
1 = The SMART feature set is enabled
Command and feature sets supported or enable
15
1 = Words 119-120 are valid
14
Reserved
13
1 = FLUSH CACHE EXT command supported
12
1 = FLUSH CACHE command supported
11
1 = The DCO feature set is supported
10
1 = The 48-bit Address feature set is supported
9
1 = The AAM feature set is enable
8
1 = The SET MAX security extension is enabled by SET MAX
SET PASSWORD
Rev.: 1.2
4040h
7469h
BC00h
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87
88
89
7
Reserved for Address Offset Reserved Area Boot Method
6
1 = SET FEATURES subcommand required to spin-up after
power-up
5
1 = The PUIS feature set is enabled
4
Obsolete
3
1 = The APM feature set is enabled
2
1 = The CFA feature set is supported
1
1 = The TCQ feature set is supported
0
1 = The DOWNLOAD MICROCODE command is supported
Command and feature sets supported or enabled
15
Shall be cleared to zero
14
Shall be set to one
13
1 = The IDLE IMMEDIATE command with UNLOAD feature is
supported
12-11 Reserved for TLC
10-9
Obsolete
8
1 = The 64-bit Worldwide name is supported
7
1 = The WRITE DMA QUEUED FUA EXT command is supported
6
1 = The WRITE DMA FUA EXT and WRITE MULTIPLE FUA EXT
commands are supported
5
1 = The GPL feature set is supported
4
Obsolete
3
1 = The Media Card Pass Through Command feature set is
supported
2
1 = Media serial number is supported
1
1 = SMART self-test supported
0
1 = SMART error logging supported
Ultra DMA modes
15
Reserved
14
1 = Ultra DMA mode 6 is selected
0 = Ultra DMA mode 6 is not selected
13
1 = Ultra DMA mode 5 is selected
0 = Ultra DMA mode 5 is not selected
12
1 = Ultra DMA mode 4 is selected
0 = Ultra DMA mode 4 is not selected
11
1 = Ultra DMA mode 3 is selected
0 = Ultra DMA mode 3 is not selected
10
1 = Ultra DMA mode 2 is selected
0 = Ultra DMA mode 2 is not selected
9
1 = Ultra DMA mode 1 is selected
0 = Ultra DMA mode 1 is not selected
8
1 = Ultra DMA mode 0 is selected
0 = Ultra DMA mode 0 is not selected
7
Reserved
6
1 = Ultra DMA mode 6 and below are supported
5
1 = Ultra DMA mode 5 and below are supported
4
1 = Ultra DMA mode 4 and below are supported
3
1 = Ultra DMA mode 3 and below are supported
2
1 = Ultra DMA mode 2 and below are supported
1
1 = Ultra DMA mode 1 and below are supported
0
1 = Ultra DMA mode 0 is supported
15-8
Reserved
7-0
Time required for Normal Erase mode SECURITY ERASE UNIT
command
Rev.: 1.2
4040h
007Fh
001Eh
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VSS SlimSATA 100 Efficiency Series
90
91
92
93
94
95-99
100-103
104-105
106
107
108-111
112-115
116
117-118
119
120
121-126
127
128
15-8
Reserved
7-0
Time required for Enhanced Erase mode SECURITY ERASE
UNIT command
Current APM level value
Master Password Identifier
Hardware reset result
Current AAM value
15-8
Vendor’s recommended AAM value
7-0
Current AAM value
Reserved
Total Number of User Addressable Logical Sectors for 48-bit commands
(QWord)
Reserved
Physical sector size / logical sector size
15
Shall be cleared to zero
14
Shall be set to one
13
1 = Device has multiple logical sectors per physical sector
12
1 = Device Logical Sector longer than 256 Words
11-4
Reserved
3-0
2x logical sectors per physical sector
Inter-seek delay for ISO 7779 standard acoustic testing
World Wide Name
Reserved
Reserved for TLC
Logical sector size (DWord)
Commands and feature sets supported (Continued from words 84:82)
15
Shall be cleared to zero
14
Shall be set to one
13-6
Reserved
5
1= The Free-fall Control feature set is supported
4
1 = The DOWNLOAD MICROCODE command with mode 3 is
supported
3
1 = The READ LOG DMA EXT and WRITE LOG DMA EXT
commands are supported
2
1 = The WRITE UNCORRECTABLE EXT command is supported
1
1 = The Write-Read-Verify feature set is supported
0
Reserved for DDT
Commands and feature sets supported or enabled (Continued from words
87:85)
15
Shall be cleared to zero
14
Shall be set to one
13-6
Reserved
5
1= The Free-fall Control feature set is enabled
4
1 = The DOWNLOAD MICROCODE command with mode 3 is
supported
3
1 = The READ LOG DMA EXT and WRITE LOG DMA EXT
commands are supported
2
1 = The WRITE UNCORRECTABLE EXT command is supported
1
1 = The Write-Read-Verify feature set is enabled
0
Reserved for DDT
Reserved for expended supported and enabled settings
Obsolete
Security status
15-9
Reserved
Rev.: 1.2
001Eh
0000h
FFFEh
0000h
0000h
0000h
XXXXh
0000h
4000h
0000h
XXXXh
0000h
0000h
0000h
4000h
4000h
0000h
0000h
0021h
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VSS SlimSATA 100 Efficiency Series
129-159
160
161-167
168
169
170-173
174-175
176-205
206
207-208
209
210-211
212-213
214
8
Security level 0 = High, 1 = Maximum
7-6
Reserved
5
1 = Enhanced security erase supported
4
1 = Security count expired
3
1 = Security frozen
2
1 = Security locked
1
1 = Security enabled
0
1 = Security supported
Vendor Specific
CFA power mode
15
Word 160 supported
14
Reserved
13
CFA power mode 1 is required for one or more commands
implemented by the device
12
CFA power mode 1 disabled
11:0
Maximum current in ma
Reserved for the Compact Flash Association
15:4
Reserved
3:0
Device Nominal Form Factor
DATA SET MANAGEMENT is supported
15:1
Reserved
0
1 = the Trim bit in the DATA SET MANAGEMENT is supported
Additional Product Identifier (ATA String)
Reserved
Current media serial number (ATA String)
SCT Command Transport
15:12 Vendor Specific
11:6
Reserved
5
The SCT Data Tables command is supported
4
The SCT Feature Control command is supported
3
The SCT Error Recovery Control command is supported
2
The SCT Write Same command is supported
1
Obsolete
0
The SCT Command Transport is supported
Reserved for CE-ATA
Alignment of logical blocks within a physical block
15
Shall be cleared to zero
14
Shall be set to one
13:0
Logical sector offset within the first physical sector where the first
logical sector is placed
Write-Read-Verify Sector Count Mode 3 (DWord)
Write-Read-Verify Sector Count Mode 2 (DWord)
NV Cache Capabilities
15:12 NC+V Cache feature set version
11:8
NV Cache Power Mode feature set version
7:5
Reserved
4
1 = NV Cache feature set enabled
3:
2 Reserved
1
1 = NV Cache Power Mode feature set enabled
0
1 = NV Cache Power Mode feature set supported
NV Cache Size in Logical Blocks (DWord)
Nominal media rotation rate
Reserved
NV Cache Options
Rev.: 1.2
0000h
0000h
0000h
0003h
0000h
0000h
0000h
0000h
0000h
0000h
4000h
0000h
0000h
0000h
215-216
0000h
217
0001h
218
0000h
219
0000h
26
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220
221
222
223
224-233
234
235
236-254
255
15:8
Reserved
7:0
Device Estimated Time to Spin Up in Seconds
15:8
Reserved
7:0
Write-Read-Verify feature set current mode
Reserved
Transport major version number
0000h or FFFFh = device does not report version
15:12 Transport Type
0h = Parallel
1h = Serial
2h-Fh = Reserved
Parallel Serial
11:5
Reserved
4
Reserved SATA Rev 2.6
3
Reserved SATA Rev 2.5
2
Reserved SATA II: Extensions
1
ATA/ATAPI-7 SATA 1.0a
0
ATA8-APT ATA8-AST
Transport minor version number
Reserved for CE-ATA
Minimum number of 512-byte data blocks per DOWNLOAD MICROCODE
command for mode 3
Maximum number of 512-byte data blocks per DOWNLOAD MICROCODE
command for mode 3
Reserved
Integrity word
15-8 Checksum
7-0 Checksum Validity Indicator
Rev.: 1.2
0000h
0000h
101Fh
0000h
0000h
0000h
0000h
0000h
E9A5h
27
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VSS SlimSATA 100 Efficiency Series
6.6
Rev.: 1.2
Idle E3h
Table 21: Idle Command Inputs
Register
7
6
5
4
Features
3
1
0
Na
Na
Na
Na
Sector Count
Timer Period Value
LBA Low
Na
LBA Mid
Na
LBA High
Na
Device
2
Obs
Na
Obs
DEV
Command
Na
E3
Device Register:
DEV specifies the selected device, Obs shows obsolete, Na shows Not Applicable.
Table 22: Idle Command Sector Count Register
Sector Count Register Contents
Corresponding Timeout Period
0 (00h)
Timeout disabled
1-240 (01h-F0h)
(value*5)s
241-251 (F1h-FBh)
((Value-240)*30)min
252 (FCh)
21min
253 (FDh)
Period between 8 and 12 hrs
254 (FEh)
Reserved
255 (FFh)
21 min 15 s
NOTE – Times are approximate
Table 23: Idle Command Normal Outputs
Register
7
6
5
4
Error
Na
Sector Count
Na
LBA Low
Na
LBA Mid
Na
LBA High
Na
3
2
1
0
Device
Obs
Na
Obs
DEV
Na
Na
Na
Na
Status
BSY
DRDY
DF
Na
DRQ
Na
Na
ERR
Device Register:
DEV shall indicate the selected device.
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Status Register:
BSY shall be cleared to zero indicating command completion.
DRDY shall be set to one.
DF (Device Fault) shall be cleared to zero.
DRQ shall be cleared to zero
ERR shall be cleared to zero.
Error Outputs:
Table 24: Idle Command Error Outputs
Register
Error
7
6
5
4
3
2
1
0
Na
Na
Na
Na
Na
ABRT
Na
Na
Sector Count
Na
LBA Low
Na
LBA Mid
Na
LBA High
Na
Device
Obs
Na
Obs
DEV
Na
Na
Na
Na
Status
BSY
DRDY
DF
Na
DRQ
Na
Na
ERR
Prerequisites:
DRDY set to one
Description:
The IDLE command allows the host to place the device in the idle mode and also set the Standby timer.
6.7
Idle Immediate E1h
Table 25: Idle Immediate Command Inputs
Register
7
6
5
4
Features
Na
Sector Count
Na
LBA Low
Na
LBA Mid
Na
LBA High
Na
Device
Command
Obs
Na
Obs
DEV
3
2
1
0
Na
Na
Na
Na
E1h
Device Register:
DEV specifies the selected device, Obs shows obsolete, Na shows Not Applicable.
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Table 26: Idle Immediate Command Normal Outputs
Register
Error
7
6
5
4
3
2
1
0
Na
Na
Na
Na
Na
ABRT
Na
Na
Sector Count
Na
LBA Low
Na
LBA Mid
Na
LBA High
Na
Device
Obs
Na
Obs
DEV
Na
Na
Na
Na
Status
BSY
DRDY
DF
Na
DRQ
Na
Na
ERR
Device Register:
DEV shall indicate the selected device.
Status Register:
BSY shall be cleared to zero indicating command completion.
DRDY shall be set to one.
DF (Device Fault) shall be cleared to zero.
DRQ shall be cleared to zero
ERR shall be cleared to zero.
Prerequisites:
DRDY set to one
Description:
The IDLE IMMEDIATE command allows the host to immediately place the device in the idle mode.
6.8
Initialize Device Parameters 91h
This command enables the host to set the number of logical sectors per track and the number of logical heads minus
1, per logical cylinder for the current CHS translation mode. If the capacity of the device is less than 16,514,064
sectors, a device shall support the CHS translation described in words 1, 3, and 6 of the IDENTIFY DEVICE
information. Support of other CHS translations is optional. If the host requests a CHS translation that is not supported
by the device, the device shall return command aborted. The device shall also clear bit 0 of word 53 in the IDENTIFY
DEVICE data to zero, and the content of words 54, 55, 56, and (58:57) may be zero until a supported translation is
requested by the host. If the requested CHS translation is not supported, the device shall fail all media access
commands with an ID Not Found error until a valid CHS translation is established.
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6.9
Rev.: 1.2
Read DMA C8h or C9h
Register
Table 27: Read DMA Command Inputs
7
6
5
4
3
2
Features
0
Na
Sector Count
Sector Count
LBA Low
LBA(7:0)
LBA Mid
LBA(15:8)
LBA High
LBA(23:16)
Device
1
Obs
Na
Obs
DEV
Command
LBA(27:24)
C8h
Sector Count Register:
Number of sectors to be transferred, a value of 00h specifies that 256 sectors are to be transferred.
LBA Low Register: Starting LBA bits (7:0).
LBA Mid Register: Starting LBA bits (15:8).
LBA High Register: Starting LBA bits (23:16).
Device Register:
DEV shall specify the selected device.
Bits (3:0) starting LBA bits (27:24).
Table 28: Read DMA Normal Outputs
Register
7
6
5
4
Error
Na
Sector Count
Na
LBA Low
Na
LBA Mid
Na
LBA High
Na
3
2
1
0
Device
Obs
Na
Obs
DEV
Na
Na
Na
Na
Status
BSY
DRDY
DF
Na
DRQ
Na
Na
ERR
Device register:
DEV shall specify the selected device.
Status Register:
BSY shall be cleared to zero indicating command completion.
DRDY shall be set to one.
DF (Device Fault) shall be cleared to zero.
DRQ shall be cleared to zero
ERR shall be cleared to zero.
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Error Outputs:
An unrecoverable error encountered during the execution of this command results in the termination of the
command. The Command Block Registers contain the address of the sector where the first unrecoverable
error occurred. The amount of data transferred is indeterminate.
Table 29: Read DMA Error Outputs
Register
Error
7
6
5
4
3
2
1
0
ICRC
UNC
MC
IDNF
MCR
ABRT
NM
Obs
Sector Count
Na
LBA Low
LBA(7:0)
LBA Mid
LBA(15:8)
LBA High
LBA(23:16)
Device
Obs
Na
Obs
Na
Status
BSY
DRDY
DF
Na
LBA(27:24)
DRQ
Na
Na
ERR
Error Register:
ICRC shall be set to one if an interface CRC error has occurred during an Ultra DMA data transfer.
The content of this bit is not applicable for Multiword DMA transfers.
UNC shall be set to one if data is uncorrectable.
IDNF shall be set to one if a user-accessible address could not be found.
LBA Low, LBA Mid, LBA High, and Device Registers shall be written with the address of first unrecoverable error.
Status Register:
BSY shall be cleared to zero indicating command completion.
DRDY shall be set to one.
DF (Device Fault) shall be set to one if a device fault has occurred.
DRQ shall be cleared to zero
ERR shall be set to one if an Error register bit is set to one.
Prerequisites:
DRDY set to one. The host shall initialize the DMA channel.
Description:
The READ DMA command allows the host to read data using the DMA data transfer protocol.
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6.10 Read Multiple C4h
Table 30: Read Multiple Command Inputs
Register
7
6
5
4
Features
3
1
0
Na
Sector Count
Sector Count
LBA Low
LBA(7:0)
LBA Mid
LBA(15:8)
LBA High
LBA(23:16)
Device
2
Obs
Na
Obs
DEV
Command
LBA(27:24)
C4h
Sector Count Register:
Number of sectors to be transferred, a value of 00h specifies that 256 sectors are to be transferred.
LBA Low Register: Starting LBA bits (7:0).
LBA Mid Register: Starting LBA bits (15:8).
LBA High Register: Starting LBA bits (23:16).
Device Register:
DEV shall specify the selected device.
Bits (3:0) starting LBA bits (27:24).
Table 31: Read Multiple Normal Outputs
Register
7
6
5
4
3
Error
Na
Sector Count
Na
LBA Low
Na
LBA Mid
Na
LBA High
Na
Device
Obs
Na
Obs
DEV
Status
BSY
DRDY
DF
Na
2
1
0
Na
ERR
Na
DRQ
Na
Device Register:
DEV shall specify the selected device.
Status Register:
BSY shall be cleared to zero indicating command completion.
DRDY shall be set to one.
DF (Device Fault) shall be cleared to zero.
DRQ shall be cleared to zero
ERR shall be cleared to zero.
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Error Outputs:
An unrecoverable error encountered during the execution of this command results in the termination of the
command. The Command Block registers contain the address of the sector where the first unrecoverable
error occurred. The amount of data transferred is indeterminate.
Table 32: Read Multiple Error Outputs
Register
Error
7
6
5
4
3
2
1
0
Na
UNC
MC
IDNF
MCR
ABRT
NM
Obs
Sector Count
Na
LBA Low
LBA(7:0)
LBA Mid
LBA(15:8)
LBA High
LBA(23:16)
Device
Obs
Na
Obs
Na
Status
BSY
DRDY
DF
Na
LBA(27:24)
DRQ
Na
Na
ERR
Error Register:
UNC shall be set to one if data is uncorrectable.
IDNF shall be set to one if a user-accessible address is requested could not be found.
LBA Low, LBA Mid, LBA High, and Device Registers shall be written with the address of first unrecoverable error.
Status Register:
BSY shall be cleared to zero indicating command completion.
DRDY shall be set to one.
DF (Device Fault) shall be set to one if a device fault has occurred.
DRQ shall be cleared to zero
ERR shall be set to one if an Error register bit is set to one.
Prerequisites:
DRDY set to one.
Description:
This command reads the number of sectors specified in the Sector Count Register. The number of sectors
per block is defined by the content of word 59 in the IDENTIFY DEVICE response.
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6.11 Read Sectors 20h or 21h
Table 33: Read Sector Command Inputs
Register
7
6
5
4
Features
3
1
0
Na
Sector Count
Sector Count
LBA Low
LBA(7:0)
LBA Mid
LBA(15:8)
LBA High
LBA(23:16)
Device
2
Obs
Na
Obs
DEV
Command
LBA(27:24)
20h
Sector Count Register:
Number of sectors to be transferred, a value of 00h specifies that 256 sectors are to be transferred.
LBA Low Register: Starting LBA bits (7:0).
LBA Mid Register: Starting LBA bits (15:8).
LBA High Register: Starting LBA bits (23:16).
Device Register:
DEV shall specify the selected device.
Bits (3:0) starting LBA bits (27:24).
Table 34: Normal Outputs
Register
7
6
5
4
3
Error
Na
Sector Count
Na
LBA Low
Na
LBA Mid
Na
LBA High
Na
Device
Obs
Na
Obs
DEV
Status
BSY
DRDY
DF
Na
2
1
0
Na
ERR
Na
DRQ
Na
Device Register:
DEV shall specify the selected device.
Status Register:
BSY shall be cleared to zero indicating command completion.
DRDY shall be set to one.
DF (Device Fault) shall be cleared to zero.
DRQ shall be cleared to zero
ERR shall be cleared to zero.
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Error Outputs:
An unrecoverable error encountered during the execution of this command results in the termination of the
command. The Command Block registers contain the address of the sector where the first unrecoverable
error occurred. The amount of data transferred is indeterminate.
Table 35: Read Sector Error Outputs
Register
Error
7
6
5
4
3
2
1
0
Na
UNC
MC
IDNF
MCR
ABRT
NM
Obs
Sector Count
Na
LBA Low
LBA(7:0)
LBA Mid
LBA(15:8)
LBA High
LBA(23:16)
Device
Obs
Na
Obs
Na
Status
BSY
DRDY
DF
Na
LBA(27:24)
DRQ
Na
Na
ERR
Error Register:
UNC shall be set to one if data is uncorrectable.
IDNF shall be set to one if a user-accessible address is requested could not be found.
LBA Low, LBA Mid, LBA High, and Device Registers shall be written with the address of first unrecoverable error.
Status Register:
BSY shall be cleared to zero indicating command completion.
DRDY shall be set to one.
DF (Device Fault) shall be set to one if a device fault has occurred.
DRQ shall be cleared to zero
ERR shall be set to one if an Error register bit is set to one.
Prerequisites:
DRDY set to one.
Description:
This command reads from 1 to 256 sectors as specified in the Sector Count Register. A sector count value of
0 requests 256 sectors. This transfer shall begin at the sector specified in the LBA Low, LBA Mid, LBA High,
and Device Registers. The DRQ bit is always set to one prior to data transfer regardless of the presence or
absence of an error condition. The device shall interrupt for each DRQ block transferred.
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6.12 Read Verify Sectors 40h
Table 36 Read Verify Sectors Command Inputs
Register
7
6
5
4
Features
3
1
0
Na
Sector Count
Sector Count
LBA Low
LBA(7:0)
LBA Mid
LBA(15:8)
LBA High
LBA(23:16)
Device
2
Obs
Na
Obs
Na
Command
LBA(27:24)
40h
Sector Count Register:
Number of sectors to be transferred, a value of 00h specifies that 256 sectors are to be transferred.
LBA Low Register: Starting LBA bits (7:0).
LBA Mid Register: Starting LBA bits (15:8).
LBA High Register: Starting LBA bits (23:16).
Device Register:
The LBA bit shall be set to one to specify the address is an LBA.
DEV shall specify the selected device.
Bits (3:0) starting LBA bits (27:24)
Normal Outputs:
Table 37: Read Verify Sector Normal Outputs
Register
7
6
5
4
3
Error
Na
Sector Count
Na
LBA Low
Na
LBA Mid
Na
LBA High
Na
Device
Obs
Na
Obs
DEV
Status
BSY
DRDY
DF
Na
2
1
0
Na
ERR
Na
DRQ
Na
Device Register:
DEV shall specify the selected device.
Status Register:
BSY shall be cleared to zero indicating command completion.
DRDY shall be set to one.
DF (Device Fault) shall be cleared to zero.
DRQ shall be cleared to zero
ERR shall be cleared to zero.
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Error Outputs:
An unrecoverable error encountered during the execution of this command results in the termination of the
command. The Command Block registers contain the address of the sector where the first unrecoverable
error occurred.
Table 38: Read Verify Sector Error Outputs
Register
Error
7
6
5
4
3
2
1
0
Na
UNC
MC
IDNF
MCR
ABRT
NM
Obs
Sector Count
Na
LBA Low
LBA(7:0)
LBA Mid
LBA(15:8)
LBA High
LBA(23:16)
Device
Obs
Na
Obs
Na
Status
BSY
DRDY
DF
Na
LBA(27:24)
DRQ
Na
Na
ERR
Error Register:
UNC shall be set to one if data is uncorrectable.
IDNF shall be set to one if a user-accessible address could not be found.
LBA Low, LBA Mid, LBA High, and Device Registers shall be written with the address of first unrecoverable error.
Status Register:
BSY shall be cleared to zero indicating command completion.
DRDY shall be set to one.
DF (Device Fault) shall be set to one if a device fault has occurred.
DRQ shall be cleared to zero.
ERR shall be set to one if an Error register bit is set to one.
Prerequisites:
DRDY set to one.
Description:
This command is identical to the READ SECTOR(s) command, except that the device shall have read the
data from the SSD, the DRQ bit is never set to one, and no data is transferred to the host.
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6.13 Recalibrate 10h
The current drive performs no processing if it receives this command. It is supported for backward compatibility with
previous devices.
6.14 Security Disable Password F6h
Disables any previously set User password and cancels the lock. The host transfers 512 bytes of data, as shown in
the following table, to the drive. The transferred data contains a user or Master password, which the drive compares
with the saved password. If they match, the drive cancels the lock. The Master password is still saved. It is reenabled by issuing the SECURITY SET PASSWORD command to re-set a User password.
Table 39: Security Disable Password Command Inputs
Register
7
6
5
4
Features
3
1
0
1
0
Na
ERR
Na
Sector Count
Sector Count
LBA Low
LBA(7:0)
LBA Mid
LBA(15:8)
LBA High
LBA(23:16)
Device
2
Obs
Na
Obs
Na
Command
Na
F6h
Table 40: Security Disable Password Normal Outputs
Register
7
6
5
4
3
Error
Na
Sector Count
Na
LBA Low
Na
LBA Mid
Na
LBA High
Na
Device
Obs
Na
Obs
DEV
Status
BSY
DRDY
DF
Na
2
Na
DRQ
Na
Device Register:
DEV shall indicate the selected device.
Status Register:
BSY shall be cleared to zero indicating command completion.
DRDY shall be set to one.
DF (Device Fault) shall be cleared to zero.
DRQ shall be cleared to zero.
ERR shall be cleared to zero.
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6.42.6 Error outputs
The device shall return command aborted if the command is not supported, the device is in Locked Mode, or the
device is in Frozen Mode.
Table 41: Security Disable Password Error Outputs
Register
Error
7
6
5
4
3
2
1
0
Na
Na
Na
Na
Na
ABRT
Na
Na
Na
ERR
Sector Count
Na
LBA Low
Na
LBA Mid
Na
LBA High
Na
Device
Obs
Na
Obs
Na
Status
BSY
DRDY
DF
Na
Na
DRQ
Na
Error Register:
ABRT shall be set to one if this command is not supported. ABRT may be set to one if the device is not able
to complete the action requested by the command.
Device Register:
DEV shall indicate the selected device.
Status Register:
BSY shall be cleared to zero indicating command completion.
DRDY shall be set to one.
DF (Device Fault) shall be set to one if a device fault has occurred.
DRQ shall be cleared to zero.
ERR shall be set to one if an Error register bit is set to one.
Prerequisites:
DRDY set to one. Device shall be in Unlocked Mode.
Description:
The SECURITY DISABLE PASSWORD command transfers 512 bytes of data from the host. Table 37
defines the content of this information. If the password selected by word 0 matches the password previously
saved by the device, the device shall disable the Lock mode. This command shall not change the Master
password. The Master password shall be reactivated when a User password is set.
Security password content
Word
0
1-16
17-255
Content
Control Word
Bit 0 Identifier
0=compare User password
1=compare Master password
Bit (15:1)
Reserved
Password (32 Bytes)
Reserved
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6.15 Security Set Password F1h
This command transfers 512 bytes of data from the host with the contents as defined by Table 45. The data
transferred controls the function of this command. Table 46 defines the interaction of the identifier and security level
bits.
Table 42: Security Set Password Command Inputs
Register
7
6
5
4
3
Features
Na
Sector Count
Na
LBA Low
Na
LBA Mid
Na
LBA High
Na
Device
Obs
Na
Obs
2
Na
Command
1
0
1
0
Na
ERR
Na
F1h
Table 43: Security Set Password Normal Outputs
Register
7
6
5
4
3
Error
Na
Sector Count
Na
LBA Low
Na
LBA Mid
Na
LBA High
Na
Device
Obs
Na
Obs
DEV
Status
BSY
DRDY
DF
Na
2
Na
DRQ
Na
Device Register:
DEV shall indicate the selected device.
Status Register:
BSY shall be cleared to zero indicating command completion.
DRDY shall be set to one.
DF (Device Fault) shall be cleared to zero.
DRQ shall be cleared to zero.
ERR shall be cleared to zero.
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6.42.6 Error outputs
The device shall return command aborted if the command is not supported, the device is in Locked Mode, or the
device is in Frozen Mode.
Table 44: Security Set Password Error Outputs
Register
Error
7
6
5
4
3
2
1
0
Na
Na
Na
Na
Na
ABRT
Na
Na
Na
ERR
Sector Count
Na
LBA Low
Na
LBA Mid
Na
LBA High
Na
Device
Obs
Na
Obs
DEV
Status
BSY
DRDY
DF
Na
Na
DRQ
Na
Error Register:
ABRT shall be set to one if this command is not supported. ABRT may be set to one if the device is not able
to complete the action requested by the command.
Device Register:
DEV shall indicate the selected device.
Status Register:
BSY shall be cleared to zero indicating command completion.
DRDY shall be set to one.
DF (Device Fault) shall be set to one if a device fault has occurred.
DRQ shall be cleared to zero.
ERR shall be set to one if an Error register bit is set to one.
Prerequisites:
DRDY set to one.
Table 45: Security set password content
Word
0
1-16
17-255
Content
Control Word
Bit 0 Identifier
0=set User password
1=set Master password
Bit (7:1)
Reserved
Bit 8
0 = High
1 = Low
Password (32 Bytes)
Reserved
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Identifier
User
User
Master
Rev.: 1.2
Table 46: Security Set Password security level bit interaction
Level
Command Result
High
The password supplied with the command shall be saved as the new
User password. The Lock Mode shall be enabled from the next poweron or hardware reset. The device shall then be unlocked by either the
User password or the previously set Master password.
Maximum
The password supplied with the command shall be saved as the new
User password. The lock mode shall be enabled from the next power-on
or hardware reset. The device shall then be unlocked by only the User
password. The Master password previously set is still stored in the
device but will not unlock the device.
High or
This combination shell set a Master password but shall not enable or
Maximum
disable the lock mode. The security level is not changed. Master
password revision code set to the value in Master Password Revision
Code field.
6.16 Security Erase Unit F4h
The Security Erase command overwrites all user sectors if prerequisites are met.
Table 47: Security Erase Unit Command Inputs
Register
7
6
5
4
3
Features
Na
Sector Count
Na
LBA Low
Na
LBA Mid
Na
LBA High
Na
Device
Obs
Na
Obs
2
Na
Command
1
0
1
0
Na
ERR
Na
F4h
Table 48: Security Erase Unit Normal Outputs
Register
7
6
5
4
3
Error
Na
Sector Count
Na
LBA Low
Na
LBA Mid
Na
LBA High
Na
Device
Obs
Na
Obs
DEV
Status
BSY
DRDY
DF
Na
2
Na
DRQ
Na
Device Register:
DEV shall indicate the selected device.
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Status Register:
BSY shall be cleared to zero indicating command completion.
DRDY shall be set to one.
DF (Device Fault) shall be cleared to zero.
DRQ shall be cleared to zero.
ERR shall be cleared to zero.
6.42.6 Error outputs
The device shall return command aborted if the device is in Frozen Mode, not preceded by a SECURITY ERASE
PREPARE command or if the data area is not successfully overwritten.
Table 49: Security Erase Unit Error Outputs
Register
Error
7
6
5
4
3
2
1
0
Na
Na
Na
Na
Na
ABRT
Na
Na
Na
ERR
Sector Count
Na
LBA Low
Na
LBA Mid
Na
LBA High
Na
Device
Obs
Na
Obs
Na
Status
BSY
DRDY
DF
Na
Na
DRQ
Na
Error Register:
The device shall return command aborted if the device is in Frozen Mode, not preceded by a SECURITY
ERASE PREPARE command or if the data area is not successfully overwritten. ABRT may be set to one if
the device is not able to complete the action requested by the command.
Device Register:
DEV shall indicate the selected device.
Status Register:
BSY shall be cleared to zero indicating command completion.
DRDY shall be set to one.
DF (Device Fault) shall be set to one if a device fault has occurred.
DRQ shall be cleared to zero.
ERR shall be set to one if an Error register bit is set to one.
Prerequisites:
DRDY set to one. Device shall be in Unlocked Mode.
Description:
This Command transfers 512 Bytes of data from the host. Table TBD defines the content of this information.
If the password does not match the password previously saved by the device, the device shall reject the
command with command aborted.
The SECURITY ERASE PREPARE command shall be completed immediately prior to the SECURITY
ERASE UNIT Command.
This command shall disable the device lock mode. However, the Master password shall still be stored
internally within the device and may be reactivated later if a new user password is set.
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When Normal Erase mode is specified, the SECURITY ERASE UNIT command shall write binary zeros to all
user data areas. The Enhanced Erase mode is optional. When the Enhanced Erase Mode is specified, the
device shall write predetermined data patterns to all user areas. In Enhanced Erase mode, all previously
written user data shall be over written, including sectors that are no longer in use due to reallocation.
Table 50: Security Erase Unit password content
Word
0
Content
Control Word
Bit 0 Identifier
0=compare User password
1=compare Master password
Bit 1 Erase Mode
1-16
17-255
0 = Normal Erase
1 = Enhanced Erase
Bit (15:2)
Reserved
Password (32 Bytes)
Reserved
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6.17 Security Erase Prepare F3h
This command shall be issued immediately before the Security Erase Unit command to enable erasing and
unlocking. This command prevents accidental loss of data on the drive.
Table 51: Security Erase Prepare Command Inputs
Register
7
6
5
4
3
Features
Na
Sector Count
Na
LBA Low
Na
LBA Mid
Na
LBA High
Na
Device
Obs
Na
Obs
2
DEV
Command
1
0
Na
F3h
Device Register:
DEV shall specify the selected device.
Table 52: Security Erase Prepare Command Normal Outputs
Register
7
6
5
4
3
Error
Na
Sector Count
Na
LBA Low
Na
LBA Mid
Na
LBA High
Na
Device
Obs
Na
Obs
DEV
Status
BSY
DRDY
DF
Na
2
1
0
Na
ERR
Na
DRQ
Na
Device Register:
DEV shall indicate the selected device.
Status Register:
BSY shall be cleared to zero indicating command completion.
DRDY shall be set to one.
DF (Device Fault) shall be cleared to zero.
DRQ shall be cleared to zero.
ERR shall be cleared to zero.
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Error Outputs:
The device shall return command aborted if the command is not supported or the device is in Frozen Mode.
Table 53: Security Erase Prepare Error Outputs
Register
Error
7
6
5
4
3
2
1
0
Na
Na
Na
Na
Na
ABRT
Na
Na
Na
ERR
Sector Count
Na
LBA Low
Na
LBA Mid
Na
LBA High
Na
Device
Obs
Na
Obs
DEV
Status
BSY
DRDY
DF
Na
Na
DRQ
Na
Error Register:
ABRT shall be set to one if this command is not supported or device is in Frozen Mode. ABRT may be set to
one if the device is not able to complete the action requested by the command.
Device Register:
DEV shall indicate the selected device.
Status Register:
BSY shall be cleared to zero indicating command completion.
DRDY shall be set to one.
DF (Device Fault) shall be set to one if a device fault has occurred.
DRQ shall be cleared to zero.
ERR shall be set to one if an Error register bit is set to one.
Prerequisites:
DRDY set to one.
Description:
The SECURITY ERASE PREPARE command shall be issued immediately before the SECURITY ERASE
UNIT command to enable device erasing and unlocking. This command prevents accidental loss of data on
the device.
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6.18 Security Unlock F2h
This command shall be issued immediately before the Security Erase Unit command to enable erasing and
unlocking. This command prevents accidental loss of data on the drive.
Table 54: Security Unlock Command Inputs
Register
7
6
5
4
3
Features
Na
Sector Count
Na
LBA Low
Na
LBA Mid
Na
LBA High
Na
Device
Obs
Na
Obs
2
DEV
Command
1
0
1
0
Na
ERR
Na
F2h
Device Register:
DEV shall specify the selected device.
Table 55: Security Unlock Command Normal Outputs
Register
7
6
5
4
3
Error
Na
Sector Count
Na
LBA Low
Na
LBA Mid
Na
LBA High
Na
Device
Obs
Na
Obs
DEV
Status
BSY
DRDY
DF
Na
2
Na
DRQ
Na
Device Register:
DEV shall indicate the selected device.
Status Register:
BSY shall be cleared to zero indicating command completion.
DRDY shall be set to one.
DF (Device Fault) shall be cleared to zero.
DRQ shall be cleared to zero.
ERR shall be cleared to zero.
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Error outputs:
The device shall return command aborted if the device is in Frozen Mode.
Table 56: Security Unlock Error Outputs
Register
Error
7
6
5
4
3
2
1
0
Na
Na
Na
Na
Na
ABRT
Na
Na
Na
ERR
Sector Count
Na
LBA Low
Na
LBA Mid
Na
LBA High
Na
Device
Obs
Na
Obs
DEV
Command
BSY
DRDY
DF
Na
Na
DRQ
Na
Error Register:
ABRT shall be set to one if this command is not supported or device is in Frozen Mode. ABRT may be set to
one if the device is not able to complete the action requested by the command.
Device Register:
DEV shall indicate the selected device.
Status Register:
BSY shall be cleared to zero indicating command completion.
DRDY shall be set to one.
DF (Device Fault) shall be set to one if a device fault has occurred.
DRQ shall be cleared to zero.
ERR shall be set to one if an Error register bit is set to one.
Prerequisites:
DRDY set to one.
Description:
This command transfers 512 Bytes of Data from the host. Table TBD defines the content of this information.
If the identifier bit is set to master and the device is in high security level, then the password supplied shall be
compared with the stored Master Password. If the device is in maximum security mode, the Unlock Request
shall be rejected.
If the identifier bit is set to user, the device will compare the supplied password with the stored user
password. If the password compare fails, the device will return command aborted to the host and decrement
the unlock counter. This counter will be set initially to 5, and decremented for each password mismatch that
occurs. Once the counter reaches zero, a Security Unlock or Security Erase Unit command sequence shall
be command aborted until a hardware reset or power-on reset. Security Unlock commands issued when a
device is unlocked have no effect on the unlock counter.
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6.19 Security Freeze Lock F5h
This command shall be issued immediately before the Security Erase Unit command to enable erasing and
unlocking. This command prevents accidental loss of data on the drive.
Table 57: Security Freeze Lock Command Inputs
Register
7
6
5
4
3
Features
Na
Sector Count
Na
LBA Low
Na
LBA Mid
Na
LBA High
Na
Device
Obs
Na
Obs
2
DEV
Command
1
0
1
0
Na
ERR
Na
F2h
Device Register:
DEV shall specify the selected device.
Table 58: Security Freeze Lock Command Normal Outputs
Register
7
6
5
4
3
Error
Na
Sector Count
Na
LBA Low
Na
LBA Mid
Na
LBA High
Na
Device
Obs
Na
Obs
DEV
Status
BSY
DRDY
DF
Na
2
Na
DRQ
Na
Device Register:
DEV shall indicate the selected device.
Status Register:
BSY shall be cleared to zero indicating command completion.
DRDY shall be set to one.
DF (Device Fault) shall be cleared to zero.
DRQ shall be cleared to zero.
ERR shall be cleared to zero.
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Error Outputs:
The device shall return command aborted if the device is in Frozen Mode.
Table 59: Security Freeze Lock Error Outputs
Register
Error
7
6
5
4
3
2
1
0
Na
Na
Na
Na
Na
ABRT
Na
Na
Na
ERR
Sector Count
Na
LBA Low
Na
LBA Mid
Na
LBA High
Na
Device
Obs
Na
Obs
DEV
Status
BSY
DRDY
DF
Na
Na
DRQ
Na
Error Register:
ABRT shall be set to one if this command is not supported or device is in Frozen Mode. ABRT may be set to
one if the device is not able to complete the action requested by the command.
Device Register:
DEV shall indicate the selected device.
Status Register:
BSY shall be cleared to zero indicating command completion.
DRDY shall be set to one.
DF (Device Fault) shall be set to one if a device fault has occurred.
DRQ shall be cleared to zero.
ERR shall be set to one if an Error register bit is set to one.
Prerequisites:
DRDY set to one.
Description:
The Security Freeze Lock command sets the device into frozen mode. After command completion, any other
commands that update the device lock will be returned command aborted. Frozen Mode is disabled by
hardware reset or a power-on reset. If Security Freeze Lock is issued while the device is in Frozen Mode, the
command executes and the device remains in frozen mode.
6.20 Seek 7xh
This command is effectively a NOP command to the device although it does perform a range check.
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6.21 Set Features EFh
This command sets parameter in the Feature Register and set the drives operation. For SATA transfer mode,
command is written to Sector Count Register.
Value
02h
03h
05h
10h
55h
66h
82h
90h
AAh
CCh
Table 60: Set Features Register value and associated mode
Function
Enable volatile write cache
Set Transfer Mode
Enable APM feature set
Enable use of SATA features
Disable read look-ahead feature
Disable reverting to Power-On-Defaults by soft reset
Disable volatile write cache
Disable SATA features
Enable read look-ahead feature
Enable reverting to power-on defaults
Specific SATA features written to Sector Count Register
Sector Count Value
01h
02h
03h
04h
05h
06h
Table 61: SATA features value and feature description
Description
Not Supported – Non-Zero buffer offset in DMA Setup FIS
DMA Setup FIS Auto-Active optimization
Device-Initiated interface power state transitions
Not Supported – Guaranteed In Order Data Delivery
Not Supported – Asynchronous Notification
Software Settings Preservation
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6.22 Set Multiple Mode C6h
If the content of the Sector Count Register is not zero, then the Sector Count Register contains the number of sectors
per block for the device to be used on all following READ/WRITE MULTIPLE commands. The content of the Sector
Count Register shall be less than or equal to the value in bits (7:0) in word 47 in the IDENTIFY DEVICE information.
The host should set the content of the Sector Count register to 1.
Table 62: Set Multiple Mode Command Inputs
Register
7
6
5
4
Features
3
1
0
Na
Na
Na
Na
Sector Count
Sector per block
LBA Low
Na
LBA Mid
Na
LBA High
Na
Device
2
Obs
Na
Obs
DEV
Command
Na
C6h
Table 63: Set Multiple Mode Normal Outputs
Register
7
6
5
4
Error
Na
Sector Count
Na
LBA Low
Na
LBA Mid
Na
LBA High
Na
3
2
1
0
Device
Obs
Na
Obs
DEV
Na
Na
Na
Na
Status
BSY
DRDY
DF
Na
DRQ
Na
Na
ERR
Device Register:
DEV shall specify the selected device.
Status Register:
BSY shall be cleared to zero indicating command completion.
DRDY shall be set to one.
DF (Device Fault) shall be cleared to zero.
DRQ shall be cleared to zero
ERR shall be cleared to zero.
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Table 64: Set Multiple Mode Error Outputs
Register
Error
7
6
5
4
3
2
1
0
Na
Na
Obs
Na
Na
ABRT
Na
Na
Sector Count
Na
LBA Low
Na
LBA Mid
Na
LBA High
Na
Device
Obs
Na
Obs
DEV
Na
Na
Na
Na
Status
BSY
DRDY
DF
Na
DRQ
Na
Na
ERR
Status Register:
BSY shall be cleared to zero indicating command completion.
DRDY shall be set to one.
DF (Device Fault) shall be set to one if a device fault has occurred.
DRQ shall be cleared to zero.
ERR shall be set to one if an Error register bit is set to one.
Prerequisites:
DRDY set to one.
Description:
This command establishes the block count for READ MULTIPLE, READ MULTI EXT, and WRITE
MULTIPLE. SSD can only support 1 sector per block.
6.23 Sleep
Table 65: Sleep Normal Command Inputs
Register
7
6
5
4
Features
Na
Sector Count
Na
LBA Low
Na
LBA Mid
Na
LBA High
Na
Device
Obs
Na
Command
Obs
DEV
3
2
1
0
Na
Na
Na
Na
E6h
Device Register:
DEV shall specify the selected device.
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Normal Outputs:
Table 66: Sleep Normal Outputs
Register
7
6
5
4
Error
Na
Sector Count
Na
LBA Low
Na
LBA Mid
Na
LBA High
Na
3
2
1
0
Device
Obs
Na
Obs
DEV
Na
Na
Na
Na
Status
BSY
DRDY
DF
Na
DRQ
Na
Na
ERR
Device Register:
DEV shall specify the selected device.
Status Register:
BSY shall be cleared to zero indicating command completion.
DRDY shall be set to one.
DF (Device Fault) shall be cleared to zero.
DRQ shall be cleared to zero
ERR shall be cleared to zero.
Table 67: Sleep Error Outputs
Register
Error
7
6
5
4
3
2
1
0
Na
Na
Na
Na
Na
ABRT
Na
Na
Sector Count
Na
LBA Low
Na
LBA Mid
Na
LBA High
Na
Device
Obs
Na
Obs
DEV
Na
Na
Na
Na
Status
BSY
DRDY
DF
Na
DRQ
Na
Na
ERR
Status Register:
BSY shall be cleared to zero indicating command completion.
DRDY shall be set to one.
DF (Device Fault) shall be set to one if a device fault has occurred.
DRQ shall be cleared to zero.
ERR shall be set to one if an Error register bit is set to one.
Prerequisites:
DRDY set to one.
Description:
This command is the only way to cause the device to enter Sleep mode.
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6.24 Smart B0h
Individual SMART commands are identified by the value placed in the Feature register.
Value
D0h
D1h
D2h
6.24.1
D3h
D8h
D9h
Command
SMART Read Data
READ ATTRIBUTE THRESHOLDS
ENABLE/DISABLE ATTRIBUTE
AUTOSAVE
SAVE ATTRIBUTE VALUES
SMART OPERATIONS
SMART OPERATIONS
E9h
EAh
EBh
ECC Fail Record
Average Erase Count, Max Erase Count
Good Block Count, System Block Count
Smart Read Data (B0h - D0h)
Table 68: SMART Read Data Command Inputs
Register
7
6
5
4
Features
D0h
Sector Count
Na
LBA Low
Na
LBA Mid
4Fh
LBA High
C2h
Device
Obs
Na
Command
Obs
DEV
3
2
1
0
Na
Na
Na
Na
B0h
Device Register:
DEV shall specify the selected device.
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Normal Outputs:
Table 69: SMART Read Data Normal Outputs
Register
7
6
5
4
Error
Na
Sector Count
Na
LBA Low
Na
LBA Mid
Na
LBA High
Na
3
2
1
0
Device
Obs
Na
Obs
DEV
Na
Na
Na
Na
Status
BSY
DRDY
DF
Na
DQ
Na
Na
ERR
Device Register:
DEV shall indicate the selected device.
Table 70: SMART Read Data Command Data Structure
Byte
Description
0-1
Data structure revision number
2-13
1st attribute data
14-361
2nd-30th Individual attribute data
362
Off-line data collection status
363
Self-test execution status
364-365
Total time in seconds to complete off-line data collection
366
Reserved
367
Off-line data collection capability
368-369
SMART capability
370
Error logging capability
371
Self-test Failure Checkpoint
372
Short self-test routine recommended polling time(in minutes)
373
Extended self-test routine recommended polling time(in
minutes)
374-510
Reserved
511
Data structure Checksum
Byte
0
1-2
3
4
5-10
11
Table 71: Bytes 2-361 Individual Attribute Data
Description
Attribute ID
Status Flag
Attribute Value
Worst Ever normalized Attribute Value
Raw Attribute Value
Reserved
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ID
01h
02h
03h
05h
07h
08h
09h
0Ah
0Ch
A8h
AAh
ADh
AFh
C0h
C2h
C5h
Foh
Rev.: 1.2
Table 72: Attribute ID
Description
Read Error Rate
Throughput Performance
Spin Up Time
Reallocated Sector Count
Seek Error Rate
Seek Time performance
Power-On hours Count
Spin Retry Count
Drive Power Cycle Count
SATA PHY Error Count
Bad Block Count
Erase Count
Bad Cluster Table Count
Unexpected Power Loss Count
Temperature
Current Pending Sector Count
Write Head
Status Register:
BSY shall be cleared to zero indicating command completion.
DRDY shall be set to one.
DF (Device Fault) shall be cleared to zero.
DRQ shall be cleared to zero
ERR shall be cleared to zero.
Prerequisites:
DRDY set to one. SMART enabled.
Vendor Specific SMART Command Description:
ID(Hex)
E9
EA
EB
Description
ECC Fail Record
Average Erase Count, Max Erase
Count
Good Block Count, System Block
Count
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Byte
0
Table 73: ECC Fail Record Data Structure E9h
Function
Description
ECC fail number
When failure bit is bigger than “ECC Fail
number”, this block will be marked as Bad
Block.
1
Row address 3
Flash Block Address
2
Row address 2
Flash Block Address
3
Row address 1
Flash Block Address
4
Channel number of last ECC fail
NA
5
Bank number of last ECC fail
NA
6
Reserved
NA
7
Reserved
NA
Byte
0
Table 74: Average Erase Count Data Structure EAh
Function
Description
Average erase count of all blocks.
Average Erase Count (High Byte)
1
Average Erase Count
2
Average Erase Count (Low Byte)
3
Max Erase Count (High Byte)
4
Max Erase Count
5
Max Erase Count (Low Byte)
6
Reserved
NA
7
Reserved
NA
Byte
0
Table 75: Good and System Block Count Data Structure
Description
Total used blocks of SSD
Good Block Count (High Byte)
1
Good Block Count
2
3
Good Block Count (Low Byte)
System(Free) Byte) Block
Count
(High
4
System(Free) Byte) Block
(Low
5
Reserved
NA
6
Reserved
NA
7
Reserved
NA
Rev.: 1.2
Indicate a block which’s erase count is
the largest.
Function
Count
Free
block of
SSD. Free
block has to be bigger than 20. When
the free block count is less than 20, the
SSD will be locked.
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6.24.2
Rev.: 1.2
Smart Enable Operations (B0h - D8h)
Table 76: SMART Enable Command Inputs
Register
7
6
5
4
Features
D8
Sector Count
Na
LBA Low
Na
LBA Mid
4Fh
LBA High
C2h
Device
Obs
Na
Command
Obs
DEV
3
2
1
0
Na
Na
Na
Na
B0h
Device Register:
DEV shall specify the selected device.
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Normal Outputs:
Table 77: SMART Enable Normal Outputs
Register
7
6
5
4
Error
Na
Sector Count
Na
LBA Low
Na
LBA Mid
Na
LBA High
Na
3
2
1
0
Device
Obs
Na
Obs
DEV
Na
Na
Na
Na
Status
BSY
DRDY
DF
Na
DRQ
Na
Na
ERR
Device Register:
DEV shall indicate the selected device.
Status Register:
BSY shall be cleared to zero indicating command completion.
DRDY shall be set to one.
DF (Device Fault) shall be cleared to zero.
DRQ shall be cleared to zero
ERR shall be cleared to zero.
Prerequisites:
DRDY set to one.
Description:
This command enables access to all SMART capabilities within device.
6.24.3
Smart Disable Options (B0h - D9h)
Table 78: SMART Disable Command Inputs
Register
7
6
5
4
Features
D9h
Sector Count
Na
LBA Low
Na
LBA Mid
4Fh
LBA High
C2h
Device
Obs
Na
Command
Obs
DEV
3
2
1
0
Na
Na
Na
Na
B0h
Device Register:
DEV shall specify the selected device.
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Normal Outputs:
Table 79: SMART Disable Normal Outputs
Register
7
6
5
4
Features
Na
Sector Count
Na
LBA Low
Na
LBA Mid
Na
LBA High
Na
3
2
1
0
Device
Obs
Na
Obs
DEV
Na
Na
Na
Na
Status
BSY
DRDY
DF
Na
DRQ
Na
Na
ERR
Device Register:
DEV shall indicate the selected device.
Status Register:
BSY shall be cleared to zero indicating command completion.
DRDY shall be set to one.
DF (Device Fault) shall be cleared to zero.
DRQ shall be cleared to zero
ERR shall be cleared to zero.
Prerequisites:
DRDY set to one. SMART enabled.
Description:
This command disables all SMART capabilities within device.
6.24.4
SMART Read Attribute Threshold (B0h - D1h)
This returns a 512 byte Data structure to the Host.
Table 80: SMART Read Attribute Data Structure
Byte
Description
0-1
Data structure revision number
2-361
1st – 30th Individual attribute threshold
data
362-510
Reserved
511
Data structure checksum
6.24.5
SMART Enable/Disable Attribute Auto save (B0h - D2h)
This command enables and disables the optional attribute auto save feature of the device. This command may either
allow the device, after some vendor specified event, to save the device updated attributes to non-volatile memory; or
this command may cause the auto save feature to be disabled. The state of the attribute auto save feature, either
enabled or disabled, shall be preserved by the device during all power and reset events.
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A value of zero written by the host into the device’s count field before issuing this command shall cause this feature
to be disabled. Disabling this feature does not preclude the device from saving SMART data to non-volatile memory
during some other normal operation (e.g., during a power-on or power-off sequence or during an error recovery
sequence). A value of F1h written by the host into the device’s Count field before issuing this command shall cause
this feature to be enabled. Any other non-zero value written by the host into this field before issuing this command is
vendor specific. The meaning of any non-zero value written to this field at this time shall be preserved by the device
during all power and reset events.
6.25 Standby E2h
The value in the Sector Count Register when the STANDBY command is issued shall determine the time period
programmed into the Standby timer.
Table 81: Standby Command Inputs
Register
7
6
5
4
3
Features
1
0
Na
Na
Na
3
2
1
0
Na
Sector Count
Time Period Value
LBA Low
Na
LBA Mid
Na
LBA High
Na
Device
2
Obs
Na
Obs
DEV
Command
Na
E2h
Device Register:
DEV shall specify the selected device.
Table 82: Standby Normal Outputs
Register
7
6
5
4
Error
Na
Sector Count
Na
LBA Low
Na
LBA Mid
Na
LBA High
Na
Device
Obs
Na
Obs
DEV
Na
Na
Na
Na
Status
BSY
DRDY
DF
Na
DRQ
Na
Na
ERR
Device Register:
DEV shall specify the selected device.
Status Register:
BSY shall be cleared to zero indicating command completion.
DRDY shall be set to one.
DF (Device Fault) shall be cleared to zero.
DRQ shall be cleared to zero
ERR shall be cleared to zero.
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Table 83: Standby Error Outputs
Register
Error
7
6
5
4
3
2
1
0
Na
Na
Na
Na
Na
ABRT
Na
Na
Sector Count
Na
LBA Low
Na
LBA Mid
Na
LBA High
Na
Device
Obs
Na
Obs
DEV
Na
Na
Na
Na
Status
BSY
DRDY
DF
Na
DRQ
Na
Na
ERR
Error Register:
ABRT may be set to one if the device is not able to complete the action requested by the command.
Status Register:
BSY shall be cleared to zero indicating command completion.
DRDY shall be set to one.
DF (Device Fault) shall be set to one if a device fault has occurred.
DRQ shall be cleared to zero.
ERR shall be set to one if an Error register bit is set to one.
Prerequisites:
DRDY set to one.
Description:
This command causes the device to enter the Standby mode.
If the Sector Count Register is non-zero then Standby timer shall be enabled. The value in the Sector Count
Register shall be used determine the time programmed into the Standby timer. If the Sector Count Register
is zero then the Standby timer is disabled.
6.26 Standby Immediate E0h
Table 84: Standby Immediate Command Inputs
Register
7
6
5
4
Features
Na
Sector Count
Na
LBA Low
Na
LBA Mid
Na
LBA High
Na
Device
Obs
Na
Command
Obs
DEV
3
2
1
0
Na
Na
Na
Na
E0h
Device Register:
DEV shall specify the selected device.
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Table 85: Standby Immediate Normal Outputs
Register
7
6
5
4
Error
Na
Sector Count
Na
LBA Low
Na
LBA Mid
Na
LBA High
Na
3
2
1
0
Device
Obs
Na
Obs
DEV
Na
Na
Na
Na
Status
BSY
DRDY
DF
Na
DRQ
Na
Na
ERR
Device Register:
DEV shall specify the selected device.
Status Register:
BSY shall be cleared to zero indicating command completion.
DRDY shall be set to one.
DF (Device Fault) shall be cleared to zero.
DRQ shall be cleared to zero
ERR shall be cleared to zero.
Table 86: Standby Immediate Error Outputs
Register
Error
7
6
5
4
3
2
1
0
Na
Na
Na
Na
Na
ABRT
Na
Na
Sector Count
Na
LBA Low
Na
LBA Mid
Na
LBA High
Na
Device
Obs
Na
Obs
DEV
Na
Na
Na
Na
Status
BSY
DRDY
DF
Na
DRQ
Na
Na
ERR
Error Register:
ABRT may be set to one if the device is not able to complete the action requested by the command.
Status Register:
BSY shall be cleared to zero indicating command completion.
DRDY shall be set to one.
DF (Device Fault) shall be set to one if a device fault has occurred.
DRQ shall be cleared to zero.
ERR shall be set to one if an Error register bit is set to one.
Prerequisites:
DRDY set to one.
Description:
This command causes the device to immediately enter the Standby mode.
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6.27 Write DMA CAh or CBh
The LBA Low, LBA Mid, LBA High, and Device Registers specify the starting sector address to be written. The Sector
Count Register specifies the number of sectors to be transferred.
Table 87: Write DMA Command Inputs
Register
7
6
5
4
3
Features
1
0
Na
Sector Count
Sector Count
LBA Low
LBA(7:0)
LBA Mid
LBA(15:8)
LBA High
LBA(23:16)
Device
2
Obs
LBA
Obs
DEV
Command
LBA(27:24)
CAh
Sector Count Register:
Number of sectors to be transferred, a value of 00h specifies that 256 sectors shall be transferred.
Device Register:
The LBA bit shall be set to one to specify the address is an LBA.
DEV shall specify the selected device. Bits (3:0) starting LBA bits (27:24).
Normal Outputs:
Table 88: Write DMA Normal Outputs
Register
7
6
5
4
Error
Na
Sector Count
Na
LBA Low
Na
LBA Mid
Na
LBA High
Na
3
2
1
0
Device
Obs
Na
Obs
DEV
Na
Na
Na
Na
Status
BSY
DRDY
DF
Na
DRQ
Na
Na
ERR
Device Register:
DEV shall specify the selected device.
Status Register:
BSY shall be cleared to zero indicating command completion.
DRDY shall be set to one.
DF (Device Fault) shall be cleared to zero.
DRQ shall be cleared to zero
ERR shall be cleared to zero.
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Table 89: Write DMA Error Outputs
Register
Error
7
6
5
4
3
2
1
0
ICRC
WP
MC
IDNF
MCR
ABRT
NM
Na
Sector Count
Na
LBA Low
LBA(7:0)
LBA Mid
LBA(15:8)
LBA High
LBA(23:16)
Device
Obs
Na
Obs
DEV
Status
BSY
DRDY
DF
Na
LBA(27:24)
RQ
Na
Na
ERR
Error Register:
ICRC shall be set to one if an interface CRC error has occurred during an Ultra DMA data transfer. The
content of this bit is not applicable for Multiword DMA transfers.
IDNF shall be set to one if a user-accessible address could not be found. INDF shall be set to one if an
address outside of the range of user-accessible address is requested if command aborted is not returned.
ABRT shall be set to one if an error including an ICRC error has occurred during an Ultra DMA data transfer.
LBA Low, LBA Mid, and LBA High, Device shall be written with the address of first unrecoverable error.
Status Register:
BSY shall be cleared to zero indicating command completion.
DRDY shall be set to one.
DF (Device Fault) shall be set to one if a device fault has occurred.
DRQ shall be cleared to zero.
ERR shall be set to one if an Error register bit is set to one.
Prerequisites:
DRDY set to one. The host shall initialize the DMA channel.
Description:
The Write DMA command allows the host to write data using the DMA data transfer protocol.
6.28 Write Multiple 30h
The LBA Low, LBA Mid, LBA High, and Device Registers specify the starting sector address to be written. The Sector
Count Register specifies the number of sectors to be transferred.
Table 90: Write Multiple Command Inputs
Register
7
6
5
4
Features
3
0
Sector Count
LBA Low
LBA(7:0)
LBA Mid
LBA(15:8)
LBA High
LBA(23:16)
Command
1
Na
Sector Count
Device
2
Obs
Na
Obs
Na
LBA(27:24)
30h
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Sector Count Register:
Number of sectors to be transferred, a value of 00h specifies that 256 sectors shall be transferred.
LBA Low Register: Starting LBA bits (7:0).
LBA Mid Register: Starting LBA bits (15:8).
LBA High Register: Starting LBA bits (23:16).
Device Register:
The LBA bit shall be set to one to specify the address is an LBA.
DEV shall specify the selected device. Bits (3:0) starting LBA bits (27:24).
Table 91: Write Multiple Normal Outputs
Register
7
6
5
4
Error
Na
Sector Count
Na
LBA Low
Na
LBA Mid
Na
LBA High
Na
3
2
1
0
Device
Obs
Na
Obs
DEV
Na
Na
Na
Na
Status
BSY
DRDY
DF
Na
DRQ
Na
Na
ERR
Device Register:
DEV shall specify the selected device.
Status Register:
BSY shall be cleared to zero indicating command completion.
DRDY shall be set to one.
DF (Device Fault) shall be cleared to zero.
DRQ shall be cleared to zero
ERR shall be cleared to zero.
Error Outputs:
An unrecoverable error encountered during the execution of this command results in the termination of the
command. The Command Block Registers contain the address of the sector where the first unrecoverable
error occurred. The amount of data transferred is indeterminate.
Table 92: Write Multiple Error Outputs
Register
Error
7
6
5
4
3
2
1
0
Na
WP
MC
IDNF
MCR
ABRT
NM
Na
Sector Count
Na
LBA Low
LBA(7:0)
LBA Mid
LBA(15:8)
LBA High
LBA(23:16)
Device
Obs
Na
Obs
DEV
Status
BSY
DRDY
DF
Na
LBA(27:24)
DRQ
Na
Na
ERR
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Error Register:
IDNF shall be set to one if a user-accessible address could not be found. IDNF shall be set to one if an
address outside of the range user-accessible address is requested if command aborted is not returned.
ABRT shall be set to one if an error, include an ICRC error, has occurred during an Ultra DMA data transfer.
ABRT shall be set to one if an address outside of the range of user-accessible address is requested if IDNF
is not set to one.
LBA Low, LBA Mid, LBA High, and Device Registers shall be written with the address of first unrecoverable error.
Status Register:
BSY shall be cleared to zero indicating command completion.
DRDY shall be set to one.
DF (Device Fault) shall be set to one if a device fault has occurred.
DRQ shall be cleared to zero.
ERR shall be set to one if an Error register bit is set to one.
Prerequisites:
DRDY set to one. If bit 8 of IDENTIFY DEVICE word 59 is cleared to zero, a successful SET MULTIPLE
MODE command shall precede a WRITE MULTIPLE command.
Description:
This command writes the number of sectors specified in the Sector Count Register.
The number of sectors per block is defined by the content of word 59 of the IDENTIFY DEVICE response.
When the WRITE MULTIPLE command is issued, the SECTOR Count register contains the number of
sectors (not the number of blocks) requested. The device shall interrupt for each DRQ block transferred.
IF the number of requested sectors is not evenly divisible by the block count, as many full blocks as possible
are transferred, followed by a final, partial block transfer. The partial block transfer is for n sectors, where: N
= Remainder (sector count / block count). If the WRITE MULTIPLE command is received when WRITE
MULTIPLE command is disabled, the Write Multiple operation shall be rejected with command aborted.
Device errors encountered during WRITE MULTIPLE commands are posted after the attempted device write
of the block or partial block transferred. The command ends with the sector in error, even if the error was in
the middle of a block. Subsequent blocks are not transferred in the event of an error.
The contents of the Command Block Registers following the transfer of a data block that had a sector in error
are undefined. The host should retry the transfer as individual requests to obtain valid error information.
Interrupt pending is set when the DRQ bit is set to one at the beginning of each block or partial block.
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6.29 Write Sectors 30h or 31h
The LBA Low, LBA mid, LBA High, and Device Registers specify the starting sector address to be written. The Sector
Count Register specifies the number of sectors to be transferred.
Table 93: Write Sector Command Inputs
Register
7
6
5
4
Features
3
1
0
Na
Sector Count
Sector Count
LBA Low
LBA(7:0)
LBA Mid
LBA(15:8)
LBA High
LBA(23:16)
Device
2
Obs
Na
Obs
Na
Command
LBA(27:24)
30h
Sector Count Register:
Number of sectors to be transferred, a value of 00h specifies that 256 sectors shall be transferred.
LBA Low Register: Starting LBA bits (7:0).
LBA Mid Register: Starting LBA bits (15:8).
LBA High Register: Starting LBA bits (23:16).
Device Register:
The LBA bit shall be set to one to specify the address is an LBA.
DEV shall specify the selected device. Bits (3:0) starting LBA bits (27:24).
Table 94: Write Sector Command Normal Outputs
Register
7
6
5
4
Error
Na
Sector Count
Na
LBA Low
Na
LBA Mid
Na
LBA High
Na
3
2
1
0
Device
Obs
Na
Obs
DEV
Na
Na
Na
Na
Status
BSY
DRDY
DF
Na
DRQ
Na
Na
ERR
Device Register:
DEV shall specify the selected device.
Status Register:
BSY shall be cleared to zero indicating command completion.
DRDY shall be set to one.
DF (Device Fault) shall be cleared to zero.
DRQ shall be cleared to zero
ERR shall be cleared to zero.
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Error Outputs:
An unrecoverable error encountered during the execution if this command results in the termination of the
command. The Command Block Registers contain the address of the sector where the first unrecoverable
error occurred. The amount of data transferred is indeterminate.
Table 95: Write Sector Error Outputs
Register
7
6
5
4
3
2
1
0
Error
Na
WP
MC
IDNF
MCR
ABRT
NM
Na
Sector Count
Na
LBA Low
LBA(7:0)
LBA Mid
LBA(15:8)
LBA High
LBA(23:16)
Device
Obs
Na
Obs
DEV
LBA(27:24)
Status
BSY
DRDY
DF
Na
DRQ
Na
ERR
Na
Error Register:
IDNF shall be set to one if a user-accessible address could not be found. IDNF shall be set to one if an
address outside of the range of user-accessible addresses is requested if command aborted is not returned.
ABRT shall be set to one if an error, including an ICRC error, has occurred during an Ultra DMA data
transfer. ABRT shall be set to one if the device is not able to complete the action requested by the command.
ABRT shall be set to one if an address outside of the range of user-accessible addresses is requested if
IDNF is not set to one.
LBA Low, LBA Mid, LBA High, and Device Registers shall be written with the address of first unrecoverable error.
Status Register:
BSY shall be cleared to zero indicating command completion.
DRDY shall be set to one.
DF (Device Fault) shall be set to one if a device fault has occurred.
DRQ shall be cleared to zero.
ERR shall be set to one if an Error register bit is set to one.
Prerequisites:
DRDY set to one.
Description:
This command writes from 1 to 256 sectors as specified in the Sector Count register. A sector count value of
0 requests 256 sectors. The device shall interrupt for each DRQ block transferred.
7.0 Revision Table
Date
Rev.
Page
Changes
08/24/2011
1.0
All
Specification Release
08/30/2011
1.1
2, 3
Added 64GB Capacity
10/24/2011
1.2
1
Changed TuffDisk to TuffDrive
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