Pattern Dependent Characterization of Copper Interconnect

Pattern Dependent Characterization
of Copper Interconnect
Prof. Duane Boning
Massachusetts Institute of Technology
Microsystems Technology Laboratories
http://www-mtl.mit.edu/Metrology
ICMTS Tutorial, March 2003
Duane Boning - ICMTS 2003
1
MIT-MTL
Copper Interconnect Dual Damascene Process
Deposit dielectric stack; Pattern trenches & vias
SiO2
■
Si3N4
Etch Stop
“Superfill” used to fill
narrow trenches and vias
❏ Ideally: plated surface
nearly flat
❏
Barrier deposition; copper electroplating
Cu
TaN
■
SiO2
CMP
Cu Lines
Electroplating
Copper CMP
Multistep process to
remove bulk copper and
barrier metal
❏ Ideally: polished surface
nearly flat
❏
SiO2
SiO2
Repeat for multiple levels of metal
• no loss in copper wire
thickness
• flat for next level
SiO2
Duane Boning - ICMTS 2003
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MIT-MTL
Copper Interconnect Problems
■
Polishing stages: bulk polish, barrier polish, and overpolish
Non-uniform
plating
Oxide
Evolving Surface Profile
CMP
Oxide
Field Oxide
Loss
Dishing
Erosion
Overpolish
Oxide
CMP Process and Problems
Duane Boning - ICMTS 2003
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MIT-MTL
Electroplating/CMP Characterization Methodology
Electroplating/CMP
Test Wafers
■ Plating: Measure step height,
■
Product Chip Layout
Electroplating Process
■ Fixed plating recipe
CMP Process
■ Fixed pad, slurry, process
■
settings (pressure, speed, etc)
Variable polish times
array bulge/recess and field
copper thickness
CMP: Measure dishing, erosion
and field copper thickness
Model Parameter
Extraction
Calibrated ECD Pattern
Dependent Model
Chip-Level
Simulation
Calibrated Copper
Pattern Dependent
Model
■ Plating: prediction of step height, array height,
copper thickness and local pattern density
■ CMP: prediction of clearing time, dishing and
erosion, final copper line thicknesses
Duane Boning - ICMTS 2003
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MIT-MTL
Outline
■
Background
❏
■
Pattern dependent effects in plating and CMP
Copper CMP Characterization
Polishing Length Scales
❏ Test Structure and Mask Design
❏
• Single Layer Test Structures and Mask Design
• Multilevel Test Structures and Mask Design
Measurements and Analysis
❏ Design Rule Generation
❏ Chip Scale Modeling
❏
■
Copper Electroplating Characterization
■
Conclusions
Duane Boning - ICMTS 2003
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MIT-MTL
Copper CMP Pattern Dependent Effects
Dishing
Erosion
Copper
Oxide
Sample Profilometer Scans
Erosion
0
0
−0.04
−0.08
Relative Height (um)
Relative Height (um)
−0.04
Dishing
−0.12
−0.16
Dishing
−0.2
−0.24
0
200
400
600
800
1000
Scan Length (um)
1200
1400
Line width = 1 µm
Line space = 1 µm
Duane Boning - ICMTS 2003
−0.12
−0.16
−0.2
−0.24
0
1600
Erosion
−0.08
200
400
600
800
1000
Scan Length (um)
1200
1400
1600
Line width = 9 µm
Line space = 1 µm
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MIT-MTL
Polishing Length Scales
mm Range
■
Three Polishing Length Scales:
~2mm range: copper bulk polish
❏ ~100µm range: erosion profile
❏ ~1µm range: dishing profile
❏
Initial Copper Polish
Relative Thickness (Å)
~100µm Range
Field
Oxide
Duane Boning - ICMTS 2003
~1µm Range
Barrier/Overpolish
Array Structure
Dishing
Another
Array Structure
SEM Cross Section
Scan Length (µm)
(0.5µm wide line)
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MIT-MTL
Dishing and Erosion Test Structures
Typical erosion
profilometry scan
Electrical
Measurement
Isolated Line Array Region
50mm
2mm
∆V
0.5/4.5
Isolated
Line
500mm 500mm
1.0
2mm
Dummy
Line
Region 50mm
2160mm
2200mm
1.0/2.0
∆V
Electrical
Array
Measurement
Region
Electrical Test Structure
Line width/line space mark
Physical Test Structure
Profilometry: captures surface height over long scans
❏ Electrical measurements: extract line thickness by probing
❏
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MIT-MTL
loop w/ dummy
single loop
(a)
■
50% density arra
Dishing/Erosion Array Test Structures
(b)
(c)
(d)
Three Regions:
b) Single loop: isolated line
c) Small array: loop with surrounding dummy lines
d) Large array: multiple taps along length of the array
■
Electrical Sampling:
Each tap is a Van der Pauw structure: measure resistance
❏ Uniform sampling: e.g. every 100 µm
❏ Edge sampling: place more taps near the transition region
❏
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MIT-MTL
Copper Thickness Extraction Procedure
R
E-Test
Line
Resistance
TM
R -> TM
Copper
Thickness
Extraction
Physical
Copper
Thickness
Barrier
TL
Layer
TM
W+∆W
Line Width
Correction
Copper
TL
W
Physical
Verification
Oxide
Simplified Profile
SEM+Profile+Optical
■ R is measured line resistance
■ Rs (ρ/t) is sheet resistance
■ t is the thickness of a line
■ ρ is the resistivity of copper
■ L is the length of a line
■ W is the width of a line.
■ RCu is resistance due to copper
■ RL is resistance due to liner
■ ρL is the resistivity of liner
Duane Boning - ICMTS 2003
L
R = Rs × ----W
ρ
R
L
W
or by re-arranging variables t = --- × -----
ρ Cu × L
R Cu = ---------------------------------------------------------- and
( T M – T L ) × ( W – 2T L )
ρL × L
R L = -------------------------------------------------------------------------------( 2T M × T L ) + ( ( W – 2T L ) × T L )
(2)
ρ Cu
L
T M = ---------- × -------------------------- + T L
R
( W – 2T L )
10
(1)
(3)
MIT-MTL
Additional Structures
Slotting
100µm
Area
1000µm
Cu
100µm
Oxide Fill
100µm
Cross Section
Oxide
Top Down View
Capacitance
Top Down View
Cross Sectional View
Metal 2
Metal 1
Metal 1
Metal 2
Split Combs Solid Plate
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MIT-MTL
Single Layer Mask Designs
Pitch
Structures
PITCH BLOCKS
Area
Structures
20mm
DENSITY
BLOCKS
15mm
Density
Structures
DENSITY
BLOCKS
15mm
A. First Generation Mask
(“SEMATECH 931 Mask”)
20mm
B. Second Generation Mask
■ Single-level mask: electrical and physical test structures.
■ Key pattern factors: density and pitch and/or linewidth and linespace.
■ Structure Interaction: structure size and floor planning.
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MIT-MTL
Single Layer Surface Profiles and Trends
Surface Profiles (in Å)
Isolated
Lines
Fine
Features
1.0µm/1.0µm
Lw/Ls
0
−400
500
1000
0
−400
1500
2000
Erosion
2500
Dishing
Erosion
Dishing
−800
−1200
500
1000
1500
2000
2500
0
−400
−800
Dishing
Dishing
−1200
0
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Erosion
−1200
0
Large
Features
50µm/50µm
Lw/Ls
Erosion
Dishing
−800
0
Medium
Features
5.0µm/5.0µm
Lw/Ls
Array Region
500
1000
1500
2000
Scan Distance in µm
13
2500
MIT-MTL
300 sec. Polish Time (~11% Overpolish)
1
o = Extracted
* = Physical
0.8
0.6
0.4
0.2
0
10
30
50
70
Metal Density (%)
90
Remaining Cu Thickness (µm)
Remaining Cu Thickness (µm)
Extracted and Physical Copper Thickness
1
0.8
0.6
0.4
0.2
0
270 sec. Polish Time (0% Overpolish)
10
30
50
70
90
10
30
50
70
90
330 sec. Polish Time (~22% Overpolish)
1
0.8
0.6
0.4
0.2
0
Metal Density (%)
(for fixed pitch of 5µm)
(for fixed pitch of 5µm)
Good correlation between extracted thickness and
physical data.
❏ Clear trend of total remaining thickness is shown from
the electrical data.
❏
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MIT-MTL
2500
200µm Pitch
150µm Pitch
2000
100µm Pitch
1500
50µm Pitch
1000
20µm Pitch
10µm Pitch
5µm Pitch
3µm Pitch
500
0
240
270
300
330
360
300 sec. Polish Time (~11% Overpolish)
Dishing and Erosion (Å)
Dishing (Å)
Analysis: Dishing and Erosion in Copper CMP
2500
2000
1500
o = Dishing
+ = Erosion
1000
500
0
0
50
100
150
Pitch Values (µm)
Polish Time (sec.)
(for fixed 50% metal density)
(270 = “just cleared”)
Dishing and Erosion Dependencies on Polish Time and Pitch
■ Profilometry surface scan for dishing and oxide thickness
measurement for erosion.
■ Constant dishing after initial transition for smaller pitch structures.
Duane Boning - ICMTS 2003
200
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MIT-MTL
Multilevel Process Sequence and Pattern Problems
As Dep.
Oxide Profile
Metal 2
Oxide
Oxide
M1 Copper Lines
Oxide
1. M1 Polish
3. M2 Cu Deposition
As Dep.
Oxide Profile
M2 Recess
Metal 2
Oxide
Oxide
M2 Remaining
Thickness
Metal 1
Oxide
Oxide
2. M2 Oxide Deposition
Duane Boning - ICMTS 2003
Metal 1
4. M2 Polish
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MIT-MTL
Multilevel Copper CMP Test Mask Design
Metal 2
Metal 1
20mm
■ Multi-level mask: M1, Via, and M2
❑ electrical and physical test structures
■ Single level effects: Layout factors on M1 to
study creation of topography
❑ Density
❑ Pitch (Line Width & Line Space)
20mm
Multi-Level Mask
■ Multiple metal level effects: Overlay M2
structures to study topography impact
Metal 1
Duane Boning - ICMTS 2003
Metal 2
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MIT-MTL
M1 Structure Design Space
M1 Structure Design Space (in µm): < P2D50 = Pitch of 2 and Density of 50% >
LS
0
0.18
0.25
0.5
1
1.5
2
3
4
5
7
9
10
50
90
100
Duane Boning - ICMTS 2003
LW
0 0.18 0.25 0.5
P0.36
D50
1
1.5
2
3
4
5
7
9
10
50
90 100
P51
D98
P101
D99
D100
Solid
P0.5
D50
P1
D50
P2
D33
P2
D50
P4
D25
P6
D17
P10
D10
P2
D67
P4
D75
P6
D83
P4
D50
P10
D90
P10
D70
P10
D30
P10
D50
P20
D50
P51
D2
P100
D10
P101
D1
18
P100
D50
P100
D90
P200
D50
MIT-MTL
Multilevel CMP Test Structure Design
■ Multi-level mask: M1, Via, and M2 with
electrical and physical test structures.
(“SEMATECH 954 Mask”)
■ Layout factors: Line width/line space
combinations
■ Focus: Multi-level pattern effects
20mm ■ Overlap structures: direct, half, and dual
Mask Layout
Half Overlap Structure
M1 Bond
Pad (Top)
20mm
Metal 1: Blue
Metal 2: Magenta
Duane Boning - ICMTS 2003
M2 Bond
Pad (Top)
Iso.
Lines
Arrays
M2 Bond
Pad (Bottom)
M1 Bond
Pad (Bottom)
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MIT-MTL
Direct Overlap: Structure
M1 Top
Pad
M2 Top
Pad
Top
Down
View
Metal 1
Metal 2
M2 Bottom
Pad
M1 Bottom
Pad
Cross
Sectional
View
Metal 2
Oxide
Metal 1
Oxide
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MIT-MTL
Direct Overlap: Data Analysis
M2: Electrically Extracted
0.8
Overlap
0.7
No Overlap
0.6
0.5
M2: Surface Scan
0
−1000
−2000
M1 Remain.
Thick. (µm)
M2 Recess
(Å )
M2 Remain.
Thick. (µm)
Iso. Lines
Iso. Lines
0.8
0.7
0.6
0.5
−500
As Dep.
Oxide Profile
M1: Electrically Extracted
0
500
1000
2000 µm
Metal 2
Oxide
Metal 1
Oxide
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1500
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MIT-MTL
Multilevel Half Overlap Structure
M1 Top
Pad
Top
Down
View
M2 Top
Pad
Metal 1
Metal 2
M2 Bottom
Pad
M1 Bottom
Pad
Cross
Sectional
View
As Dep.
Oxide Profile
Metal 2
Oxide
Metal 1
Oxide
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MIT-MTL
M1 Remain. M2 Recess M2 Remain.
(Å )
Thick. (µm)
Thick. (µm)
Half Overlap: Erosion to Erosion
0.8
M2: Electrically Extracted
0.7
Ref.
0.6
0.5
M2: Surface Scan
0
−1000
−2000
0.8
Over
Struct.
Over
Oxide
Iso. Lines
M1: Electrically Extracted
0.7
0.6
0.5
0
500
1000
1500
2000
2500
µm
As Dep.
Oxide Profile
Oxide
Metal 2
Oxide
Metal 1
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MIT-MTL
Half Overlap: Dishing to Erosion
M2 Array
No Overlap
Region
M2 Profile (Å)
0.5µm Lw/
0.5µm Ls
0
−500
−1000
−1500
−2000
0
500
1000
Over
Struct.
1500
Over
Oxide
2000
2500
3000
M1 Profile (Å)
0
50µm Lw/
−500
50µm Ls
−1000
−1500
−2000
0
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Dishing
Dominant
500
1000 1500 2000 2500
Scan Distance (µm)
24
3000
MIT-MTL
Half Overlap: Erosion to Dishing/Erosion
M2 Array
M2 Profile (Å)
5µm Lw/
5µm Ls
0
−500
−1000
−1500
−2000
0
No Overlap
Region
Over
Struct.
Over
Oxide
Dark band
indicates dishing
500
1000
1500
2000
2500
3000
M1 Profile (Å)
1µm Lw/
1µm Ls
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0
−500
−1000
−1500
−2000
0
Erosion
Dominant
500
1000 1500 2000
Scan Distance (µm)
25
2500
3000
MIT-MTL
Dual Overlap: Structure
M1 Top
Pad
M2 Top
Pad
Metal 1
Top
Down
View
Metal 2
M2 Bottom
Pad
M1 Bottom
Pad
Oxide
Cross
Sectional
View
Metal 2
As Dep.
Oxide Profile
Metal 1
Oxide
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MIT-MTL
Dual Overlap: Data Analysis
M2 Remain.
Thick. (µm)
0.8
M1 Remain. M2 Recess
Thick. (µm)
(Å )
M2 Electrically Extracted
0
0.7
Ref.
0.6
0.5 Iso. Lines
M2: Surface Scan
Over
Struct.1
−1000
−2000
Over
Struct.2
M1: Electrically Extracted
0.8
0.7
0.6
0.5
0
500
1000
1500
Oxide
2500
3000
µm
Metal 2
As Dep.
Oxide Profile
Oxide
Duane Boning - ICMTS 2003
2000
Metal 1
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MIT-MTL
Multilevel Electrical Impact: M2 Line Thickness
■ Metal 2 thickness (0.5 µm line/space)
as function of space from the edge of
the metal 1 array (3 µm line/1mm
sapce)
■ Change in resistance of a 0.5 µm
mtetal 2 line/space structure at a
transition in metal 1 density
Lakshminarayanan et al. (LSI Logic), IITC 2002.
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MIT-MTL
Design Rule Generation
Lakshminarayanan et al.
(LSI Logic), IITC 2002.
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MIT-MTL
Modeling of Pattern Effects in Copper CMP
■ Approach: Apply density/
step-height model to each
stage in the copper polish
process
bulk
Stage 1 copper
removal
Stage 2
barrier
removal
■ “Removal Rate” Diagrams:
❑ Track RR for metal and oxide
Stage 3
during each phase
overpolish
Oxide
Erosion
■ Approximation: neglect barrier
removal phase
Metal
Dishing
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MIT-MTL
Pattern-Density / Step-Height Effects
CMP Pad
d
K
H ( t ) = – ---dt
ρ
dH
dt
■ For large step heights:
❒ step height reduction goes as
1/pattern-density
Wafer
d
1
H ( t ) = – --- H ( t )
dt
τ
H
Hc
Ouma et al., IITC ‘98;
Smith et al., CMPMIC ‘99
Grillaert et al., CMP-MIC ‘98.
Duane Boning - ICMTS 2003
Hc
Wafer
Step Height
■ Calculate effective
density by averaging
local pattern densities
over some window/
weighting function
CMP Pad
■ For small step heights (less than the
“contact height”):
❒ height reduction proportional
to height
❒ height decays with time constant τ:
–t ⁄ τ
H ( t ) = H0 e
Effective
Density Map
Over Chip
X
PL
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MIT-MTL
Chip-Scale CMP Simulation
Cu Dishing after step 2 polish
100
2000
300
Data
Model
200
1500
300
400
1000
Å
500
200
Dishing (A)
Dishing (Å)
250
150
100
50
0
0
500
600
5
10
15
20
25
Site number
30
35
40
Site number
700
50
100
150
200
250
300
350
400
450
500
0
Dishing after step two
RMS Error = 155 Å
Duane Boning - ICMTS 2003
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MIT-MTL
45
Outline
■
Background
■
Copper CMP Characterization
■
Copper Electroplating Characterization
❏
❏
❏
❏
❏
■
Definitions
Test Structure and Measurement Plan
Trend Analysis
Chip Scale Modeling
Integrated Plating/CMP Chip-Scale Modeling
Conclusions
Duane Boning - ICMTS 2003
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MIT-MTL
Copper Electroplating Non-Uniformities
Isolated
Line
Array Region
Super Fill
(Bottom-Up Fill)
Conventional Fill
■ Isolated line and array region
■ Isolated line sticks up and
are recessed
Duane Boning - ICMTS 2003
array region is bulged
34
MIT-MTL
Electroplating Pattern Dependent Effects
Sample Profilometer
Scans
AH
AH
SH
SH
AH
SH
0
AH
0
Oxide
Fine Line
Fine Space
AH: Array Height
Duane Boning - ICMTS 2003
Large Line
Large Space
Fine Line
Medium Space
Large Line
Fine Space
SH: Step Height
35
MIT-MTL
Measurement Plan and Sample Profile Scan
■
Profile scans taken across each line/array structure
Profile Scan
X
X
Thickness Measurement
Isolated Line
Test Mask
Array Region
Superfill
Step Height
(Isolated Line)
Bulge
Step Height
(Array Line)
Recess
Step Height
(Isolated Line)
Conformal Fill
Zoom
into array
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MIT-MTL
Electroplated Profile Trends: Pitch Structures
Height (Å)
0.25um/0.25um
0.3um/0.3um
5000
5000
5000
0
0
0
0.25/0.25µm
−5000
0
0.3/0.3µm
−5000
1000 2000 3000
0.5um/0.5um
0
1000 2000 3000
0.7um/0.7um
0
5000
5000
0
0
0
0.5/0.5µm
0
1000
2000
3000
2um/2um
2/2µm
5000
0.7/0.7µm
−5000
0
1000
2000
3000
0
0
0
0
−5000
−5000
−5000
0
1000 2000
20um/20um
3000
20/20µm
5000
0
1000 2000
50um/50um
3000
50/50µm
5000
0
−5000
−5000
−5000
Duane Boning - ICMTS 2003
2000
3000
0
1000
2000
3000
37
2000
3000
Superfill
Behavior
Conformal
Behavior
1000 2000 3000
100um/100um
100/100µm
5000
0
1000
1000
10/10µm
0
0
0
3000
10um/10um
5000
5/5µm
1000 2000
1um/1um
Lw/Ls
1/1µm
−5000
Trace Length
(µm)
5um/5um
5000
0.35/0.35µm
−5000
5000
−5000
Height (Å)
0.35um/0.35um
0
1000
2000
3000
MIT-MTL
Step Height Data Analysis
Step Height vs. Line Width
Step Height Behavior
2000
Step Height (Å)
0
−2000
−4000
LW
Isolated
Line
−6000 −1
10
d
Copper
0
10
1
10
2
10
2000
d
0
−2000
−4000
−6000 −1
10
Array
Line
Oxide
0
10
1
10
2
10
Line Width (µm) - Log Scale
0.5µm
Narrow
Trench
10µm
3µm
Medium
Trench
Wide
Trench
■ Trends
• SH depends on line width: near zero or positive (superfill) for small features
and becomes more conformal as line width increases
■ Saturation Length: fill becomes fully conformal and SH = Trench Depth
• Line width LW = 10µm
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MIT-MTL
Array Height Data Analysis
Array Height vs. Line Width
Array Height Behavior
Array Height (Å)
6000
4000
LW
2000
Copper
0
0.3µm
Oxide
−2000
−4000 −1
10
0
10
1
10
Line Width (µm) - Log Scale
2
10
Narrow
Trench
5µm
Medium
Trench
20µm
Wide
Trench
■ Trends
• Positive (superfill) for small features, and becomes negative (conformal),
and saturates to field level as line width increases
■ Saturation length: fill becomes fully conformal and AH = 0Å
• Line width LW = 10µm
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MIT-MTL
SH and AH vs. Line Space
Step Height vs. Line Space
Array Height vs. Line Space
6000
2000
Array Height (Å)
Step Height (Å)
1000
0
−1000
LS
−2000
−3000
−4000
−5000
Array
Line
−6000 −1
10
0
10
1
10
4000
2000
0
−2000
−4000 −1
10
2
10
Line Space (µm) - Log Scale
LS
0
10
1
2
10
10
Line Space (µm) - Log Scale
■ Trends
• Line space dependency for SH and AH is similar to line width dependency
■ Saturation length: similar value is observed for line space
• Line space LS = 10µm
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MIT-MTL
Transition Length Scale in Electroplating
■
Plating depends on local feature (feature scale) and nearest
neighbors within 2-5µm range
Array to Array
Transition
Array Height Profile Scans
0.5µm/0.5µm Array
5µm/5µm Array
Sharp Transition
Left Edge
2000
Left Edge
1000
~5µm
0
−1000
720
730
740
750
760
770
780
Right Edge
2000
1000
~5µm
0
−1000
2720
2730
2740
2750
2760
2770
Scan Length (µm)
Superfill
Duane Boning - ICMTS 2003
2780
Array Height (Å)
Array Height (Å)
1.5µm/3.5µm Array
0
−1000
−2000
4.5µm/0.5µm Array
−3000
−4000
700
750
800
850
Right Edge
0
−1000
−2000
−3000
−4000
2650
2700
2750
2800
Scan Length (µm)
Conventional fill
41
MIT-MTL
Semi-Empirical Model for Topography Variation
■
Physically Motivated Model Variables:
❏ Width, Space, 1/Width, and Width*Space
■
Semi-Empirical Model Development
❏ Capture both conformal regime and superfill regime in one model frame
❏ 1/W2 and W2 terms explored as well
■
Model Form
❏ Array Height:
AH = a E W + b E W
–1
+ cE W
–2
+ d E S + eE W × S + Const E
❏ Step Height:
SH = a S W + b S W
Duane Boning - ICMTS 2003
–1
2
+ c S W + d S S + e W × S + Const S
S
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Model Fit: Step Height and Array Height
Array Height vs. Line Width
Step Height vs. Line Width
* = Data
o = Model Fit
Step Height (Å)
0
−2000
−4000
Isolated
Line
−6000 −1
10
0
10
1
10
2
10
2000
0
−2000
−4000
−6000 −1
10
Array
Line
0
10
1
10
6000
Envelope Height (Å)
2000
4000
2000
0
−2000
−4000 −1
10
2
10
Line Width (µm)
■
* = Data
o = Model Fit
0
10
1
2
10
10
Line Width (µm)
The models capture both trends well
❏ Step Height RMS error = 327 Å
❏ Array Height RMS error = 424 Å
■
Model coefficients are calibrated and used for chip-scale
simulations
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Chip-Scale Simulation Calibration Results
Step Height Average: Simulated Result
5000
50
4500
100
4000
150
3500
Test
Mask
200
3000
250
2500
300
2000
350
1500
400
1000
450
500
500
50
100
150
200
250
300
350
400
450
500
0
RMS Error=420Å
4
Final Thickness Average: Simulated Result
Envelope Average: Simulated Result
x 10
2.2
50
50
Step
Height
6000
100
100
2
4000
150
1.8
200
200
Array
Height
150
2000
250
250
1.6
0
300
300
1.4
350
350
−2000
Final
Thickness
400
400
1.2
−4000
450
500
RMS Error=440Å
50
100
150
200
250
300
350
400
450
500
450
500
1
50
100
150
200
250
300
350
400
450
500
■ Simulated over the entire test mask used to calibrate the model
■ RMS errors are slightly greater (about 90Å and 10Å more) than fitting RMS
errors since distribution values are used
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Integration of Electroplating and CMP Models
■
Integration is done by feeding forward the simulated result
from electroplating to copper CMP simulation
Product Chip
Layout
Copper
■ Electroplating Simulation:
• Array Height
• Step Height
• Topography Pattern Density
Oxide
Surface Envelope
Layout Parameter
Extraction
■
Chip-Scale
Simulation
Calibrated Copper
Pattern Dependent
CMP Model
Prediction of dishing and erosion
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CMP model needs:
❏ Surface “envelope”:
Array Height
❏ Step Height
❏ Topography Pattern
Density
MIT-MTL
Topography Pattern Density
■
Topography density: as-plated surface topography pattern
density of raised features
❏ Depends on plating characteristics
❏ Important as an input for CMP pattern density model
Grid Density: Layout Extracted
ECD Density: Simulated Result
1
1
0.9
0.9
100
100
0.8
0.8
200
200
0.7
0.7
0.6
300
0.6
300
0.5
0.5
400
400
0.4
500
0.4
500
0.3
0.3
0.2
600
0.2
600
0.1
0.1
700
700
50
100
150
200
250
300
350
400
450
500
0
50
Layout Density
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100
150
200
250
300
350
400
450
500
Topography Density
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Plating/CMP: Final Dishing
Dishing after step 3 polish
1200
100
1000
20
0
800
200
Dishing (Å)
−20
300
400
400
Dishing (A)
600
Å
200
−40
−60
−80
−100
−120
−140
−160
Data
Model
−180
500
−200
0
−220
0
5
−200
700
10
15
20
25
Site number
30
35
Site number
600
−400
50
100
150
200
250
300
350
400
450
500
Dishing after step three
RMS Error = 140 Å
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MIT-MTL
40
45
Plating CMP: Final Erosion
Erosion after step 3 polish
4500
100
3200
4000
200
Data
Model
3000
2800
300
3000
400
Å
2500
2600
Erosion (A)
Erosion (Å)
3500
2400
2200
2000
1800
500
1600
2000
1400
0
5
600
10
15
20
25
Site number
30
Site number
1500
700
1000
50
100
150
200
250
300
350
400
450
500
Erosion after step three
RMS Error = 420 Å
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35
40
45
Conclusion
■
Electroplating and CMP are Highly Pattern Dependent
■
Copper Interconnect Pattern Dependent Characterization
❏
Test Structure Design
• Capture Key Pattern Effects: Isolated vs. Array, Density, Pitch, etc.
• Three Polishing Length Scales: mm, 100µm, and 1µm Ranges.
❏
Mask Design
• Single layer
• Multi layer
Physical and Electrical Measurements
❏ Data Analysis
❏
■
Can Be Applied to Support Process Development,
Optimization, and Formulation Of Design Rules
■
Provides Data for Chip-Scale Modeling of Copper
Interconnect
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Acknowledgments
■
Past and current students: Tae Park, Tamba Tugbawa, Brian
Lee, Xiaolin Xie, Hong Cai
■
Support and collaboration with SEMATECH, Texas
Instruments, Conexant, Praesagus, SKW, Philips Analytical
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