Spartan™-3E FPGAs for
Lowest Total Cost:
Configuration Options
Agenda
•
•
•
•
Introduction to the low-cost Spartan-3E FPGA family
Low-cost configuration options with Spartan-3E FPGAs
Choosing the optimal configuration solution for your system
Configuration solutions using SPI and parallel flash memory
Spartan-3E Configuration Options Webcast
Spartan Series:
The World’s Lowest Cost FPGAs
Mass Market Consumer
Electronics
DVD Writer/Players
Home Entertainment
Flat Panel Displays
30x
cost-perlogic
reduction
Digital Video Recorders (DVR)
Set Top Boxes
Low-Cost Networking
1998
1999
2000
2001
2002
2003
2004
2005
$14.45
Price per 1000 Logic Cells
$0.46
Spartan Spartan-XL Spartan-II Spartan-IIE Spartan-3 Spartan-3L, Spartan-3E
Spartan-3
EasyPath
Spartan-3E Configuration Options Webcast
The Spartan-3 Generation
Easy, Inexpensive, Complete FPGA Solutions
• The leader in low-cost programmable logic
– For implementing custom circuitry
– For integrating system functions into a single device
• Three families in the 90nm Spartan-3 Generation
– Spartan-3 (introduced in 2003)
– Spartan-3L (introduced in 2004)
– Spartan-3E (introduced in 2005)
• All built on Xilinx mainstream 90nm technology
• Supported by a broad portfolio of IP, reference designs, hardware
evaluation kits, design tools, training and support
Spartan-3E Configuration Options Webcast
The Newest Family: Spartan-3E
• 7th Family in the Spartan Series of low-cost FPGAs
– Five devices from 100K gates to 1.6M gates
– Up to 47% cost reduction from Spartan-3
• World’s Lowest Cost FPGAs
– 100K system gate FPGA for under $2*
– 1.2M system gate FPGA for under $9*
• Ready for Production
– Utilizes 90nm process technology and 300mm wafers
– Full design tool support in ISE and WebPack
– Broad portfolio of Spartan-3 IP
*Pricing is for 500K units, 2H06
Spartan-3E Configuration Options Webcast
Spartan-3E Family Members
3S100E
3S250E
3S500E
3S1200E
3S1600E
System Gates
100K
250K
500K
1.2M
1.6M
Logic Cells
2160
5508
10476
19512
33192
Maximum I/O
108
172
232
304
376
Block RAM bits
72K
216K
360K
504K
648K
Distributed RAM bits
15K
38K
73K
136K
231K
18x18 Multipliers
4
12
20
28
36
DCMs
2
4
4
8
8
Device
Spartan-3E Configuration Options Webcast
Spartan-3E Family:
Key New Features
• Support for configuration by SPI/Parallel commodity flash memory
– Low/zero cost configuration for systems with existing flash memory
• Enhancements for Digital Consumer Electronics markets
– Consumer I/O standards: Mini-LVDS, PCI-64/66, DDR 333
– Expanded DCM input frequency down to 5MHz
• Enhancements for Embedded Designers
– SPI/Parallel Flash useable post-configuration for code & data storage
– 32-bit MicroBlaze soft processor in XC3S1200E: $0.48 (~5% of FPGA)
• Enhancements for Low-Cost Digital Signal Processing
– Multiplier performance increased to 325MHz
– 9.1 GMAC/s in XC3S1200E ( less than $1/GMAC/s)
*Pricing is for 500K units, 2H06
Spartan-3E Configuration Options Webcast
Spartan-3E FPGAs for Lowest
Total Cost
• Lowest Device Cost
– 100K system gate FPGA for under $2*
– 1.2M system gate FPGA for under $9*
• Lowest System Cost
– Platform architecture enables complex functions within FPGA
• Digital signal processing
• Embedded processing
– Complex interfaces built into Spartan-3E I/O
• Support for 18 common I/O standards
• Support for numerous low-cost configuration options
*Pricing is for 500K units, 2H06
Spartan-3E Configuration Options Webcast
Agenda
•
•
•
•
Introduction to the low-cost Spartan-3E FPGA family
Low-cost configuration options with Spartan-3E FPGAs
Choosing the optimal configuration solution for your system
Configuration solutions using SPI and parallel flash memory
Spartan-3E Configuration Options Webcast
Spartan-3E Configuration Options
•
Configuration memory with direct FPGA-to-memory interface
–
Xilinx Platform Flash
•
•
–
Commodity flash memory
•
•
•
Serial Peripheral Interface (SPI)
Parallel interface
Configuration storage with separate controller
–
–
•
Complete family of feature-rich configuration memory
Low-power, small-form-factor packaging
Configuration data may be stored in local storage and directed to the Spartan
FPGA by an intelligent host
A CoolRunner-II CPLD can manage the configuration interface between the
Spartan FPGA and nearly any form of external semiconductor memory
In-System Programming (ISP)
–
–
–
JTAG serial and parallel-IV programming
Parallel and USB configuration cables
Third party tools available for ISP of commodity Flash memory
Spartan-3E Configuration Options Webcast
Configuration with Commodity Serial
(SPI) & Parallel Flash Memory
• Feature Details
– Embedded control logic enables configuration from low-cost commodity
memory: Serial Peripheral Interface (SPI) & Parallel Flash
– Complete SPI support: Spartan-3E can address the memory after
configuration through the configuration port (competing low-cost FPGAs
cannot)
• Application Examples
– Many systems already have SPI or parallel flash memory – simply use an
incrementally larger memory for the FPGA configuration data
– Implement a MicroBlaze soft processor in the FPGA and store embedded
processing code & data externally in the SPI or Flash memory device
– Multiboot configuration enables two independent applications to be loaded
from parallel flash memory
Spartan-3E Configuration Options Webcast
Agenda
•
•
•
•
Introduction to the low-cost Spartan-3E FPGA family
Low-cost configuration options with Spartan-3E FPGAs
Choosing the optimal configuration solution for your system
Configuration solutions using SPI and parallel flash memory
Spartan-3E Configuration Options Webcast
Choosing the Optimal Configuration
Solution for Spartan-3E
• Factors to consider to choose your optimal configuration solution
– Using existing on-board memory or controller
• “Extra bits” on memory chips
• Microcontroller
– Calculating the lowest total cost
•
•
•
•
Component cost
PCB and system costs
Development cost
Programming and other costs
– Technical and sales support
• Single vs. multiple source
• Supply guarantee
Spartan-3E Configuration Options Webcast
Choosing the Optimal Configuration
Solution for Spartan-3E
• More factors to consider…
– Exclusive Xilinx Platform Flash features
•
•
•
•
•
JTAG programming
Revisioning
Compression
High speed parallel configuration
Integrated software and programming hardware support from Xilinx
– Parallel NOR flash features
• Multiboot configuration with parallel NOR flash
• Embedded processing applications
– Packaging
• Footprint
• Upgradeability without PCB changes
Spartan-3E Configuration Options Webcast
Xilinx Platform Flash:
Pros and Cons
Advantages
•
•
•
•
•
•
•
•
•
Single supplier for FPGA and PROM
One contact for sales and support
In system programmability with Xilinx tools
JTAG programming
Revisioning
Compression
High speed parallel configuration
Power-on, brown-out protection
Up to 85% lower price than previous
XC18V Family and under $1/Mbit in
volume
Spartan-3E Configuration Options Webcast
Limitations
• Using “extra memory bits” (that
are not required for
configuration) as a general
purpose data store requires
additional logic in FPGA
• Single supplier (but Xilinx is the
supplier!)
SPI Flash:
Pros and Cons
Advantages
•
•
•
•
•
•
•
•
Lowest unit cost
High density
Multiple suppliers, most pin compatible
Random accessible, byte addressable
Readable/writeable by FPGA user application
Low power
High write endurance (100K+ cycles)
Long data retention
Limitations
• No JTAG interface
• Slower data transfer
• Not sold by Xilinx
– May require separate vendor
qualification
• Not supported by Xilinx
– No low cost Xilinx
programming hardware
support for ISP
• No power-on, brown-out
protection
Spartan-3E Configuration Options Webcast
Parallel NOR Flash:
Pros and Cons
Advantages
• Uses existing onboard memory (commonly
used for embedded processing apps)
• Multiboot capability
• Lowest unit cost
• High density
• Multiple suppliers, most pin compatible
• Random accessible, byte addressable
• Readable/writeable by FPGA user application
• Low power
• High write endurance (100K+ cycles)
• Long data retention
Spartan-3E Configuration Options Webcast
Limitations
• Requires numerous I/O
connections
• No JTAG interface
• Slower data transfer
• Not sold by Xilinx
– May require separate vendor
qualification
• Not supported by Xilinx
– No low cost Xilinx
programming hardware
support for ISP
• No power-on, brown-out
protection
Choosing the Optimal Configuration
Solution for Spartan-3E
• Decide which factors are most important to you
• Review the advantages and limitations of each option
• Develop a comparison chart…
Spartan-3E Configuration Options Webcast
Example: Comparing
Platform Flash & SPI Flash
SPI Flash PROM
Absolute lowest unit cost
COMPETITIVE!
Multi-sourced
Smallest form factor
Read/Write, random-access
Xilinx sold and supported
Xilinx In-System Programming
Built-in power monitoring
Long-term supply security
*




* Using JTAG and additional control logic in a CPLD, FPGA, or microcontroller
Spartan-3E Configuration Options Webcast




Agenda
•
•
•
•
Introduction to the low-cost Spartan-3E FPGA family
Low-cost configuration options with Spartan-3E FPGAs
Choosing the optimal configuration solution for your system
Configuration solutions using SPI and parallel flash memory
Spartan-3E Configuration Options Webcast
Spartan-3E & Platform Flash
Interface
• Simple interface
• Most configuration pins can
be re-used as general I/O
• Single memory can
configure multiple FPGAs
(daisy-chain)
Spartan-3E Configuration Options Webcast
Spartan-3E Configuration with
Commodity SPI Flash Memory
• SPI flash memory with direct FPGA-to-memory interface
– Uses standard, commodity SPI memory types
– Standard, easy-to-design 4-pin interface
– Only three dedicated configuration pins, all other configuration pins can be
re-used as general I/O
– Single memory can configure multiple FPGAs (daisy-chain)
Spartan-3E Configuration Options Webcast
How Many Bits are Required?
Configuration
Bits (per)
Smallest SPI Flash
Required
Remaining
Space
XC3S100E
581,344
1,024Kb (1Mb)
456Kb
XC3S250E
1,353,728
2,048Kb (2Mb)
726Kb
XC3S500E
2,270,208
4,096Kb (4Mb)
1.83Mb
XC3S1200E
3,837,184
4,096Kb (4Mb)
348Kb
XC3S1600E
5,964,672
8,192Kb (8Mb)
2.31Mb
Device
• SPI Flash PROMs are specified in bits
• Assumes no bitstream compression used (BitGen –g compress)
• Larger SPI Flash devices provide additional storage to user applications (MicroBlaze
code, ID codes, etc.)
Spartan-3E Configuration Options Webcast
Spartan-3E SPI Flash Interface
Spartan-3E
FPGA
SPI Flash
Configuration Mode
SPI Flash
Vendor Select
‘0’
‘0’
‘1’
‘0’
?
?
?
Optional JTAG
Programming
Interface
Spartan-3E Configuration Options Webcast
M2
MOSI
M1
DIN
M0
CSO_B
HSWAP CCLK
VS2
VS1
VS0
TDI
TDO
TMS
TCK
+3.3V
25-series SPI
Flash PROM
(*)
(MOSI)
(MISO)
(SS#)
(SCLK)
D
Q
S
C
HOLD
‘1’
HOLD must be ‘1’
* pull-up resistor on CSO_B
only required if HSWAP=1
Spartan-3E SPI Daisy-Chain
*
M2
MOSI
M1
DIN
M0
CSO_B
HSWAP CCLK
?
?
?
VS2
VS1
DOUT
VS0
INIT_B
PROG_B
DONE
pull-up resistor on CSO_B only required if HSWAP=1
Spartan-3E Configuration Options Webcast
Slave Serial
Mode
D
Q
S
C
‘1’
‘1’
‘1’
Spartan-3E
FPGA
M2
M1
M0
CCLK
DIN
3.3V
2.5V 2.5V
330Ω
Vendor
Select
‘0’
‘0’
‘1’
‘0’
4.7KΩ
SPI Flash
Mode
SPI Flash
(*) PROM
4.7KΩ
Spartan-3E
FPGA
+3.3V
INIT_B
PROG_B
DONE
DOUT
Spartan-3E Configuration with
Commodity Parallel Flash
• Parallel flash memory with direct FPGA-to-memory interface
– Uses standard, commodity parallel NOR flash memory types
– Standard, easy-to-design interface
– Few dedicated configuration pins, most configuration pins can be re-used
as general I/O
– Single memory can configure multiple FPGAs (daisy-chain)
Spartan-3E Configuration Options Webcast
How Many Bits are Required?
Configuration
Bits (per)
Smallest Flash
Required
Minimum Address
Lines
XC3S100E
581,344
1,024Kb (1Mb)
17
XC3S250E
1,353,728
2,048Kb (2Mb)
18
XC3S500E
2,270,208
4,096Kb (4Mb)
19
XC3S1200E
3,837,184
4,096Kb (4Mb)
19
XC3S1600E
5,964,672
8,192Kb (8Mb)
20
Device
•
•
•
•
Assumes no bitstream compression used (bitgen –g compress)
Parallel Flash size is specified in bits, addressed as bytes
FPGA drives 24 address lines but Flash PROM may have fewer
Larger parallel Flash devices provide additional storage to user applications (MicroBlaze code, ID
codes, etc.)
Spartan-3E Configuration Options Webcast
Spartan-3E Byte-Wide
Peripheral (BPI) Interface
Spartan-3E
FPGA
Parallel Flash
Configuration Mode
M0 Value
0 = Increment Addresses
1 = Decrement Addresses
Parallel Flash
PROM
‘0’
‘1’
‘?’
‘0’
M2
LDC0
M1
LDC1
M0
HDC
HSWAP A[23:0]
D[7:0]
CE#
OE#
WE#
A[x:0]
DQ[7:0]
‘0’
‘0’
CSI_B User-I/O
RDWR_B LDC2
DQ[15:8]
BYTE#
Optional JTAG
Programming
Interface
• Not supported in VQ100 package
Spartan-3E Configuration Options Webcast
TDI
TDO
TMS
TCK
BUSY
CSO_B
CCLK
Optional
connections for
x16 Flash
devices that
support x8 data
Active but not used in
stand-alone applications
Daisy-Chain Flash Interface
BPI
‘0’
‘1’
‘?’
‘0’
‘0’
‘0’
M2
M1
M0
LDC0
LDC1
HDC
A[23:0]
D[7:0]
User-I/O
LDC2
CSI_B
RDWR_B CCLK
CSI_B CSO_B
INIT_B
DONE
Spartan-3E Configuration Options Webcast
Flash Memory
CE#
OE#
WE#
A[x:0]
DQ[7:0]
DQ[15:8]
BYTE#
Slave Parallel
‘1’
‘1’
‘0’
M2
M1
M0
D[7:0]
‘0’
‘0’
CSI_B
RDWR_B
CCLK
CSI_B CSO_B
INIT_B
DONE
Embedded MicroBlaze Processor
Spartan-3E
FPGA
‘0’
‘1’
‘1’
‘0’
‘0’
Parallel Flash
Memory
M2
M1
M0
LDC0
LDC1
HDC
A[23:0]
CSI_B D[7:0]
RDWR_B
TDI
TDO
TMS
TCK
LDC2
User-I/O
D[15:8]
CE#
OE#
WE#
A[n:0]
DQ[7:0]
‘1’
1
0xFF_FFFF
Flash
Memory Map
FPGA
FPGA configures
from top of Flash, Configuration
loads MicroBlaze
processor design
Unused
User Data
MicroBlaze
Code
BYTE#
DQ[15:8]
0x00_0000
CCLK
Spartan-3E Configuration Options Webcast
3 MicroBlaze processor starts
executing directly from Flash
2
location 0.
Switch to x16 mode.
Multi-Boot Mode Applications
• New mode based on customer requests
– Diagnostics then Operation configurations
– “Golden” vs “Enhanced” configurations
– Spartan-3E provides both solutions
• Any two mutually-exclusive FPGA designs
• Only supported with BPI Up or Down modes
• See alternative Platform Flash/CPLD solution
XAPP693: A CPLD-Based Configuration and Revision Manager for Xilinx
Platform Flash PROMs and FPGAs
Spartan-3E Configuration Options Webcast
Using MultiBoot with Embedded
MicroBlaze Processor (Boot)
XC3S1600E
FPGA
‘0’
‘1’
‘1’
M2
M1
M0
‘0’
‘0’
CSI_B User-I/O
HSWAP LDC2
User-I/O
TDI
TDO
TMS
TCK
CCLK
LDC0
LDC1
HDC
A[20:0]
D[7:0]
Spartan-3E Configuration Options Webcast
32Mbit Flash
Memory
CE#
OE#
WE#
A[20:0]
DQ[7:0]
‘1’ A[21]
BYTE#
DQ[15:8]
0x1F_FFFF
Flash
Memory Map
FPGA
Config. #1 1 MB
Unused
1 MB
FPGA
Config. #2
MicroBlaze
4 MB
Code
HSWAP=0 enables pull-up on A[21] address line
during configuration. M0=1 boots from top of
memory.
Using MultiBoot with Embedded
MicroBlaze Processor (MultiBoot)
XC3S1600E
FPGA
‘0’
‘1’
‘1’
‘0’
‘0’
M2
M1
M0
LDC0
LDC1
HDC
A[20:0]
D[7:0]
CSI_B User-I/O
HSWAP LDC2
User-I/O
TDI
TDO
TMS
TCK
CCLK
Spartan-3E Configuration Options Webcast
32Mbit Flash
Memory
CE#
OE#
WE#
A[20:0]
DQ[7:0]
‘1’ A[21]
BYTE#
DQ[15:8]
0x1F_FFFF
0x10_0000
Flash
Memory Map
FPGA
Config. #1 1 MB
Unused
1 MB
FPGA
Config. #2
MicroBlaze
4 MB
Code
HSWAP=0 enables pull-up on A[21] address line
during configuration. MultiBoot jumps to opposite
end of memory.
Using MultiBoot with Embedded
MicroBlaze Processor (User)
XC3S1600E
FPGA
‘0’
‘1’
‘1’
‘0’
‘0’
M2
M1
M0
LDC0
LDC1
HDC
A[20:0]
D[7:0]
A21
CSI_B
HSWAP LDC2
D[15:8]
TDI
TDO
TMS
TCK
CCLK
Spartan-3E Configuration Options Webcast
32Mbit Flash
Memory
CE#
OE#
WE#
A[20:0]
DQ[7:0]
0x1F_FFFF
0x10_0000
‘0’ A[21]
‘1’ BYTE#
Flash
Memory Map
FPGA
Config. #1 1 MB
Unused
1 MB
FPGA
Config. #2
MicroBlaze
4 MB
Code
DQ[15:8]
0x00_0000
FPGA application drives A[21]=0, selecting bottom of
memory. LDC2=0, selecting x16 mode. MicroBlaze
codes starts executing at location 0.
Resources for the Next Step…
• Download Spartan-3E information at www.xilinx.com/spartan3e
– For Spartan-3E data sheet, click “Data Sheets” link under “Documentation”
– For Spartan-3E application notes, click “Application Notes and Reference
Designs” link under “Documentation”
• Download Platform Flash information at
www.xilinx.com/platformflash
• Purchase Prototype Devices – www.xilinx.com/store
• Purchase Hardware Kits - www.xilinx.com/xob
• Download & Purchase Design Tools - www.xilinx.com/ise
Spartan-3E Configuration Options Webcast
Spartan Low-Cost Starter Kits
Spartan-3E Starter Kit Features
• Spartan-3E 500Kgate XC3S500E FPGA
• Multiple Memory Types
– 32 Mbit Parallel Flash
– 8 Mbit SPI Flash
– 32MByte DDR SDRAM
• Expansion & I/O Interfaces
–
–
–
–
Ethernet 10/100 PHY
USB 2.0 PHY+Controller
3-bit, 8-color VGA display port
9-pin RS-232 Serial Port, PS/2 port
• Design & Support Tools
–
–
–
–
Power Supply
JTAG Programming Cable
Evaluation software
Reference Designs
Spartan-3E Configuration Options Webcast
$149 Spartan-3E Kit available Q4CY05
$99 Spartan-3 Kit available now