Jianfeng Liu, Jaehan Jeon,
Kyungtae Do, JungYun Choi
Design Technology Team
System LSI Division
Samsung Electronics Co., Ltd
Author Name
Email
Phone
Jianfeng Liu
[email protected]
+82-31-209-4299
Jaehan Jeon
[email protected]
+82-31-209-4723
Kyungtae Do
[email protected]
+82-31-209-4723
JungYun Choi
[email protected]
+82-31-209-4333
2
Organization
Samsung
Electronics, Co.
Ltd
To minimize the number of wires with dont_touch attribute
assigned by Always-On Net (AON) synthesis algorithm in
implementation tools, a new algorithm based on Power State Table
(PST) in Unified Power Format (UPF) has been proposed.
The PST based AON synthesis algorithm has been tested with a
latest mobile SoC platform, which reduces the number of
dont_touch wires by 49X.
3
To cater the trend of mobile computing, complicated low power design
techniques have been applied to mobile SoC design
The wide-spread deployment of power gating technique requires huge
effort for implementing the low power logics, such as power switches,
isolation cells, level shifters etc.
Power Gating
Multi-VDD
Adaptive Body Bias
DVFS
More than 30 power domains
Multi-VDD and Power Gating
used in most Power Domains
More than 400 power states
Thousands of power state
transitions
SoC implementation complexity
grows rapidly with low power designs
For a power gating design, besides the complexity of implementing low
power logics, it has become a complicated problem to determine
whether a cross-domain wire can be buffered or should be dont_touch,
due to the complex On/Off relation of the driver power domain, crossing
power domain and load power domain.
In this presentation, the
problem of whether a wire
should be dont_touch at a
crossing power domain in
Synopsys Design Compiler
(DC) and IC Compiler (ICC)
has been studied
PD(D)
PD(Top)
dont_touch ?
PD(L)
In DC/ICC, whether a wire
should be marked as
dont_touch by power On/Off
behavior is determined by
the Always On Net (AON)
synthesis algorithm, based
on the Supply Net (SN)
availability in the present
power domain
Dont_touch attribute on the
wire will be assigned on a
wire when both driver and
load supply are not
available in the present
power domain
AON Synthesis
Algorithm in DC/ICC
UPF & Netlist
load supply
available
Y
AON
w load supply
Y
AON
w driver supply
N
Driver supply
available
N
dont_touch
Example case illustrated
When VA or VC exists in PD_B, n2
will be powered by VA or VC
PD_B (VB)
PD_B (VB)
VA or VC
VA or VC
PD_C (VC)
PD_A (VA)
n3
n1
n2
When VA or VC are not available in
PD_B, n2 will be dont_touch wire
PD_C (VC)
PD_A (VA)
n1
dont_touch
n3
n2
In a latest mobile SoC design, about 36,000 nets are assigned dont_touch
attributes by AON algorithm in the netlist, which makes lots of DRC warnings
and ECO steps
A new AON synthesis algorithm is desired
to minimize the number of dont_touch wires
The core problem of the
current
AON
synthesis
algorithm is that only load and
driver SN are considered for
wire buffering, which excludes
the primary supply
UPF & Netlist
Primary Supply
meets Drivability
N
load supply
available
The proposed AON synthesis:
Take into consideration of
primary supply
Decides the drivability
based on PST in UPF.
Y
Normal wire
w primary supply
Y
AON
w load supply
Y
AON
w driver supply
N
Driver supply
available
N
dont_touch
Case 1: PST(VA) <> PST(VB)
i.e. VA is independent of VB in PST
Case 3: PST(VA) > PST(VB)
i.e. VA is more always-on than VB in PST
PST
VA
VB
PST
VA
VB
PS1
ON
ON
PS1
ON
ON
PS2
ON
OFF
PS2
ON
OFF
PS3
OFF
ON
PS3
OFF
ON
PS4
OFF
OFF
PS4
OFF
OFF
Case 2: PST(VA) = PST(VB)
i.e. VA is equivalent to VB in PST
Case 4: PST(VA) < PST(VB)
i.e. VA is less always-on than VB in PST
PST
VA
VB
PST
VA
VB
PS1
ON
ON
PS1
ON
ON
PS2
ON
OFF
PS2
ON
OFF
PS3
OFF
ON
PS3
OFF
ON
PS4
OFF
OFF
PS4
OFF
OFF
PST Scenarios
SN AON Algorithm
n1
n2
PST AON Algorithm
n3
n1
n2
n3
PST(VA) > PST(VB) >
PST(VC)
normal
mv_ao or
dont_touch
normal
normal
normal
normal
PST(VA) > PST(VB) =
PST(VC)
normal
mv_ao or
dont_touch
normal
normal
normal
normal
PST(VA) = PST(VB) >
PST(VC)
normal
mv_ao or
dont_touch
normal
normal
normal
normal
PD_B (VB)
VA or VC
PD_B (VB)
PD_C (VC)
PD_A (VA)
n3
n1
n2
PD_C (VC)
PD_A (VA)
PST AON
n1
n2
n3
normal
PD_B (VB)
VA or VC
PD_C (VC)
PD_A (VA)
n1
dont_touch
n2
n3
n2 is always normal regardless of VA
and VC availability in PD_B
When PST(VA) = PST(VB) < PST(VC),
an isolation cell is needed at PD_C.
PST AON can make n2 normal net
PD_B (VB)
PD_B (VB)
PD_C (VC)
PD_A (VA)
n1
When PST(VA) = PST(VB) = PST(VC),
all the 3 nets are normal by both SN
AON and PST AON algorithms
n2
n3
PD_C (VC)
PD_A (VA)
n1
d
n2
n3
ISO
Behavior
n1
n2
n3
Behavior
n1
n2
n3
SN AON
normal
ao or d(*)
ao or d(*)
SN AON
normal
normal (*)
normal
PST AON
normal
normal
ao or d(*)
PST AON
normal
normal
normal
PD_B (VB)
PD_C (VC)
PD_A (VA)
n1
n2
n3
Case I :
PST(VA) > PST(VB)
PST(VC) > PST(VB)
PST(VA) >= PST(VC)
VA
VB
VC
ON
ON
ON
ON
OFF
ON
ON
OFF
OFF
OFF
OFF
OFF
The first two cases has
no isolation cell requirement by PST
Case II :
PST(VA) <> PST(VB)
VA
VB
ON
ON
OFF
ON
ON
OFF
OFF
OFF
Isolation
violation
If a normal buffer (powered by VB) is
inserted for n2
Signal cannot reach the load since VB can
be OFF for this power state.
Case III :
PST(VA) > PST(VB)
PST(VC) > PST(VB)
PST(VA) < PST(VC)
Isolation cell at PD_C or PD_B
PD_B (VB)
PD_C (VC)
PD_A (VA)
n1
n3
n2
Case IV :
PST(VA) < PST(VB)
Isolation cell at PD_B
Adding Normal Buffer (VB)
at net n2 leads to additional
isolation violation since VB is
more always on than VA
d
ISO
en
Iso_en
PMU
PD_B (VB)
PD_C
(VC)
PD_A (VA)
n1
n2
d
VA
VB
VC
ISO
Violation when Normal
buffer (VB) inserted at n2
en
Iso_en
ON
OFF
ON
Signal corrupted by VB, and pass
through isolation cells
PMU
n3
The proposed PST based AON synthesis algorithm has been evaluated
on a latest mobile SoC platform, which has more than 30 power domains
and complex power ON/OFF scenarios
The PST based AON synthesis algorithm has significantly reduced the
number of dont_touch net by AON synthesis algorithm from 36000 to
737, which achieves about 49X reduction gain.
SN AON
Number of dont_touch
nets due to AON alg.
36000
Cases
It has been verified that all the
remaining dont_touch wires by
AON Algorithms are due to PST
limitation.
49X ↓
PST AON
737
No. of Wires
Case I
477
Case II
0
Case III
260
Case IV
0
A new AON synthesis algorithm, based on PST in UPF, has been
proposed, to solve the issue of thousands of dont_touch attribute
on the wire assigned by current AON synthesis algorithm in
implementation tools.
The PST based AON synthesis algorithm has been tested with a
latest mobile SoC platform, which reduce the number of dont_touch
wires by 49X.