Novel Wafer-Scale Uniform Layer-by- Layer Etching Technology for

Novel Wafer-Scale Uniform Layer-byLayer Etching Technology for Line
Edge Roughness Reduction and
Surface Flattening of 3D Ge Channels
Y. Morita, T. Maeda, H. Ota, W. Mizubayashi, S. O’uchi,
M. Masahara, T. Matsukawa, K. Endo
Nanoelectronics Research Institute (NeRI)
AIST Japan
Novel Wafer-Scale Uniform Layer-byLayer Etching Technology for Line
Edge Roughness Reduction and
Surface Flattening of 3D Ge Channels
Y. Morita, T. Maeda, H. Ota, W. Mizubayashi, S. O’uchi,
M. Masahara, T. Matsukawa, K. Endo
Nanoelectronics Research Institute (NeRI)
AIST Japan
What's oxygen etching?
Oxide Growth
Si + O2
SiO2
Etching
2Si + O2
2SiO
2
What's oxygen etching?
OO
Si
O
O
or
Low O2 Pressure
O
Etching
O
Si
O
Si
Si
High O2 Pressure
O O
Si
O
Island
Formation
SiO2
Si
J. R. Engstrom and T. Engel, Phys. Rev. B 41 (1990) 1038.
3
What's oxygen etching?
Si
J. J. Lander and J. Morrison, J. Appl. Phys. 33 (1962) 2089.
4
What's oxygen etching?
Oxygen Etching of Si
2Si + O2
2SiO
Oxygen Etching of Ge
2Ge + O2
2GeO
5
Outline
•  What's oxygen etching?
•  Background
–  Why 3D Ge FET?
•  Objective
•  Measurement of O2 Etching
•  Electrical Characterization
•  Discussion
•  Summary
6
Background
7
Why 3D Ge FET?
3D channel G
S
D
Buried oxide
Si
3-Dimensional transistor
(Fin or nanowire-FET)
Thin Channel
Off-Current Reduction
3D Si FET to 3D Ge FET
8
Issues in 3D Channel
Resist / Hard Mask
RIE
PR
HM
Ge
Ge
BOX
BOX
Damage Removal
Flattening
Slimming
BOX
  Plasma Damage Free
  Roughness Reduction
  Channel Slimming
9
Objective
•  Can O2 etching be applicable for
nano-device fabrication?
10
Measurement of O2 Etching
11
Surface Morphology
•  Ge(001) AFM 2 × 2 μm
HF Treatment (Initial)
RMS 0.28 nm
Rough Step Edge Shape
O2 Etching PO2 = 10−6 torr
640oC RMS 0.12 nm
Etching of Step Edge
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Etch Depth Measurement
•  Mask Rebate Technique
Wet-cleaned
Ge or Si surface
SiO2
Etch depth
SiO2
SiO2
AFM
Ge or Si
Ge or Si
Ge or Si
Mask Patterning & Clean
Surface Formation
O2 etching
Mask light etch & AFM
Y. Morita, et al., Surface Science 604 (2010) 1432.
13
Visualization of Etch Depth
AFM after Mask Light Etch
Air View
0.5 × 0.5 μm
Etch depth
SiO2 mask
Ge surface
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Visualization of Etch Depth
AFM after Mask Light Etch
AFM Error Image
5 × 5 μm
Etch Depth
SiO2
Ge(001)
15
Visualization of Etch Depth
Ge(001)
Depth (nm)
•  Surface Cross-Sectional Profile
2
Etch depth
1
0
Mask rebate length
0
100
200
300
Distance (nm)
Etch Depth ~1 nm
16
Summary of Etch Rate
950 900 840 800 720 640500(°C)
PO2 (Torr)
10−5
10−5
~1 nm/min
10−6
10−6
10−7
Si
Ge
17
Summary of Etch Rate
•  Weak Temperature Dependence
O2 Pressure
•  Etch Rate
∞
–  Supply of O2
OO
Ge
O
O
or
Ge
Bottle-Neck Step
Low O2 Pressure
O
Etching
O
Ge
O
Ge
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Comparison of Etch Rate Variation
Ge
Variation of Temp.
±5%
EA ~ 0.3 eV
HCl etch
O2 etch
Ge640oC ±5%
+12.2%
Variation of
Etch Rate (HCl)
± ~ 0%
Variation of
Etch Rate (O2)
EA ~ 0 eV
-11.6%
O2 etchHCl etch
HCl Etch:
Y. Bogumilowicz, et al., Semicond. Sci. Tech. 20 (2005) 127.
19
Uniform SOI Thinning
Glue
SOI
Buried oxide
Si sub.
1000 nm
3.6 nm
•  Uniform Etching
for Large Area
SOI
BOX
500 nm
20
O2 Etching of 3D Channel
21
Nanowire-FET by O2 slimming
SOI and hard mask formation
-- (a)
EB lithography & RIE
-- (b)
Cleaning
O2 Slimming
-- (c)
ALD HfO2 & poly-Si gate
NiSi2 source/drain
Dopant implantation & activation
(a)
(b)
SiNW direction: [110]
(c)
SiO2 Hard Mask
HM
SOI
SiNW
BOX
BOX
HM
BOX
SiNW
22
Nanowire-FET by O2 slimming
Channel Cross-Section
O2 Slimming
Without O2 Slimming
HfO2
(a)
HM
HfO2
(b)
HM
SiNW
SOI
50 nm
BOX
3.9 nm
BOX
PO2 = 1 × 10−5 torr 900oC
3.9 × 9.0 nm
50 nm-width SOI is etched from both sides.
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LER Reduction
w/o O2 etch
O2 etch Ge
O2 etch Si
w/o O2 etch
O2 etch Ge
O2 etch Si
Ra (nm)
2.26
1.1
0.52
3σ (nm)
7.84
3.31
1.94
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I-V of O2-Slimmed Si NW FET
Gate
NiSi2
NiSi2
S
Source
D
Drain
360 nm
Lc ~360 nm
WNW ~8 nm
25
Discussion
26
Roughness Reduction
•  Higher Temperature
Smaller Roughness
Ge(001)
w/o Anneal
N2 Anneal
O2 Etch
Etch Depth ~1 nm
RT
27
Roughness Reduction
•  O2 etch can selectively reduce roughness.
–  AFM 2 × 2 μm
Ge(001) w/o anneal
O2 Etching PO2 = 10−6 torr, 500oC
~ 1 nm Etching RMS 0.14 nm
N2 Anneal
RMS 0.28 nm
PN2 = 0.1 torr, 500oC RMS 0.18 nm
28
Summary
•  Novel O2 Etching Technology for 3D Ge
Channel
–  Uniform Etch Rate for Large Size Wafer
–  Atomically Flattened Surface
–  No Plasma Damage
–  Slimming and Smoothing for 3D Channels
•  Enhancement of Device Performance
•  Applicable for Future Channels
–  Vertical Nanowire
–  V-Groove etc..
29