Progress in Electromagnetic Research Symposium 2004, Pisa, Italy, March 28 - 31
Design Study of 3D FDTD/FIT Dedicated Computer on FPGA
H. Kawaguchi
Muroran Institute of Technology
27-1, Mizumoto-cho 050-8585
Muroran, JAPAN
e-mail: [email protected]
S. Matsuoka
Muroran Institute of Technology
27-1, Mizumoto-cho 050-8585
Muroran, JAPAN
e-mail: [email protected]
Abstract
In this paper, a design study of a three dimensional FDTD / FIT dedicated computer is presented.
As a kind of the high performance computing technologies for numerical simulations of
electromagnetic wave fields, authors have been working in development of a 2D FDTD / FIT
dedicated computer. Up to now, a design and the VHDL simulation of the basic architecture and other
functions including absorbing boundary conditions are presented, and test operation of the dedicated
computer on the FPGA were successfully finished. However, electromagnetic wave fields are mostly
three dimensional in many cases, therefore, 3D FDTD / FIT machines are essential from practical
points of view. This paper presents the basic design and the VHDL simulation of the 3D machine.
Introduction
As a trial of the High Performance Computing (HPC) for numerical simulations of electromagnetic
wave fields, authors have been working in development of a FDTD / FIT dedicated computer. To
fully bring out parallel properties of the FDTD / FIT scheme and achieve its maximum performance,
the FDTD / FIT dedicated computer takes a data flow architecture to use a number of data registers
instead of the Random Access Memory (RAM).(see Fig.1) In addition to the basic algorithm of the
FDTD / FIT data flow machine, implementation of perfect conductor boundary condition, dielectric
material boundary conditions and absorbing boundary condition were also considered, and included in
the design of the machine. Up to now, as an first step, two dimensional FDTD dedicated computer was
designed by the VHDL and validity of the VHDL code of the FDTD / FIT data flow machine was
confirmed by comparison of the VHDL logic simulation with software simulation of C language.[1]
And moreover, implementation of the FDTD / FIT dedicated computer on the Field Programmable
Gate Array (FPGA) and its test operation were successfully done. [2,3]
In this paper, a design study of the three dimensional FDTD / FIT dedicated computer is presented.
Electromagnetic wave fields are mostly three dimensional in many cases, therefore, the 3D FDTD /
FIT machines are essential from practical points of view. Design of basic architecture, module
structure of the dedicated computer, data exchange between the modules and the VHDL simulation for
machine operation are proposed.
Figure 1. Overview and detail one grid circuit of 2D FDTD / FIT data flow machine.
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Progress in Electromagnetic Research Symposium 2004, Pisa, Italy, March 28 - 31
Configuration of 3D FDTD / FIT Dedicated Computer
Expansion of 2D FDTD / FIT dedicated computer architecture to 3D one can be done by
straightforward manner. Faraday’s law and Ampere’s laws of Maxwell’s equations are expressed as
in the following form;
(
)
(
1
+ (b
2
)
)
(3)
(
)
(4)
(
)
(5)
(
)
(6)
1 n + 12
n+ 1
n+ 1
n+ 1
bz (i , j , k ) − bz (i ,2j −1, k ) + by (i ,2j , k −1) − by (i ,2j , k )
2
exn(+i 1, j , k ) = exn(i , j , k ) +
e ny (+i1, j , k ) = e ny (i , j , k ) +
e zn(+i1, j , k ) = e zn(i , j ,k )
1 n+ 12
n+ 1
n+ 1
n+ 1
bx (i , j , k ) − bx (i ,2j ,k −1) + b z (i −21, j ,k ) − bz (i ,2j ,k )
2
n + 12
y (i , j , k )
n+ 1
n+ 1
n+ 1
− b y (i −2 1, j , k ) + bx (i ,2j −1, k ) − bx (i ,2j ,k )
n+ 1
n− 1
1 n
e z (i , j , k ) − e zn(i , j +1, k ) + e ny (i , j ,k +1) − e ny (i , j , k )
2
n+ 1
n−1
1 n
e x (i , j , k ) − e xn(i , j , k +1) + e zn(i +1, j , k ) − e zn(i , j , k )
2
n+ 1
n− 1
1 n
e y (i , j , k ) − e ny (i +1, j ,k ) + e xn(i , j +1, k ) − e xn(i , j , k )
2
bx (i ,2j , k ) = bx (i ,2j , k ) +
b y (i ,2j , k ) = b y (i ,2j , k ) +
bz (i ,2j , k ) = bz (i ,2j , k ) +
(1)
(2)
where, in the above equations, the normalized electromagnetic field values e =
stable condition
c∆t 1
= are invoked.
∆l
2
E
, b = B and the
c
The conceptual machine architecture for a unit grid of the 3D FDTD / FIT dedicated computer is
shown in Fig.2. Every em field components are stored in individual registers. The logic circuit for the
magnetic field calculation (eqs.(4)-(6)) is shown in Fig.2 (a) and circuit for the electric field one
(eqs.(1)-(3)) is shown in Fig.2 (b). In the real machine, these circuits are combined each other and
implemented as one circuit. Basic machine operation is same as in the 2D machine, that is, the
magnetic and electric field components are alternatively calculated with only one clock cycle
respectively.
ey
ey
ez
by
by
ez
bx
bx
bz
bz
ex
ex
(a) circuit for magnetic field
(b) circuit for electric field
Figure 2. Conceptual machine architecture of 3D FDTD / FIT dedicated computer.
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Progress in Electromagnetic Research Symposium 2004, Pisa, Italy, March 28 - 31
In the design of real machine, many other practical considerations are needed in addition to the basic
machine architecture of Fig.2. For example, the figure 3 shows module structure of a calculation unit
in the 3D FDTD / FIT dedicated computer. The calculation unit consists of the register module,
calculation module, ROM for encoded control signals and a power input module (a sinusoidal signal
generator). To make effective LSI layout, register region and arithmetic calculation region are
separately allocated. The field component values stored in the register region are loaded to the
arithmetic calculation region, and stored again in the register region soon after the field values are
updated according to the FDTD / FIT scheme. The sinusoidal input signal is superposed on the field
value in the arithmetic calculation region at the specified power input point. Perfect conductor
boundary conditions are imposed by data clear of the register referring encoded control signals in the
ROM.
VHDL Simulation of Machine Operation
The FDTD / FIT dedicated computer is described by the VHDL programming and implementation
of its real machine is done on the FPGA. To use the VHDL development tool, the machine operation
can be virtually checked by the VHDL logic simulation. We tested the VHDL programming for the
numerical model of Fig.4. The simulation region is 13 x 13 x 3 grid size space which is assumed to be
surrounded by the perfect conductor boundary condition. The electromagnetic fields are excited by
sinusoidal signal at the center point.
The VHDL simulation result of distribution of bz field component on x-y middle plane at 13-th time
step is shown in Fig.5 (a). In Fig.5 (b), numerical simulation by C language is shown. We can find
good agreement each other, and can confirm that the VHDL programming for the 3D FDTD / FIT
dedicated computer is correctly done.
Conclusion
Design and the VHDL simulation of the 3D FDTD / FIT dedicated computer has been presented in
this paper. In addition to its basic architecture, practical functions such as perfect conductor boundary
conditions are considered, and it is confirmed by comparison with C language simulation that the
VHDL programming for the dedicated computer is correctly done. For the dedicated computer of
Fig.4, equivalent computer performance is estimated as 0.1 T FLOPS if we assume that the clock
frequency is 100 MHz. It is enough high performance for a single LSI. Especially this dedicated
computer has very good scalability in parallel computation operation, therefore, much higher
performance is expected in multi-LSI interlocking operation.
Figure 3. Module structure of calculation unit in 3D FDTD / FIT dedicated computer
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Progress in Electromagnetic Research Symposium 2004, Pisa, Italy, March 28 - 31
On the other hand, during the consideration of the design of the 3D machine, the following
problems become clear;
- Huge hardware size is needed in the 3D dedicated computer
- It is hard to upload simulation results from the dedicated computer to external storage.
- Multi-LSI interlocking operation is difficult because of a lack of I/O interface pins.
Authors are now working in development of an another type of the 3D FDTD / FIT dedicated
computer which is free from the above difficulties.
REFERENCES
1. S. Matsuoka and H. Kawaguchi, “Study of a Microwave Simulation Dedicated Computer, FDTD/FIT Data
Flow Machine”, IEICE Trans. Electron., vol. E86-C, No.11 (2003), pp.2199-2206.
2. Matsuoka and H. Kawaguchi, FPGA Implementation of the FDTD Date Flow Machine, Proc. of 2003
IEEE Topical Conference on Wireless Communication Technology October 15-17 2003, Honolulu.
3. S. Matsuoka, H. Kawaguchi, Development of Data Flow Type FDTD/FIT Dedicated Computer by Using
FPGA, ABSTRACTS of 1st Asia-Pacific International Conference on Computational Methods in
Engineering (ICOME), 5-7 Nov. 2003, pp.9-10.
Figure 4. Numerical model of VHDL simulation
bz
bz
y
y
x
x
(a) VHDL simulation
(b) C language simulation
Figure 5. VHDL simulation of machine operation
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