NARASARAOPETA INSTITUTE OF TECHNOLOGY, NARASARAOPETA
II-I CSE
DIGITAL LOGIC DESIGN (Aruna Sree)
ASSIGNMENT – II
UNIT-IV
1.. a) Draw the circuit diagram of J-K flip flop with NAND gates with positive edge
triggering and explain its operation with the help of a truth table.
b) What is race around condition and how is it eliminated
2.. a) Define the following terms related to flip-flops.
i)set-up time ii) hold time iii) propagation delay iv) preset and v) clear.
b) Discuss D-type edge- triggered flip-flop in detail?
3. a) Convert a T flip flop to D type flip flop.
b) Explain the working of a master-slave JK flip flop. State its advantages.
4. a) Distinguish between combinational logic and sequential logic.
b) How could:
i) a JK flip-flop be used as a D-type?
ii) a JK flip-flop be used as a T-type?
iii) a D-type flip-flop be used as a T-type?
UNIT-V
1.Design a register to perform left shift and right shift for the following data 10110101 ?
2. Draw and explain 4-bit universal shift register
3 . Explain different types of shift registers.
4. Draw the logic diagram for a 4-bit binary ripple down counter using positive edge triggered
D-flip-flops.
UNIT-VI
1a) Draw the internal logic construction of 32X4 ROM and explain how an Boolean
expression is implemented using it.
b) Implement the following Boolean expressions using ROM
F1 (A,B,C) =ε m(0,2,4,7)
F2 (A,B,C) = ε m(1,3,5,7)
2 a) Draw and explain the block diagram of PLA
b) Implement following Boolean functions using PLA
F1 (A,B,C) = ε m(0,1,3,5) and F2 (A,B,C) = ε m(0,3,5,7)
3 a) Give the comparison between PROM, PLA and PAL (6M)
b) Realize the BCD to EXCESS-3 code converter using PLA
4 a) Realize the following Boolean function using PROM f (x, y, z, w) = ε m (0, 1, 3, 6, 8, 9, 15).
b)List the PAL programming table and draw the PAL structure for the BCD-toexcess-3-code converter.