CPSC 121: Models of Computation
Lab #6: Shift Registers
Objectives
In this lab, you’ll see more on memory circuits and sequential circuitry, getting valuable practice with both.
1
Pre-lab
In last week’s lab, we showed you a serial in, parallel out (SIPO) shift register:
Figure 1: Three flip-flops connected in series, with parallel outputs. As there are three bits of memory in this shift
register (one in each flip-flop), we call this a 3-bit SIPO shift register.
A SIPO shift register may also be denoted with shorthand like this:
A different type of shift register is a parallel in, serial out (PISO) shift register. Its shorthand looks like this:
Consider the following problem: A student tries to make a 2-bit parallel-to-serial-to-parallel circuit, with this in mind:
1
But the student gets stuck on how to clock the circuit, after coming up with the following:
After 4 clock cycles, the student wants X to output the value of A, and Y to output the value of B
TODO (pre-lab): There are three dangling wires on this circuit, which should be either connected
to the clock at the top, or a clock wave with half its frequency (we have provided a frequency
divider). On the circuit diagram above, connect the wires so the circuit would work as intended.
It will be helpful to set initial values for A and B (for example, A=1, B=0), and track how the values are passed
along the circuit. A clock wave diagram like the one below will help you track these values for your wiring
arrangement, as the clock cycle (top) and divided clock signal (bottom) progress.
Note that in Logisim, the D input for a flip-flop is on the lower-left, and the clock input is on the upper-left.
2
2
Shift registers
TODO: Download the file piso sipo.circ from the website, and implement your work from the
pre-lab. Make any further modifications as necessary for it to work as expected. As you’re testing
your work, you can reset your circuit in Logisim at any time by opening the “Simulate” menu and selecting “Reset
Simulation.”
3
Factorials
The factorial n! of a positive integer n can be defined as n! = n · (n − 1)! for all numbers greater than 0; if n is 0,
then n! is 1. TODO: Download the file factorial bug.circ (shown above) from the website. This
circuit is meant to calculate factorials: identify the problem with the circuit, and correct it.
Note: A type of memory circuit known as a register has been used in this circuit. This is basically a multi-bit
flip-flop. The Register module in Logisim is found under “Memory” in the left-hand navigation panel. To identify
components of the factorial circuit, use Logisim’s edit tool to click on each component: the lower half of the
left-hand navigation panel will display the name of the selected component. You can also click on a wire at any
point to see its current value in both binary and decimal.
You will find it helpful to use Logisim’s logging function. Open ”Logging” from the ”Simulate” menu. The left-hand
column under the ”Selection” tab displays components that you can add to the right-hand column, which will allow
you to track their values as you clock the circuit. Once you’ve done this, you can click each item in the right-hand
column and press ”Change Radix” to choose whether you’d like the value to display in binary, decimal, or hexadecimal.
To view the values, click on the ”Table” tab. As you clock the circuit, you will now see a log of the changing values.
3
4
Fibonacci Numbers
A Fibonacci number works like this:
• if n is 0 or 1, f (n) is 1
• all subsequent numbers follow the pattern f (n) = f (n − 1) + f (n − 2)
For example, the series starts as 1, 1, 2, 3, 5, 8, 13, etc.
TODO: Design on paper a sequential circuit (much like the Factorial circuit above) which calculates Fibonacci numbers. You may use multi-bit registers, multi-bit wires, and multi-bit adders (just draw
a box and label it “adder”).
Note: Your circuit does not have to produce the value of f (n) when n is 0 and 1. For example, if you build an
8-bit circuit, it can calculate the sequence 1, 2, 5, 8, 13, 21, ... , 89.
TODO: Implement your circuit in Logisim. Use Logisim’s register and adder modules, which work with
multi-bit inputs. You can change the number of bits a component works with by selecting it with the edit tool,
and changing the “Data Bits” field in the lower left-hand navigation panel.
4
5
Random-access memory
You’ve now seen two different memory circuits in Logisim: the flip-flop, and the register. The following section
introduces you to a new type of memory: RAM (random-access memory).
Download the file Y86-RAM.circ from the 121 website, and load it in Logisim. It will look like the image below.
This circuit simulates a component of a fully-functional computer processor, like the one in your computer. By
the last lab of this term, you will be able to explore and understand a Y86 processor simulation. The component
below is part of the 16 MB RAM module of this Y86 simulation.
Each row in this circuit’s RAM module (click on the components to identify which module this is) stores one
8-digit hexadecimal number. The address of each row in the memory is shown by a grey number to the immediate
left of the row. The Y86 16 MB RAM module will hold a series of hexadecimal numbers that constitute a set
of instructions used to program the hardware, much like the code you will load into the RAM below.
TODO: Figure out how to load the following set of instructions into your RAM module, and then
show your TA the loaded values:
30820000 00013181 00000005 30800000
5
6
Further Analysis
Shift registers are often used to convert between parallel and serial transmissions. TODO (further analysis):
What are some advantages and disadvantages of parallel and serial transmission? Provide some
examples of where serial and parallel transmission are used, and where converting between the
two is necessary.
TODO: Download the file and bug.circ from the website. There is a problem with this circuit;
identify and fix it in Logisim. Explain what is causing this bug. Note: The circuit itself is not meant
to do anything particularly interesting: focus on the unexpected behaviour in this circuit, given the models we
have worked with and your own reasoning about what should, or should not, be happening.
7
End of Lab Survey
TODO: To help us improve these labs both this term and for future offerings, complete the survey
at http://www.tinyurl.com/cs121labs.
6
8
Challenge problem
In piso sipo.circ, the PISO portion of the circuit was done by putting a multiplexer after the parallel flip-flops.
However, a PISO shift register is usually constructed like this:
Download the file piso.circ. Compare an contrast this PISO shift register with the one in piso sipo.circ.
How does this one work? What does the mode control do?
9
Marking scheme
All labs are out of ten marks, with two marks for pre-labs, and eight marks for in-lab work. In more detail:
• 2 marks - Pre-lab questions
• 5 marks - In-lab questions – one mark per “TODO: ”. In this lab, it is 1 mark for the piso-sipo implementation,
1 mark for factorials, 2 marks for Fibonacci numbers, and 1 mark for RAM.
• 2 marks - For detailed analysis or insight in approaching assigned work, such as by answering the questions
labeled (for analysis marks) with more than one sentence of work. (TAs at their discretion may occasionally
award these marks for detailed analysis seen in other parts of the lab.)
• 1 mark - End of lab survey.
TAs may at their discretion award one bonus mark, such as for completing a challenge problem. It is expected
that most students will achieve 6-8. If you feel you’re heading for 0-5, get immediate help from the TAs!
7