CPU Execu*on Instruc*on CPI Clock Cycle = X
X
Time Count Time §  IC = 1 billion, 500 MHz
processor, execution
time of 3 seconds.
What is the CPI for
this program?
3 sec = 1*10^9 inst*CPI * 1sec/
(5*10^8)cycles
1.5*10^9 cycles = 10^9insts*CPI
Selectio
n
CPI
A
3
B
15
C
1.5
D
15*10^9
E
None of the above
1.5 = CPI
1
§  Answer C
2 Who Affects Performance?
CT IC CPU Execu*on Instruc*on CPI Clock Cycle = X
X
Time Count Time §  There are a number of people involved in
processor / programming design
§  Each of these elements of the performance
equation can be impacted by different designer(s)
3
Who Affects Performance?
CT IC CPU Execu*on Instruc*on CPI Clock Cycle = X
X
Time Count Time §  What can a programmer influence?
Selection
A
B
C
D
E
Impacts
IC
IC, CPI
IC, CPI, and CT
IC and CT
None of the above
4
§  Answer B
5 Who Affects Performance?
CT IC CPU Execu*on Instruc*on CPI Clock Cycle = X
X
Time Count Time §  What can a compiler influence?
Selection
A
B
C
D
E
Impacts
IC
IC, CPI
IC, CPI, and CT
CPI and CT
None of the above
6
§  Answer B
7 Who Affects Performance?
CT IC CPU Execu*on Instruc*on CPI Clock Cycle = X
X
Time Count Time §  What can an instruction set architect
influence?
Selection
A
B
C
D
E
Impacts
IC
IC, CPI
IC, CPI, and CT
CPI and CT
None of the above
8
§  Answer C
9 What if we want to add b,c,d, and e and put the
result into a using MIPS statements?
a) add a, b, c
add a, a, d
add a, a, e b) add a,
c) add a,
add d,
add a,
d)
b, c, d, e
b, c
d, e
a, d
add a , b, c
add a, d, e 10 §  Answer A and C
11 Which of the following statement is
generally true about ISAs?
Select Statement
A
Many models of processors can support one
ISA.
B
An ISA is unique to one model of processor.
C
Every processor supports multiple ISAs.
D
Each processor manufacturer has its own
unique ISA.
E
None of the above
12
§  Answer A
13 §  In the snippet of MIPS assembler code below, how many times
is the memory accessed ? How many times data is fetched
from memory?
lw
addi
sw
addi
$v1,
$v0,
$v1,
$a0,
0($a0) $v0, 1
0($a1) $a0, 1
( a) 2, 2
(b) 1, 2
(c) 1, 1
(d) 2 , 1
14 §  Answer D
15 Your architecture supports 16 instructions and 16
registers (0-15). You have fixed width instructions
which are 16 bits. How many register operands can
you specify (explicitly) in an add instruction?
Selection
operands
A
<= 1
B
<= 2
C
<= 3
D
<= 4
E
None of the
above
16
§  Answer C
17 Your architecture supports 16 instructions and
32 registers (0-31). You have fixed width
instructions which are 16 bits. How many
register operands can you specify (explicitly) in
an add instruction?
Selection operands
A
<= 1
B
<= 2
C
<= 3
D
<= 4
E
None of the
above
18
§  Answer B
19 Accessing the Operands
There are typically two locations for operands – registers (internal
storage - $t0, $s0) and memory. In each column we have which - reg
or mem - is better. Which row is correct?
A
Faster
access
Mem
Fewer bits to More
specify
locations
Mem
Reg
B
Mem
Reg
Mem
C
Reg
Mem
Reg
D
Reg
Reg
Mem
E
None of the above
20
§  Answer D
21 Processor X is 16 bit byte-addressable. If you have a
pointer at address 0000 0000 0000 1000 and you increment
it by one (0000 0000 0000 1001). What does the new
pointer (0000 0000 0000 1001) point to, relative to the
original pointer (0000 0000 0000 1000)?
A)  The next word in memory
B)  The next byte in memory
C)  Either the next word or byte – depends on if you use that
address for a load byte or load word
D)  Pointers are a high level construct – they don’t make
sense pointing to raw memory addresses.
E)  None of the above.
22
§  Answer B
23 Processor Y is 14 bit word-addressable. If you have a
pointer at address 00 0000 0000 1000 and you increment it
by one (00 0000 0000 1001). What does the new pointer (00
0000 0000 1001) point to, relative to the original pointer (00
0000 0000 1000)?
A)  The next word in memory
B)  The next byte in memory
C)  Either the next word or byte – depends on if you use that
address for a load byte or load word
D)  Pointers are a high level construct – they don’t make
sense pointing to raw memory addresses.
E)  None of the above.
24
§  Answer A
25