White Paper
“The Move to the next
Silicon Wafer Size”
The Move to the next Silicon Wafer Size: A White Paper from the
European Equipment and Materials 450mm Initiative (EEMI450)
Introduction: Industry Dynamics and Moore’s Law
The semiconductor manufacturing industry has undergone dramatic growth during
the second half of the last century, and throughout the first decade of the new
millennium. A primary driver of that growth is the realisation of “Moore’s Law”,
whereby the number of transistors in an integrated circuit doubles approximately
every 2 years with an associated increase in circuit functionality, reduction in
operational power, and a reduction in unit cost. This, in turn, leads to an increased
market demand for consumer products containing silicon integrated circuits, such as
personal computers, mobile phones, and other electronic devices.
As an economic consequence, the silicon wafers used in the manufacturing
processes to produce the silicon chips have undergone a diameter increase
approximately every 10 years to improve throughput and reduce manufacturing
costs. Silicon wafers that have been used in high volume manufacturing processes
range from 1-inch diameter, to the current state of the art diameter of 300mm (11.8inch, usually referred to as 12-inch). During this wafer size evolution, the ever
increasing complexity of the supply chain of semiconductors has, and continues to
demand, an increasing involvement from materials suppliers and equipment
manufacturers.
Tier 1 Initiatives
The next silicon wafer size is destined to be 450mm (18-inch), and activities are
currently underway amongst the Tier 1 Semiconductor Manufacturing Companies,
Intel, Samsung, TSMC and others, to prepare for manufacturing using this next
wafer size in the second half of the current decade. In order for this to happen, a
plethora of technological breakthroughs are required from the Equipment and
Materials organisations, beyond a simple scale-up and extension of current
technologies. This represents a global challenge as these organisations operate in
all regions of the World. The European Equipment and Materials organisations
therefore have a key role to play in this activity. By taking this initiative to be involved
in this next wafer size transition, they will have the opportunity to establish share of
the 450mm equipment and materials market.
Why the transition to the next generation wafer size?
There is one fundamental and compelling question to be answered at each of the
semiconductor manufacturing industry’s wafer transitions; from the very early 2-inch
diameter and less generations of the 1950’s and 60’s, through the 3-inch and 4-inch
of the 1970’s, the 5-inch and 6-inch of the 80’s, the 200mm (8-inch) of the 90’s, the
300mm (12-inch) of the 2000’s, and now the 450mm (18-inch) generation expected
in the second half of this decade and second century of semiconductor
manufacturing.
That question is: Why is a 50%-diameter increase in
semiconductor processing platform needed about every decade?
2inch, 4inch, 6inch and 8inch silicon wafers used
in semiconductor manufacturing processes
As with the previous wafer size transitions, the move to 450mm is largely driven by
the productivity, environmental, and economic challenges of the semiconductor
industry as it continues to evolve. In particular:
-
The number of semiconductor manufacturing fabrication facility (“fab”)
construction projects must be sustainable based on both its
manufacturing complexity and environmental impact;
-
The productivity and thus the economic feasibility of semiconductor
manufacturing costs must be preserved [normalized for analysis purposes
as cost per square centimeter (cost/cm2)] in the face of continuous and
exponentially increasing manufacturing facilities, equipment and materials
costs. These costs are driven by the technology investments required to meet
customer expectations for the doubling of functionality and performance
approximately every 2 years, as defined by Moore’s Law.
If we look at the data governing the volume of silicon shipped during the history of
the semiconductor industry (based upon the SEMI ® silicon shipment history), we can
see that, historically, the baseline demand compound annual growth rate (CAGR) is
a constant 7.6% since 1993, and prior to that was 15%, with periodic cycles around
these core rates. These major business cycles have occurred with a 7 to 8-year
periodicity, with a minor “slowing” cycle in between the major cycle trough and peak.
Another factor affecting the growth rate of the industry is the overall downward trend
of the Average Selling Prices (ASPs), which in effect has turned what used to be
luxury electronic devices into commodity goods for the general public. The chart
below, provided by the International Semiconductor Manufacturing Initiative (ISMI),
shows what to expect if the CAGR trends continue into the future.
At a CAGR of 7.6%, the amount of silicon shipped for all types of electronic products
such as memory, microprocessors, and other specific logic devices would double in
less than 10 years. This would therefore require new factory capacity to sustain
such growth. In previous wafer size generations, this has led to the adoption of the
next-generation wafer size in order to reduce the number of factories to be built and
sustained. Therefore, at some point in the future along this demand curve, despite
any future possible industry consolidation, it will become more economical for chip
makers to build one 450mm factory rather than two 300mm factories.
At a CAGR of 7.6%,
the amount of silicon
shipped for all types of
electronic
products
such
as memory,
microprocessors and
other specific logic
devices would double
in just less than 10
years.
When the cycle-based demand growth is applied to the ISMI Industry Economic
Model in a scenario without the 450mm wafer generation, the number of 300mm
equivalent 35K wafer starts per month (wspm) fab capacity increments rises to
above 500 fabs, for all wafer generations, by the middle of this decade, and to
above 600 fabs into the next decade. Based on this model, the level of fab capacity
in any one wafer generation would rise to a level unprecedented in history, and
create untenable challenges for companies required to meet the anticipated
customer demand associated with many different products. With further potential
industry consolidation, and therefore new factory builds resting with fewer
companies, these challenges become even more critical.
Even if the size of an individual company’s actual site (versus normalized 35K wspm
equivalent increments) grows to take advantage of scale, the pressures upon the
company resources for personnel, training, and facility infrastructure will be
challenging even under the 300mm-only scenario. In addition, the environmental
impact of water usage, sewage effluent, and efficient materials and energy usage
will be far greater on a per square centimeter basis, as demonstrated by the 300mm
wafer generation’s own history during the 200mm to 300mm transition from 2001 2010.
Another consideration in the absence of 450mm manufacturing would be the number
of incremental new 300mm fab additions required to support the growing
semiconductor market. This would be greater than the number of 450mm facility
builds required, and hence could increase the number of annual build projects above
the historic steady and sustainable level.
A 450mm Roadmap
Looking from a cost perspective, historically, the cumulative cost per transistor
benefit, weighted across all product types (with memory functionality most heavily
weighted) resulted in a compound reduction of cost per function of -29% per year.
This reduction was a combination of doubling the functionality in a square centimeter
every two years (as per “Moore’s Law”) and keeping the cost of manufacturing for
that square centimeter approximately flat. The benefit of a new wafer size
generation’s productivity has been estimated in the past by “resetting” by a 30% cost
reduction every 10 years the ~3-4% /year exponentially increasing costs due to
technology cycle upgrades and insertions, e.g., copper interconnects replacing
aluminium.
Although not necessarily desired, the ITRS has been anticipating a slowdown in the
rate of the technology cycle from 2 years, to 3 years, resulting in a slowing of the
functional density in a square centimeter. In the absence of a 450mm productivity
solution, the net slowdown effect upon the combination of the slower density and the
higher cost per square centimeter results in only a -27% average cost/transistor
reduction rate. This may appear to be a minor effect, but over the 2006 -- 2024
timeframe, the slower rate produces a cumulative ~1 trillion dollar productivity
difference impact without the 450mm wafer generation productivity gain. (In order to
arrive at this statement, an in depth analysis should be performed per product type,
taking in to account certain industry specific details e.g. EUV introduction, initial high
cost of 450mm silicon and Flash cost growth due to 3D layer implementation. This
analysis is possible with the IC Knowledge Strategic Cost Model tool; see below.)
[graphic proposal for EEMI450 white paper –
without $ references]
al for EEMI450 white paper –
nces]
Flash
~25%
Cost Savings
DRAM, MPU
~30%
Cost Savings
Flash
~25%
Cost Savings
DRAM, MPU
~30%
Cost Savings
Source: Strategic Cost Model –
revision 1106
9 February 2012
All rights reserved IC Knowledge
(www.icknowledge.com) for use by
licensed subscription owners
... over the 2006-2024
timeframe, the slower
rate
produces
a
cumulative ~1 trillion
dollar
productivity
difference
impact
without the 450mm
wafer
generation
productivity gain.
A New Analytical Model
In
2010,
an
Industry
analysis
Company,
IC
Knowledge
(ICK),
(www.icknowledge.com) developed a new commercial Strategic Model, based on the
2009 ITRS (www.itrs.net), which enables cost analysis over the 2009 -- 2024 range.
A demonstration of the new Strategic Model analysis for the 300mm to 450mm
analysis under various assumptions (original 200mm to 300mm assumptions, ISMI
assumptions, and ISMI/SEMI® assumptions) can be viewed online at the ICK
website.
The analysis demonstrates the new high levels of cost per cm2 that are a challenge
for each product group (memory, logic etc.), and also demonstrates cost per cm2
reduction possible from the 450mm generation production at a given technology
level (16nm Logic and NAND, and 24nm DRAM are analysed). One generic
economic conclusion of concern is that increasing cost per cm2, and reduced
density over time will affect the elasticity of demand for semiconductor
products and slow down industry growth. Increased costs due to the absence of
the 450mm will contribute to the economic slowing, in addition to the fab
sustainability and environmental impact. (It is important to note that the analysis
snapshot assumes that silicon starting material is compared at a mature cost level.
For every wafer generation the starting material starts out very high, but drops
quickly as volumes ramp.)
Conversion to 450mm diameter wafers can only occur if the economic advantages
can be demonstrated for the entire supply chain. One of the benefits of cost analysis
using the ICK Strategic Model (available to purchase on the ICK website) is that it
generates the demand for equipment to manufacture an incremental fab volume at a
particular technology level of a product process flow and assumptions. There are
many different sets of assumptions that can be made when developing a model of
this type, but the fact remains that despite all of these differing scenarios, as with
historic wafer size transitions, the move to 450mm enables a reduction in cost per
cm2.
Expectations for the industry’s future anticipate a healthy demand for both 300mm
and 450mm equipment, which should justify the research and development
investments by manufacturers, suppliers, and their consortia, as well as
funding agencies to prepare and meet the 2015 target ramp (2009 ITRS
scenario), and the next years of affordable customer demand. The ability to
extend Moore’s Law into the future is dependent upon the development and
production of new semiconductor manufacturing equipment. The operating costs
associated with the silicon IC manufacturing Industry are heavily dominated by the
cost of the equipment depreciation and maintenance. Therefore, by providing a new
generation of processing equipment for 450mm silicon wafers, IDM, Foundry and
OEM organisations are set to benefit in the future, and enable the sustained growth
of the Industry. This fact remains true despite future potential industry consolidation
and increased use of Foundries by “Fab-less” and “Fab-Lite” companies.
The
operating
costs associated
with the silicon IC
manufacturing
Industry
are
heavily dominated
by the cost of the
equipment
depreciation and
maintenance.
The equipment of the 450mm generation will have to meet currently unknown high
yield manufacturing ramp rates, challenging levels of defect free operation, and
extreme reliability performance. Therefore, a series of research and development
efforts will have to be invested into equipment improvements and innovations. Of
special importance will be the areas of
-
mechanical handling improvements,
contamination and defect free operation,
joint assessment for fast ramp-up
Advanced Process Control (APC),
comprehensive introduction of virtual metrology,
innovative maintenance strategies,
ultra low relative energy consumption,
severe reduction of consumables and operating materials, their re-use and
regeneration (Cost of Ownership improvements),
waste free or waste reduced processing.
The above list is certainly not exhaustive, and it is definitely expected to transfer the
resulting equipment improvements into the next generation of 300mm production
equipment. There exists an outstanding benefit for European Equipment and
Materials manufacturers to pool their efforts, to get support by Public Authorities at
European and National level on their first steps into this required research and
development. Thus, not only the 450mm technology will become a success story,
but also the next generation of 300mm equipment and the More-Than-Moore fabs
will have strong benefits, resulting presumably in safeguarded employment and in
several thousands of new, high quality jobs across Europe. Perhaps to reduce risk,
innovations on 300mm equipments and then scale up to 450mm may be a
sometimes preferred route for both OEMs and IDMs, and subsequent process
technology development on 300mm wafers, then scale up, a cheaper approach for
IDMs to follow. The presence of an appropriate supply chain, and of customers of
450mm processed wafers, could be an invaluable attraction to maintain
semiconductor production in Europe and to consider Europe for additional 450mm
fabs.
Background on Equipment and Materials
Overview
The following chart shows the worldwide sales of semiconductors and semiequipment, plus the percentage of annual turnover the semiconductor manufacturers
spend on equipment. The following can be deducted from these figures.
Source: Future Horizons/Internet
From 1995 to 2010, the worldwide semiconductor turnover increased over time,
despite occasional ups and downs, around a factor of 2. This is not the case for their
capital equipment investments. While the peak in the year 2000 has still not been
reached, the period 2002 to 2007 shows a steady increase, mainly based upon the
investments in new 300mm fabs. This becomes clearer when using an appropriate
scale.
Source: Future Horizons
Additionally, one can observe that during this phase the investment in new
equipment as percentage of semi turnover was about constant, around 15% (these
figures differ somewhat depending on the source, some claiming higher values in the
range of 20- 22%) after the large millennium peak of 2000. It can also be seen that
the decrease in equipment sales commenced in 2007, at least a year before
semiconductor sales hit the full crisis. Nevertheless, the generally rising investment
in equipment in the years 2001 to 2007 can be linked to the number of new 300mm
fabs installed during that timeframe.
Source: IC Knowledge
Two data points emerge:

In 2002, 38.2% of equipment purchased by the semiconductor
manufacturers was for 300mm production, and 1.4% of silicon wafers
processed in 2002 was 300mm.

In 2008, 92.1% of equipment purchased was for 300mm production, and
37.4% of silicon wafers processed was 300mm.
Therefore it can be concluded:

After introduction of the new wafer size, equipment purchases quickly
became 300mm dominant.

Equipment makers not able to provide 300mm tools could only serve 8%
of the total market in 2008.
Similar scenarios are currently anticipated for the 300mm to 450mm wafer size
transition, but further detailed “assumption” analysis should be performed by the
industry working together to provide a more robust and reliable scenario.
The Semiconductor Equipment market
The semiconductor equipment market is dominated by a few major semiconductor
manufacturing companies. The top 5 companies have at least a 40% share of the
total worldwide capital expenditures, which in recent years approaches 50%. The
top 3 players alone come close to 40% since 2009. These 3 tier 1 companies are
Samsung, Intel, and TSMC, the same companies that have currently indicated their
intentions to move to 450mm production.
Source: Company reports/Internet
It might be expected, and as we have observed for the 200 - 300mm transition, when
the 450mm transition arrives at the HVM stage, most of the total investments of
these companies will be targeted at 450mm. For equipment makers not participating
in the 450mm transition, that will mean, that at least 40% of the total equipment
market will not be addressed. That is assuming no other companies will follow the
road to 450mm, which will not be the case, as recent announcements already
indicate. The 200 – 300mm transition has shown that all companies providing high
volume products, such as logic and memory, have moved to 300mm, including the
major foundries.
With an 8-year delay, we now can see a shift to 300mm by the analog/power
providers, such as TI and Infineon. Actually this is a repetition of the 150 - 200mm
transition, where slow followers like Bosch are finally moving to 200mm after an 18year delay. Therefore it can be expected that at least the major foundries, logic, and
memory makers have to make a shift to 450mm production to stay competitive,
which will result in a total 450mm equipment purchasing power of at least 60 to 70%
of the total available market (TAM), and with high invest volumes in the 450mm ramp
phase, as we have seen in the 300mm transition.
In addition it can be noted that, in general, semiconductor companies have a
conservative approach to equipment selection. Installed equipment from a certain
vendor will be purchased again during expansions, when performance has been
adequately demonstrated. This is based upon considerations such as ease of
process transfer, confidence in performance, maintenance know-how, and reduction
of spare part inventories. Some companies have even devised rigid procedures in
this respect, such as Intel’s “copy exactly’ philosophy.
For newcomers in the market, a wafer transition is a unique opportunity to
enter the market and gain new customers. It is therefore extremely important
to be at the forefront of developments to enable introduction of equipment to
new customers at an early stage in order to profit from a possible change in
vendor policy from 450mm customers, with an attractive offering.
The European Equipment Market
In this century, the large European based semiconductor manufacturers in total have
seen a significant drop in their market position. As a result, the European
semiconductor equipment market has decreased considerably in relation to
worldwide market, as shown in the next two charts:
Source: Future Horizons
And specifically Europe:
Source: Future Horizons
European semi equipment purchases have decreased from 16% of worldwide Capex
in 1993, to around 6% in 2010. However, sales of European equipment have
increased on a worldwide basis over the last years.
% WW Sales of EU Equipment
Source: VLSI
While this is mainly due to the success of ASML, in general one can say that
European equipment makers are increasing their market share.
These two above-mentioned factors are a clear indication, that EU equipment
manufacturers are dependent on, and should target the worldwide market,
having a total market share of 20% in 2010, and not so much on the local
(European) market with a volume of only 6% of the TAM.
According to SEMI Europe, the semiconductor related equipment and materials
companies in Europe are directly employing 105,000 employees, which is about
equivalent to direct employment by the European semiconductor manufacturers
(110,000) and is therefore an important high-tech industry on its own.
Materials
Looking at the development of silicon wafer production, the following can be
observed: the peaks in number of produced successive wafer sizes are spaced 5
years apart until 100mm. 125mm was never a very successful wafer size, and was
readily overtaken by 150mm. 200mm followed after 7 years, and 300mm after 10
years.
The picture becomes clearer if the produced wafer surface area is normalized per
wafer size.
In this figure, it can be observed, that both 200mm and 300mm reached the
production level of the previous wafer size about 7 years after introduction, although
300mm was at a much higher absolute surface area level, due to increased overall
semiconductor production. The introduction of 450mm will likely be in 2015/2016
following the trend that the time increases between introductions of the next wafer
size. If the 450mm introduction follows the historical trends, it should reach 300mm
production levels in produced silicon surface area in 2023/2024.
In the figure below, the pricing per wafer produced unit of surface area is depicted
per wafer size over time, with a prognosis for 450mm. According to this analysis,
initially every new wafer size starts with high costs, but when mass production sets
in, the cost per square unit all converge to the same level, even with an observed
increase in wafer quality over time for the larger wafer sizes. During the 300mm
transition, the pricing reduction curve is even steeper than in previous introductions.
The expectation is that this will also be the case for 450mm, resulting in the
conclusion that for the semiconductor manufacturer’s substrate costs per unit
area will not be inhibitive to introduce 450mm.
Source: IC Knowledge
In Europe, four wafer suppliers are currently active: Siltronic, Soitec, Okmetic, and
Siltronix. The latter two are not major players, and do not manufacture the larger
wafer sizes. Siltronic, however, is the number 3 wafer maker with a global presence
and a worldwide market share of around 14% in 2010. For Siltronic it is important to
participate in the 450mm transition to maintain or improve its market share,
especially at important customers like Intel, one of the drivers of the 450mm
transition.
Soitec is producing a special kind of wafer called “Silicon-on-Insulator” (SOI), which
are employed by some logic manufacturers and foundries as starting material to
obtain their required device characteristics. During the last years, the market share
of SOI wafers of total wafer supply was around 3%. The production in 300mm (in
equivalent surface area) was over 50% of total shipped SOI volume. Soitec is the
leading supplier for SOI wafers with a market share of 60% in recent years. In order
to maintain this position, Soitec is keen to develop 450mm SOI wafers at the earliest
possible stage.
450mm: A global effort and co-operation
In its history, the semiconductor industry initially went through a number of wafer size
transitions lead by individual manufacturers. Because transitioning to the 300mm
wafer size was viewed by all to be very costly to be carried out alone, this transition
was facilitated through R&D consortia for the first time. SEMATECH established in
1995 a global initiative on 300mm transition called I300I. Leading IC manufacturers
and equipment and materials suppliers from Europe, the US, and other regions
joined this initiative. Japan also established an industry wide initiative called J300.
To ensure a cost-effective and timely transition, I300I and J300 collaborated
efficiently through 1996 and 1997. As a result, the two consortia completed in July
1997 global standards requirements and global joint guidelines on equipment
configuration, operation, facilities, automation, FOUP, and carriers.
International standards for 450mm carriers, load-ports and developmental test
wafers were completed after extensive prototyping and interoperability / cycle testing
in cooperative development between component suppliers, SEMI and ISMI.
Extensive modeling of 450mm industry economics including tool market projections
has been undertaken by ISMI in cooperation with IC Knowledge.
The SEMATECH 450mm consortium program has moved to the Albany, NY campus
of the College of Nanoscale Science and Engineering (CNSE), and is in the early
stages of expanding the test wafer operations to support broad supplier equipment
development. Cooperation with the European 450mm Initiative EEMI450 on
such development with European suppliers is expected to build on past
consultation between the consortia. The entire 450mm tool set must be
demonstrated by consortia to support IC manufacturers’ decisions on launching their
pilot operations toward a manufacturing ramp in the next very few years. Shared
communication between consortia and companies is hoped to enable the
effectiveness of synergistic pre-competitive cooperation.
Therefore, a globally-coordinated effort will be needed to ensure a costeffective and timely transition to the next wafer size.
450mm: Imperative for Sustainable Growth
In conclusion, based on analysis work by ISMI it is proposed that the 7.6% scenario
industry silicon demand growth projection requires the support of a 450mm wafer
generation beginning ramp in the second half of this decade. The need for 450mm
manufacturing is driven by manufacturing economic, ecological, productivity and
sustainability feasibility issues.
The transition to 450mm wafers should typically provide an approximate 30% cost
reduction, as demonstrated by scenario modeling. Further delay will only increase
costs due to the steady march of the technology insertions that provide “Moore’s
Law” doubling of functionality and performance while controlling power usage.
From analysis provided by IC Knowledge, there will be a significant market
opportunity for 450mm (and 300mm), while maintaining both the profitability of
manufacturers, and a healthy market for suppliers; and at the same time creating
economic benefits of a healthy growth in demand with state-of-the-art and affordable
products.
The European Semiconductor Equipment and Materials Industry represent a
significant proportion of the World market for their products. As such, it is important
that these Companies begin to invest their time and financial resources in order that
they are ready to supply the semiconductor manufacturing industry with capable
products when the next wafer size generation reaches high volume manufacturing.
A wafer size transition also represents a good opportunity for new comers in to the
market to have their products selected for use in the new manufacturing fabs.
As for the 200mm to 300mm wafer size transition, and even more so for the next
450mm wafer size transition, a global cooperation between semiconductor
manufacturers, equipment and materials manufacturers, and research institutions is
envisaged and required to enable a timely, efficient and economically viable
transition. For semiconductor manufacturers to engage with all the equipment and
materials vendors necessary to fill their process development pilot lines to enable full
scale technology node production, it is vital that this cooperation exists. In addition,
the benefits of this development activity to smaller wafer size fabs in Europe
supporting “More than Moore” product manufacturing may be significant. These
products (discrete, analog, sensors, optoelectronics, integrated passives, etc.)
typically trail behind the “Moore’s Law” technology driver products and utilise smaller
fabs. However, demand for these products is about 50% of the total capacity and
does grow (albeit a slower pace) and benefits eventually from the leading edge
investments.
Therefore, Europe has a big part to play, and support and
collaboration across all elements of the research and development operation,
including National Governments is vital so as to maximize 450mm European
equipment and materials manufacturer readiness and subsequent market
opportunity.
The European Equipment and Materials (EEMI450) Initiative commenced in 2009
and offers “free” membership to all European based equipment and materials
manufacturers supplying the semiconductor industry, that are interested in 450mm
topics and activities. The goal of the Initiative is to bring common interests
together, and to promote 450mm activities in Europe. By doing this, it is hoped
that the competitiveness of the European semiconductor equipment and materials
industry is improved, leading to an increased chance of selection by the tier 1
semiconductor companies in their future 450mm R&D and manufacturing operations.
In addition, it is hoped that this Initiative can stimulate a European infrastructure that
is leading in 450mm development, and as a result will induce tier 1 companies to
cooperation programs which will lead to European equipped 450mm fabs in Europe.
The EEMI450 Initiative has already been successful in launching the current ENIAC
EEMI450 project working on 450mm “proof of concepts”, and also the now labeled
CATRENE SOI450 and NGC450 projects in Europe. Further project proposal
submissions are planned when appropriate, including the recent ENIAC Call 5
EEM450PR project; European Equipment & Materials 450mm Pilot-line Readiness.