Mock Final Exam

ELEC 2607
Dominik Prymicz
It is most beneficial to you to write this mock midterm UNDER EXAM CONDITIONS.
This means:
• Complete the midterm in 3 hours.
• Work on your own.
• Keep your notes and textbook closed.
• Attempt every question.
After the time limit, go back over your work with a different colour or on a separate piece
of paper and try to do the questions you are unsure of. Record your ideas in the
margins to remind yourself of what you were thinking when you take it up at PASS.
The purpose of this mock exam is to give you practice answering questions in a timed
setting and to help you to gauge which aspects of the course content you know well and
which are in need of further development and review. Use this mock exam as a
learning tool in preparing for the actual exam.
Please note:
•
Come to the PASS workshop with your mock exam complete. During the
workshop you can work with other students to review your work.
•
Often, there is not enough time to review the entire exam in the PASS workshop.
Decide which questions you most want to review – the Facilitator may ask
students to vote on which questions they want to discuss in detail.
•
Facilitators do not bring copies of the mock exam to the session. Please print out
and complete the exam before you attend.
• Facilitators do not produce or distribute an answer key for mock exams.
Facilitators help students to work together to compare and assess the answers
they have. If you are not able to attend the PASS workshop, you can work alone
or with others in the class.
Good Luck writing the Mock Exam!!
Dates and locations of mock exam take-up:
6:30 – 9:30pm, Monday, April 10 in ME3380
ELEC 2607
Dominik Prymicz
1. Boolean
̅̅̅̅̅̅̅̅̅
a) Simplify F = BC + 𝐵̅ 𝐶(𝐴
+ 𝐷)𝐴̅
̅̅̅̅̅̅̅̅̅̅̅̅
̅ 𝐵̅ + 𝐴̅) + A +CB +EA, find 𝐺̅ to 3 literals without using overbars longer than
b) Given G = (𝐶
one letter.
c) Provide a circuit with inputs A,B,C,D,X and Y, which outputs F such that F = D if XY = 00,
F=C if XY =01, F=B if XY=11, and F=A if XY=10.
d) Given the following circuit, changing which value of input(s), if any, might make a glitch
appear in H? ___
Dominik Prymicz
ELEC 2607
e) Factor M into a minimal Product-of-Sum expression. M = 𝐴̅𝐵̅ + 𝐵𝐶̅ + 𝐴𝐵 + 𝐴𝐶̅
f) Four people A, B, C and D need a machine to tally their votes. A and B’s votes each have a
weight of 2, C and D’s votes each have a weight of 1. Create a logic equation for a vote tallying
circuit which gives V=1 if the weighted votes total 4 or more.
AB
CD
00
01
11
10
00
01
11
10
̅ 𝑋̅)], using only NAND and
g) Draw a circuit to implement F = [(DC) + (𝐵̅ 𝑌̅)] [(𝐸𝐶) + (𝐷
inverter gates.
ELEC 2607
Dominik Prymicz
2. Memory Machines
a) What is the minimum number of flip flops one would need to design a synchronous machine
to count from 0 to 24 in steps of 3?
b) Plot the timing diagram for the following circuit. Assume that initially XYZ = 000. Plot the X,
Y and Z signals.
ELEC 2607
Dominik Prymicz
c) Design a FSM for the following state graph. You are to only use NOR and inverter gates.
ELEC 2607
Dominik Prymicz
3. FSM Design
a) A coin machine sells bottled pop for $1.00. Inserting a loonie pushes down a switch, and after
the next rising clock edge, the machine drops a bottle on the table. However, it will not drop
another bottle until the first loonie moves off the button, the button springs up and another loonie
pushes down the button. Draw the state graph for the system.
b) Design a state graph for a machine that will detect the input sequence 010101. It should output
a “1” when the sequence is detected. The machine should allow overlap. Do NOT design the
circuit.
Dominik Prymicz
ELEC 2607
4. Hazards
Find any single variable change hazards in the circuit represented by the equation below:
̅ + (𝐴 + 𝐷)(𝐴 + 𝐷
̅)
𝐹 = 𝐴(𝐵 + 𝐶̅ ) + 𝐶𝐷
5. Races and Cycles
Identify any races or cycles from the state
graph below. You may use the state table if
you wish.
PQ
00
01
11
10
𝑝+ 𝑞 +
𝑝+ 𝑞 +
𝑝+ 𝑞 +
𝑝+ 𝑞 +
ab=00
ab=01
ab=11
ab=10
Dominik Prymicz
ELEC 2607
6. State Reduction
Check if any states can be merged in the table shown below, then fill in the revised table
provided below.
Next
state
X=0
Next
State
X=1
Output
Output
X=0
X=1
A
G
B
0
0
B
E
D
0
0
C
J
A
0
0
D
C
D
0
0
E
H
B
0
0
G
J
D
0
0
H
D
J
1
0
J
A
H
1
0
State
State
Next
state
X=0
Next
State
X=1
Output
Output
X=0
X=1
ELEC 2607
Dominik Prymicz
7. Programmable Logic
Program the PLA to implement the logic defined by the K-maps shown. Write the expressions
for each AND over its input lead as indicated.
ELEC 2607
Dominik Prymicz
8. MUX Logic
Implement the function G using nothing but 2-input MUXs and possibly inverters. Decompose
the function in alphabetic order.
̅
F = ABE + 𝐴̅𝐷𝐸 + 𝐵𝐶𝐷
ELEC 2607
Dominik Prymicz
9. Synchronous State Graph
Draw the state graph for a machine that meets all the following requirements:
•
•
•
•
•
•
•
Has one input X, and one output Z
Z = 1 during the cycle AFTER the machine receives the complete sequence X = 10100
Z = 1 during the cycle AFTER the machine receives the complete sequence X = 01011
Otherwise Z = 0
The left most bit of X is received first
Overlapped sequences are to be detected, including a sequence overlapping itself
The machine starts at the RESET state
Only draw the state graphs. Use ONLY the states provided below and do NOT change anything
already written.