Indian Journal of Pure & Applied Physics
Vol. 37, July 1999, pp. 572-576
Design and construction of simple 1/0 card for IBM PC
v V Killedar* & A A Surve
• Department of Physics & Electronics
Annasaheb Awate College, Manchar Tal. Ambegaon Dist Pune 410 503
Received 7 September 1998: re vised 18 January 1999: accepted 6 Apri l 1999
In the present days of computer trend, in many applications it is quite often necessary to transm it or receive parallel data from
dev ices that are external to IBM Pc. For the purpose to interface any dev ice to a PC a di gital input - output (010 ) interface
card is designed and tested and described in present paper. 010 is a programmable address input/output PC add on card flexible
enough to interface to almost all In put/output devices without a need of external logic. This is TTL compatible input/output card
compatible to all IBM PC, XT and AT ' s
1 Introduction
Those were the days when you co uld use commodore
C-64 acron atom or ZX- 81 computer to control the
hardware intelligently. Transducers and oth er types of
recorder device enable a computer to measure and store
physical quant iti es from the ' real world' around us.
Temperature control systems, Green house watering,
model train system s and robots, etc . All are now-a-days
withi n the easy reach of the keen programm er with a
little or no knowledge of computer hardware . All it
needs is the PC inte rfacing card . Unfortunately, these
cards are pretty expensive. Therefore a low cost fully
buffered insertion card has been designed and described
in this paper wh ich forms a versatil e, safe and simple
link between PC (XT. AT, 386/486) based mach ine and
your hardware.
2 Principle ofWor ing
The interface card uses th e signals availabl e on the
IBM PC extension slot on the moth erboard. The 0 10
card seeks eight lin ique addresses for wh ich it is set.
Ones address decode r log ic fi nds a ma tch, it acti vates
the respective contro l logic. data bus buffer and I/O
ports. Thi s card can be driven usin g the so ftwa re written
in any hi gher level language.
3 Functional Desc ription
The bl ock di agra m of the DIO ea rd and the detailed
ci;c uit is depicted in Figs I and 2 res pective ly. T he heart
of thi s c ircuit is th e ad dress decod in g log ic designed
around th e e ight- bit di gi ta l .vord compa ra tor IC I
(74 LS6 88 ). Address decodin g log ic compares the part
of th e PC add ress with address selected by DIP (D ual in
line Package) switch bloc k SI. The circuit acts as a buffer
between the computer and external hardwa re. It is set to
ope rate at a unique address in a small area in the PC's
I/O range . The actual address setting is accomp li shed
with the help of three DIP sw itch block S I. In all cases,
a free base address must be used so that the interface
card must not share an 110 address with any other card
in the Pc.
The three switch determ ines the logic level at inputs
PO, PI , P7 of IC I. The pull up resistor conn ected to these
inputs prov ide a logic high leve l when the swi tches are
opened . The relati ve IC input is kept at logic low by
closing the respecti ve switch. All other P inp uts of IC I
are held at fixed logic levels . The possible base addresses associated with different sw itch settin gs are
li sted in Ta ble I.
Add ress lines A2 to A9 on th e ex pans ion bus are
connected to the input 0 0-06 address compncto r Ie I.
T he AND gate lC 3d co mbines address line A8 and A9
at in put 06, thi s frees input 07 for use by AEN. the
addre s enable signal that in dicates DM A (direct memr ahk 1 - Switch settin gs for cl iff<.:re nt hase aodress
t\ ddress
300 11 30·111 308 11 30el l 3 10 H 3 1411 3 18 H 31C
..,
\
,'w itch
SI
ON
OFF
ON
OFF
UN
OF F
ON
OFF
S2
0
ON
OFF
OFF
ON
ON
OFF
OFr
S3
ON
U
ON
ON
O FF
OFF
OFF
01'1-
573
KILLEDAR & SURVE: I/O CARD FOR IBM PC
..,
Address
Decoding
AO-A9
"E
.2....
Logic
cs
Q)
'§
AO-Al
~
§
~<II
RD
RD
C<mtroi
.§
B
t£!u
-
WR
:a
~
Signal
WR
Q)
-a
-I:
sfcu
,-..
or.
11"\
N
00
'-'
~
8
S
S
P-
N
:x:
f')
~
~
u
RESET
Buffer
~
III
......
...0
E
ell
DO-D7
Data
DO-D1
~us
~
£
8
U
G.l
~
.0
.5
P-
V)
N
Buffer
Fig. 1 -
Block diagram of the interface card for IBM PC
ory access) activity w itho ut a n 110 add ress being decoded. Gate IC3c ensure that IC I is enabled during a
read o r w rite operati on o nl y. When binary code input at
P input equal s that at Q inputs P=Q goes LOW . This
signal is used to enable C hip se lect io n (CS) input of
Program mable Peripheral Interface (PPI ) IC4 (8255).
The P=Q output a lso activates the G input of IC2
(74LS245) which enables th e PC data bus to be connected to the Data bus input of PPI .
The C ontrol block provides the control signal to DIO
card . The level of read (RD) signal determines the
di rection offlow of data between th e PC and the extemal
ha rdware. A LOW level signal means that data is transfI rred from connector K 1 to PC wh ile H IGH level
indicates the transfer of ciata from PC to PP I. Both RD
and WR signals are buffered us ing a gate IC3a and IC3 b
res pectively .
The PC's data bus is buffered by lC2 (74LS245).
Si nce all the PC signal s ar~ buffered, the ri sk of cross
effect between the PC and extemal hardware is reduced
to a minimum .
The two add ress lines AO-A I are used to select the
co ntro l word register (CW R ) and the three ports of PPI.
The PPI consist of fo ur registers as port A, port B, port
C and CW R. Data written in control word register dec ides the fun ction of PPI device and pro ides 8-bit port
A, port B and port C [in all 24 110 lines]. These are
bro ught on 25 pin D-type female connector K I. The base
add ress for the interface card is se lected from Tab le I.
In order to select the four registers of PPI, the necessary
addresses are as fo ll ows:
PORT A
[base + 0]
PAO - PA7
[base + I ]
PBO - PB7
PORTB
PORTC
[base + 2 ]
PCO - PC7
INDIAN J PURE APPL PHYS. VOL 37, JULY 1999
574
[ba e +3]
Control Register
PO RT C WR
The computers 5V-suppl y rail is used for thi s c ircui t
so no se parate powe r suppl y is needed . The double-sided
printed circuit boa rd is Ll sed fo r co nstru cting this circu it.
The photograph of th e constructed interrace ca rd is
shown in Fig. 3.
+~v
Cl
vL-J
-"'c" - - - -........<1P: Q
r
OIP - 4
• DO•
g~
03
g;
g*
R
W
C
4
~S£T
PAO
P~ l
P~2
P~ 3
P
•
PA.
PAS
PA6
PA 7
PBO
PS I
PB 2
PB3
PB.
PBS
PB"
P9 7
pca
4
PCI
PC2
PC3
3
pc.
PCS
PGG
P C7
ON DB2S
2
0 8 2SF
Fig.. 2 -
Fig. 3 -
Ci rcu it diagra m Df th e
interf~ce
card for /13M PC
Photograp h of constructed interface card for IBM PC
575
KILLEDAR & SURVE: I/O CARD FOR IBM PC
Thi s 010 card has the foll ow ing features:
(i) It provides 24 110 lines in three 8-bits ports ; (ii)
Base address select ion through DIP switch ; (iii) IBM PC/XTI AT compatib ility; (iv) Buffered data bus, hence
no loading; (v) The interface card can be used in different modes such as mode -0 (Bas ic input/output), Mode- I
(Stro bed input/output), Mede-2 (bi-d irect ional strobed
input/output).
5 Testing of DIO Card
For the testing of des igned card, it is interfaced w ith
the analogue to di gital converter circuit as shown in Fig.
4. The AOC is linked with designed DIO card using
connector K I of 010 card via 25 0 type connector
prov ided on rear side of the card with a flat FRC cable.
The AOC chosen is the economical, not-too fast
dev ice, the Nationa l AOC0804 , which can convert the
ana logue signal into the di g ital form in 100 mi croseconds. Us ing thi s IC we ca n take up to 8000 sa mpl es in
one second . The hi gher conversion speed is also poss ible
with AOC chip like A0574.
The AOC works with an internal clock, for whi ch
resistor R4 (10- kil o ohm) and capacitor C5 (150 pF) are
provided on pin 4 and 19 respectively, for clock generati on. In the present case the PPI (8255) is used in mode
owith port A and port C (upper) as input ports and port
C (lower) as the output port. The corresponding control
word is 98H . The data pins 07-00 pins of AOC are
connected to 8 bit port A via connector K I . The Pin 5 ofAOC, which indicates the end of conversion (that is the
analogue input at the current instant has been converted
into digital value), is read via pin 25 of ' O ' type connector K I at bit PC7 of port C- upper. The port line PC I is
connected to WR pin of AOC , which activates start of
convers ion of analogue data. Making pin PCO low en-
abIes the output data latch of AOC. The flow chart for
testing of the AOC circuit is shown in Fig. 5. The coding
of the fl ow chart using C language is given in Fig. 6.
6 Conclusion
From the work ing of AOC ci rcuit it is seen that the
01 0 card is activated only when proper base address is
given on address bus. The base address can be selected
by changing the setting of the DIP switch and avo ids
puzz le with the other cards present on motherboard . The
analogue data can be effectively converted into digital
Initialize PPI(8255) as
Port A-IN,Port ~ OUT
Port C-\ower-OUT& Port C-Upper-IN
Send SC pulse to PCO
Read pin PCS to
N
R2
T
0
I
n
~
,..e
f
•c:
•c
•r
Enable latch by sending
AnaloQu.
PA7Cl2 )
PA5Cl7 )
PA!H3)
I'A4( 16)
PA3(3 )
PAJClI)
PA~( 1)
I'AO(14)
~CO
Cl
C6 '
d
OBO
081
OB2
OB3
084
08S
085
087
L
111+
WRITE pulse to Pin PC1
.1enal
111-
CLKR
Read Digital data from
CLK
.PORTA
IIREf"
A(;NO
Fig. 4 -
Circuit diagram of ADC circui t interfaced with the
designed card
STOP
Fig. 5 -
Program flo w chart for A DC interfacing
INDIAN J PURE APPL PHYS. VOL 37, JU LY 1999
576
/* Program test . c for interfacing card*/
/* PROGRAM FOR ADC interfacing*/
/* written by V.V.Killedar & Surve A.A.*/
/* At Dept . of Physics A.A .Col lege,Manchar*/
#include<stdio . h>
#include<conio.h>
#include<dos.h>
#define portA Ox300
#define portC Ox302
#define portcwr Ox303
void main(void)
{
int eoc,eoc1,data;
clrscr();
outportb(portcwr,Ox98 ) ;
gotoxy(30,lO) ;
printf("Data acquisition using interfacing card");
gotoxy(30,20) ;
printf("Press any key to exit .... ");
gotoxy ( 30, 14) ;
printf(" Digital data: ");
while ( ! kbhi t () )
{
outportb(portC,Ox01) ;/* send start of conversion pulse */
delay(O.l) ;
outportb(portC,Ox03);
delay(O.l);
scan:
eoc=inportb(portC) ;/* get EOC */
eoc1=eoc & Ox80;/* remove unwanted bits */
if(eoc1!=OO) /* test PC7 */
goto scan ;/* PC7 high scan again*/
outportb(portC,Ox02);/* enable latch */
data=(inportb(portA) *15)/255; /* get data */
~O~Oxy(45,14) ;printf(Wld",data) i
} /* end while * /
} /* end main */
Fig. 6 ....-C language program for ADC interfacing
fonn by using ADC circuit. T hus we infer that the
designed interface cards act as a effective link between
users hardware and the Pc. T hi s card can be used in
various applications in industri a l sector.
Acknowledgement
One of the author (AAS) is indebted to T he Principal
and Head of the Physics a nd Electroni cs Department,
Annasaheb Awate Co ll ege. Manchar. for providing the
Laboratory facility.
References
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2
Rilay Clay A. Programming online help IIsing C+ + (BPB
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Mi llm an lackob & Halkias C C. Inlegraled eleclronics.
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4
Badri Ram. Fundamenlals of microprocessor and microcolllputer. (BPB Publications. New Delhi). 1992 .
5
Floyd T S. Digilalfundamenta ls. (Uni ve rsal Book Stall. New
Delhi). 1986.
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Wa lrave n K. U eclOr electrollics. 149 ( 1995) 9.-1 5
7
Ri gby ;\. Eleclor F.lectronics. l)& ( 19l) I ) 6.32
&
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) ·U II .
29( I )