Nano Research
Nano Res
DOI
10.1007/s12274-016-1178-7
1
Thickness- and temperature-dependent electrical
properties of ZrS2 thin films directly grown on
hexagonal boron nitride
Yiming Zhu1,2, Xinsheng Wang2, Mei Zhang2, Congzhong Cai1 (), and Liming Xie2 ()
Nano Res., Just Accepted Manuscript • DOI: 10.1007/s12274-016-1178-7
http://www.thenanoresearch.com on Jun 15, 2016
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1Nano Res
Nano Res
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Research Article
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Thickness- and Temperature-Dependent Electrical Properties
of ZrS2 Thin Films Directly Grown on Hexagonal Boron
Nitride
Yiming Zhu1,2, Xinsheng Wang2, Mei Zhang2, Congzhong Cai1(), and Liming Xie2()
1
2
Department of Applied Physics, Chongqing University, Chongqing 401331, P. R. China
CAS Key Laboratory of Standardization and Measurement for Nanotechnology, CAS Center for Excellence in Nanoscience,
National Center for Nanoscience and Technology, Beijing 100190,P. R. China
ABSTRACT
Two-dimensional ZrS2 has potential applications in nanoelectronics because of theoretically predicted high
mobility and high sheet current density. Here we report thickness- and temperature-dependent transport
properties of ZrS2 multilayers which are directly deposited on h-BN by chemical vapor deposition.
Hysteresis-free gate sweeping, metal-insulator transition and T-γ (γ~0.82-1.26) temperature-dependent mobility
have been observed in ZrS2 films.
KEYWORDS
Chemical vapor deposition, two-dimensional materials, ZrS2, electrical transport, mobility
1. Introduction
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Semiconducting two-dimensional (2D) materials
our previous success on direct deposition of
have attracted broad interest because of their
large-area ZrS2 thin films on hexagonal BN
unique electrical, optical and mechanical
(h-BN), field-effect transistors (FETs) based on 2D
properties [1-6]. Group VIB transition-metal
ZrS2 thin films (thickness of 3-15 nm) have been
dichalcogenides (TMDs)
facilely fabricated and temperature-dependent
2D materials, such
MoS2 monolayers and few-layers, have shown
electrical measurements have been conducted.
high on/off ratio (10 ) [1] and high mobility (> 100
Hysteresis-free behavior, phonon-limited
cm /Vs) [7] as well as phonon-limited electrical
electrical transport and metal-insulator transition
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transport, metal-insulator transition (MIT) and
have been observed in ZrS2 FETs, suggesting
even superconductivity (at high doping levels).
minial defects in ZrS2 and minial charge
————————————
Address correspondence to Congzong Cai, [email protected]; Liming Xie, [email protected]
[8-14] Group IVB TMD monolayers and
few-layers, such as ZrX2, HfX2 (X = S, Se), have
also been predicted with high sheet current
impurities at the ZrS2/h-BN interface.
2. Results and Discussion
density (>100 µA/µm at 8 MV/cm) [15] and
optical-phonon-limited mobility of ~64 cm2V-1s-1
ZrS2 thin films were grown on h-BN substrates by
(previously acoustic-phonon-limited mobility
chemical vapor deposition (CVD) as reported
of >1200 cm2V-1s-1) [16, 17]. However, small size
previously [18]. Briefly, ZrCl4 and S were used as
and low-yield of mechanically exfoliated samples
precursors and h-BN was used as deposition
have hindered the electrical measurements of 2D
substrates. The deposition was done in Ar and H2
ZrX2 and HfX2 materials. Here, benifiting from
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Figure 1. Characterizations of as-synthesized ZrS2 films. (a, b) AFM images of ZrS2 films with different thicknesses. The insets are
the height traces. (c) HRTEM image and (inset) FFT pattern of a ZrS2 film. (d) Raman spectra of ZrS2 films with different
thicknesses.
flow at 600-800 oC (substrate temperature). Figure
1a shows an AFM image of ZrS2 monolayer with
height of ~1.0 nm. Figure 1b shows a ZrS2
multi-layers [19, 20] with thickness of ~10 nm
(measured from the crack depth) and terrace
heights of 0.6 nm (theoretical value of 0.58 nm
[21]). Under high-resolution TEM imaging
(Figure 1c), no obvious defects was observed,
indicating a high-quality of the ZrS2 films. Raman
characterization shows typical modes of ZrS2, i.e.,
the A2u mode at 317 cm-1 and the A1g mode at 333
cm-1 (Figure 1d) [22, 23].
During FET fabrication, ZrS2 films were found to be
sensitive to electron beam irradiation. None of
ZrS2 FETs fabricated from direct E-beam
lithograpgy was conductive. Cracks were found
in ZrS2 thin films after high dose electron beam
irridication (Figure S3), in which the mechanism
is unknown. To avoid electron beam damage on
ZrS2 thin films, a deposition-etching method was
used (Figure S1) to fabricate ZrS2 FETs [24, 25]. In
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details, a 50-nm Au film was first evaporated on
underneath ZrS2 film. At last, patterned
the ZrS2 samples and then E-beam was used to
electrodes were obtained by etching the excess
define electrode patterns. The evaporated Au film
area of Au film using KI/I2/H2O.
can prevent electron beam from irradiating the
Figure 2a illustrates the structure of a ZrS2 FETs.
Figure 2. Structure and electrical measurements of ZrS2/BN devices . (a) Structure illustration of ZrS2 FETs on h-BN substrates. (b)
Ids – Vgs curves, (c) Ids –Vds curves and (d) hysteresis behavior of a ZrS2 FET (ZrS2 thickness of 12.0 nm). The inset in panel (b) is a
AFM image of the device, the scale bar is 5.0 µm. All measurements were conducted in air.
ZrS2 thin film (thickness of ~12 nm) have an
backward gate sweeping curves are almost
on-current of > 1 µA/µm (at Vds of 1 V) andan
overlap. The gate voltage shift is ~0.4 V in air
on/off ratio of ~106 (Figure 2b).
(Figure 2d inset) and ~0.1 V in vacuum (Figure
Room-temperature electrical measurements were
S2a), which is remarkably smaller than that for
current (Ids) vs. source-drain voltage (Vds) curves
MoS2 on SiO2/Si substrate (~5 V) [26-28]. This
show ohmic contacts between Au metal
hysteresis-free behavior is mostly due to
electrodes and ZrS2 film, which may be a benefit
atomicaly smooth and inert h-BN surface as well
from the direct deposition of Au contacts on ZrS2
as absence of interface comtamination from direct
thin film. The device also shows nearly
deposition of ZrS2 on h-BN [29-31]. For thinner
hysteresis-free behavior, i.e., the forward and
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ZrS2 films, the hysteresis is also small (gate shift
While the Ids-Vds of thicker ZrS2 (Figure 3c, d for a
of ~0.5 V in air and vacuum, Figure S2b and S2c).
5.1 nm ZrS2 and > 5.1 nm ZrS2) indicated ohmic
More ZrS2/h-BN devices (totally ~25 devices) were
fabricated (Figure 3) to further investigate
thickness-dependent electrical properties. For
thinner ZrS2 films (Figure 3a, b for a 3.7 nm ZrS2),
the Ids-Vds shows a nonlinear trend from -2 V to 2
V, indicating the existence of Schottky barrier.
contacts. The on/off ratio for thinner ZrS2 layers is
still large (~105). But the on-current for thinner
ZrS2 films is lower, about 20 nA/µm and 150
nA/µm (all at Vds = 1V) for the 3.7 nm and 5.1 nm
ZrS2 films, respectively.
Figure 4 shows sheet conductivity and field-effect
Figure 3. Electrical measurements of two thinner ZrS2 FETs. (a) Ids-Vgs and (b) Ids-Vds of a 3.7 nm ZrS2 FET. (c) Ids-Vgs and (d, b)
Ids-Vds of a 5.1 nm ZrS2 FET. The insets in panel (a) and (c) are AFM images of the corresponding devices, the scale bar is 5.0 µm.
All measurements were conducted in air.
mobility of ZrS2 films as a dependence on the ZrS2
the dielectric layer consists of SiO2 and h-BN, Cg
thickness. Sheet conductivity is calculated by σ =
is calculated by Cg = (1/ CSiO2 +1/ CBN)-1, where CSiO2
(dIds/dVds)×(L/W) at Vgs = 40 V and field-effect
and CBN are the capacitance per unit area of SiO2
mobility is calculated by µ =
and h-BN. The sheet conductivity of ZrS2 films is
L×(WCgVds)-1×[dIds/dVgs], where L is the
in the range of 10-2 to 1 µS (~ 10-2 to 1 µm/µm at
source-drain distance, W is the channel width
Vds = 1V for a typical channel length of 1 µm). The
and Cg is the gate capacitance per unit area. Since
estimated field-effect mobility is around 0.01-5
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cm2/Vs for ZrS2 films. The measured field-effect
cm2/Vs [17].
mobility is still lower than the predicted 64
Figure 4. Thickness-dependent (a) conductivity and (b) field-effect mobility of ZrS2 thin films.
As ZrS2 thickness increases from 2 nm to 6 nm, an
For on-current at different temperatures, there is
exponential increase of sheet conductivity and
a cross point at Vgs of aound -20 V in the
mobility have been observed (Figure 4). As the
temperature range from 210 to 120 K (Figure 5a).
thickness is larger than 6 nm, the mobility and σ
When Vgs is above -20 V, the sheet conductivity
saturate (the insets of Figure 4a and 4b). This may
increases as temperature decreases, which is the
be due to a finite thickness of the conductive
manifestation of metallic phase. When Vgs is
channel next to the gate dielectrics, in which,
below -20 V, the sheet conductivity decreases as
when ZrS2 is thick enough, only a thin conductive
temperature decreases, which is the manifestation
charge channel is formed near the gate dielectrics
of semiconducting phase. This gate-dependent
[22]. This conductive layer acts as a screening
metal-insulator transition (MIT) behavior is clear
layer for the above ZrS2 layers and then make the
shown in Figure 5c, in which the transition
above layers not conductive. At the other side, for
conductance is ~e2/h. This is attributed to strong
ZrS2 with enough thickness, the bottom
Coulomb interactions between electrons [32],
conductive layer is scattering-free from the top
which have been also reported in other
interface. From our measurements, the thickness
two-dimensional materials, like MoS2 [10, 11],
of ZrS2 conductive layer is about 6 nm,
WS2 [12, 13]. MIT has also been observed in a 8.7
comparable to the thickness of the conductive
nm ZrS2 device but not observed in a 5.0 nm ZrS2
channel in MoS2 multilayers (~5 nm) [7].
device (Figure S4). For the 5.0 nm ZrS2 device, the
Temperature-dependent electrial measurements
have been conducted on ZrS2 FETs (Figure 5). For
a ZrS2 device with thickness of 12.1 nm, as
temperature decreases, the off-current is greatly
thichness is less than the critical thickness of 6 nm,
the MIT might be suppressed by impurity
scattering from top surface.
Temperature-dependent mobility is extacted out
reduced (Figure 5b), which is mainly due to the
and plotted in Figure 5d. For the 12.1 nm and 8.2
shift of onset gate voltage to less nagative values.
nm ZrS2 film, mobility monotuously increases as
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temperature decreases. A T-γ fitting gives γ
phonon) scattering [35, 36], and so on. Since h-BN
values of 0.82 and 0.89 for the two devices. The γ
has a high optical phonon energy, remote phonon
in the two devices are close to that measured for
scattering can be ignored. Further, there should
MoS2 [10, 11] and WS2 [12, 13] monolayers and
be few charge traps at h-BN/ZrS2 interface. For a
few-layers.
5.3 nm ZrS2 film, the mobility first increases and
Possible scattering mechanisms in ZrS2 film include
intrinsic phonon scattering [14, 33],
Charge-impurity scattering [34], interface-chargetrap scattering, remote phonon (or surface optical
then decreases as temperature decreases (Figure
5d, green data points), in which the mobility
decrease below 220 K may be due to impurity
scattering from the top surfaces.
Figure 5. Temperature-dependent electrical measurements on ZrS2 FETs. (a), (b) Temperature-dependent Ids-Vgs curves and (c)
temperature-dependent conductivity at different Vgs for a 12.1 nm ZrS2 FET. (d) Temperature-dependent mobility for ZrS2 FETs with
different ZrS2 thickness. The solid lines are fittings using μ ~ T-γ.
3. Conclusions
In summary, we have fabricated and measured
FETs based on CVD grown thin ZrS2 films on
h-BN. Almost no hysteresis was observed for the
ZrS2 devices. Sheet conductivity and field-effect
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mobility exponentially increase and then saturate
PDMS. TEM images were collected on the FEI
as ZrS2 thickness increases.
Tecnai G2 F20 U-TEIN operated at 200 kV.
Temperature-dependent electrical measurements
suggest phonon scattering is the major scattering
4.4 Electrical measurement
for ZrS2 films on h-BN. Electrical measurements
also suggest a thin 2D conductive channel (~6 nm
Electrode patterns were generated by electron beam
thick) near the gate dielectrics in ZrS2 FETs which
lithography (EBL). Devices were put in air and
can protect multilayer films from impurity
vacuum (Janis ST500 probe station, <10-6 mbar) and
scattering at the top interface. These fundamental
measured by an Agilent B1500A or Keithley
information is useful for devcie design of 2D ZrS2
4200-SCS semiconductor device analyzer.
materials and further pushing the performance to
the theoretical limit.
L.X. acknowledges support from NSFC (21373066
and
11304052),
Beijing
Nova
programme
(Z151100000315081) and Beijing Talents Fund
(2015000021223ZK17).
4. Method
C.C. acknowledges support from the Program for
New Century Excellent Talents in University of
China (Grant No. NCET-07-0903).
4.1 Sample growth
ZrS2 thin films were synthesized by CVD with ZrCl4
and S powders which were placed in the upstream
of the furnace at the temperatures of 150~155 oC and
130 oC. The center of the furnace was heated up to
950 oC. The h-BN/SiO2/Si substrates (h-BN were
mechanically exfoliated onto the 300 nm SiO2/Si
substrates) annealed at 600 oC for 2 hours and then
put in the downstream of the furnace. The
deposition temperature was around 600-800
Acknowledgements
o
C.
During the growth, the system pressure was kept at
Electronic Supplementary Material: Supplementary
material (the details of the fabrication of devices, the
electron beam damage on ZrS2 thin films, hysteretic
behavior and temperature-dependent electrical
properties.) is available in the online version of this
article at http://dx.doi.org/10.1007/s12274-***-****-*
(automatically inserted by the publisher).
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This paper reports thickness- and temperature-dependent transport properties of ZrS2 multilayers which are
directly deposited on h-BN by chemical vapor deposition and the observations of Hysteresis-free gate
sweeping, metal-insulator transition and T-γ (γ~0.82-1.26) temperature-dependent mobility.
TOC:
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Electronic Supplementary Material
Thickness- and Temperature-Dependent Electrical Properties
of ZrS2 Thin Films Directly Grown on Hexagonal Boron
Nitride
Yiming Zhu1,2, Xinsheng Wang2, Mei Zhang2, Congzhong Cai1(), and Liming Xie2()
1
Department of Applied Physics, Chongqing University, Chongqing 401331, P. R. China
2
CAS Key Laboratory of Standardization and Measurement for Nanotechnology, CAS Center for Excellence in Nanoscience,
National Center for Nanoscience and Technology, Beijing 100190,P. R. China
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Figure S1. Schema of fabrication procedures for ZrS2 FETs. First, a 50 nm Au film was spun-coated and then a layer of PMMA was
spun-coated on the Au film (a-c). After that, electrode pattern was exposed on the PMMA through electron beam lithography (EBL)
and then unprotected Au film was etched out by KI/I2 (d-e). At last, the PMMA was removed (f).
————————————
Address correspondence to Congzong Cai, caiczh@gmail; Liming Xie, [email protected]
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Figure S2. Hysteretic behavior of ZrS2 FETs: (a) for a 12.0 nm ZrS2 FET in vaccum), for a 7.9 nm ZrS2 FET (b) in air and (c) in
vacuum.
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Figure S3. SEM images of the ZrS2 film in different time and the electron beam damage on ZrS2 thin films. (b) was collected few
seconds after (a). The accelerating voltage is 5 kV.
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Nano Res
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Figure S4. T-dependent Ids-Vgs curves of ZrS2 FETs with thickness of 5.0 nm and 8.2 nm.
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