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The content and copyrights of the attached
material are the property of its owner.
Jameco Part Number 1442863
DRAM Component Product Guide
2Q07
DRAM data sheets are available at www.micron.com/products/dram
DDR3 SDRAM - Double Data Rate (DDR) SDRAM*
Density
1Gb
Configuration
64 Meg x 16
Features
Eight-bank, 1.5V, SSTL_15
Base Component
Part Number
FBGA Balls
Speed
Mark
Samples
Production
96
25, 25E, 187,
Now
Late 2Q07
Now
Late 2Q07
Now
Late 2Q07
MT41J64M16
187E, 15, 15E
128 Meg x 8
Eight-bank, 1.5V, SSTL_15
MT41J128M8
86
25, 25E, 187,
187E, 15, 15E
256 Meg x 4
Eight-bank, 1.5V, SSTL_15
MT41J256M4
86
25, 25E, 187,
187E, 15, 15E
Notes:
*DDR3 SDRAM is available in FBGA packages only.
DDR2 SDRAM - Double Data Rate (DDR) SDRAM*
Density
256Mb
512Mb
1Gb
2Gb
Notes:
Memory
Configuration
Base Component
Part Number
FBGA Balls
Speed
Mark
1
Samples
Production
64 Meg x 4
Quad-bank, 1.8V, SSTL_18
MT47H64M4
60
5E, 37E, 3
Now
Now
32 Meg x 8
Quad-bank, 1.8V, SSTL_18
MT47H32M81
60
5E, 37E, 3
Now
Now
16 Meg x 16
Quad-bank, 1.8V, SSTL_18
MT47H16M161
84
5E, 37E, 3
Now
Now
128 Meg x 4
Quad-bank, 1.8V, SSTL_18
MT47H128M41
60
Now
Now
64 Meg x 8
Quad-bank, 1.8V, SSTL_18
MT47H64M81
60
Now
Now
32 Meg x 16
Quad-bank, 1.8V, SSTL_18
MT47H32M161
84
256 Meg x 4
Eight-bank, 1.8V, SSTL_18
MT47H256M41
92
128 Meg x 8
Eight-bank, 1.8V, SSTL_18
MT47H128M81
92
Features
64 Meg x 16
Eight-bank, 1.8V, SSTL_18
MT47H64M161
92
256 Meg x 4
Eight-bank, 1.8V, SSTL_18
MT47H256M41
60
128 Meg x 8
Eight-bank, 1.8V, SSTL_18
1
MT47H128M8
60
64 Meg x 16
Eight-bank, 1.8V, SSTL_18
MT47H64M16
1
84
512 Meg x 4
Eight-bank, 1.8V, SSTL_18
MT47H512M4
60
256 Meg x 8
Eight-bank, 1.8V, SSTL_18
MT47H256M8
128 Meg x 16
Eight-bank, 1.8V, SSTL_18
MT47H128M16
5E, 37E, 3, 3E,
25, 25E
5E, 37E, 3, 3E,
25, 25E
5E, 37E, 3, 3E,
25, 25E
5E, 37E, 3, 3E,
25, 25E
5E, 37E, 3, 3E,
25, 25E
5E, 37E, 3, 3E,
25, 25E
5E, 37E, 3, 3E,
25, 25E
5E, 37E, 3, 3E,
25, 25E
5E, 37E, 3, 3E,
25, 25E
Now
Now
Now
Now
Now
Now
Now
Now
Now
Now
Now
Now
Now
Now
5E, 37E, 3
Now
Late 2Q07
60
5E, 37E, 3
Now
Late 2Q07
84
5E, 37E, 3
Now
Late 2Q07
*DDR2 SDRAM is available in FBGA packages and bare die. 1Available in industrial temperature, IT.
DDR SDRAM - Double Data Rate (DDR) SDRAM*
Density
Memory
Configuration
Features
128Mb
32 Meg x 4
Quad-bank, 2.5V, SSTL_2
32 Meg x 4
256Mb
512Mb
1Gb
Notes:
TSOP (TG) Pins
Packages
FBGA Balls
Speed
Mark
Samples
Production
MT46V32M4
66
-
6
Now
Now
Quad-bank, 2.6V, SSTL_2
MT46V32M4
66
-
5
Now
Now
16 Meg x 8
Quad-bank, 2.5V, SSTL_2
MT46V16M81
66
-
6
Now
Now
16 Meg x 8
Quad-bank, 2.6V, SSTL_2
MT46V16M8
66
-
5
Now
Now
8 Meg x 16
Quad-bank, 2.5V, SSTL_2
MT46V8M161
66
-
6, 752
Now
Now
Part Number
8 Meg x 16
Quad-bank, 2.6V, SSTL_2
MT46V8M16
66
-
5
Now
Now
64 Meg x 4
Quad-bank, 2.5V, SSTL_2
MT46V64M4
66
60
6, 752
Now
Now
64 Meg x 4
Quad-bank, 2.6V, SSTL_2
MT46V64M4
66
60
5
Now
Now
32 Meg x 8
Quad-bank, 2.5V, SSTL_2
MT46V32M81
66
60
6, 752
Now
Now
32 Meg x 8
Quad-bank, 2.6V, SSTL_2
MT46V32M8
66
60
5
Now
Now
16 Meg x 16
Quad-bank, 2.5V, SSTL_2
MT46V16M161
66
60
6, 752
Now
Now
16 Meg x 16
Quad-bank, 2.6V, SSTL_2
MT46V16M161
66
60
5
Now
Now
128 Meg x 4
Quad-bank, 2.5V, SSTL_2
MT46V128M41
66
60
6
Now
Now
128 Meg x 4
Quad-bank, 2.6V, SSTL_2
MT46V128M4
66
60
5
Now
Now
64 Meg x 8
Quad-bank, 2.5V, SSTL_2
MT46V64M81
66
60
6
Now
Now
64 Meg x 8
Quad-bank, 2.6V, SSTL_2
MT46V64M8
66
60
5
Now
Now
32 Meg x 16
Quad-bank, 2.5V, SSTL_2
MT46V32M161
66
60
6
Now
Now
32 Meg x 16
Quad-bank, 2.6V, SSTL_2
MT46V32M161
66
60
5
Now
Now
256 Meg x 4
Quad-bank, 2.5V, SSTL_2
MT46V256M4
66
-
6, 752
Now
Now
2
128 Meg x 8
Quad-bank, 2.5V, SSTL_2
MT46V128M8
66
-
6, 75
Now
Now
64 Meg x 16
Quad-bank, 2.5V, SSTL_2
MT46V64M161
66
-
6, 752
Now
Now
*DDR SDRAM is available in leaded or lead-free packages. 1Available in industrial temperature, IT. 2Contact Marketing.
Rev. 5/14/2007
© 2007 Micron Technology, Inc.
Micron and the Micron logo are trademarks of Micron Technology, Inc.
Products and specifications are subject to change without notice.
Dates are estimates only.
DRAM Component Product Guide
2Q07
DRAM data sheets are available at www.micron.com/products/dram
SDR SDRAM*1 - Single Data Rate (SDR) SDRAM
Memory
Configuration
64Mb
128Mb
256Mb
512Mb
Notes:
Packages
Features
TSOP (TG) Pins
FBGA Balls
Speed
Mark1
Samples
Production
16 Meg x 4
Quad-bank, 3.3V
MT48LC16M4A2
54
-
7E, 75
Now
Now
8 Meg x 8
Quad-bank, 3.3V
MT48LC8M8A22
54
-
7E, 75
Now
Now
4 Meg x 16
Quad-bank, 3.3V
MT48LC4M16A22, 3
54
54
6, 7E, 75
Now
Now
Density
Part Number
2 Meg x 32
Quad-bank, pipelined, 3.3V
MT48LC2M32B22,4
86
90
5, 55, 6, 7
Now
Now
32 Meg x 4
Quad-bank, 3.3V
MT48LC32M4A2
54
-
7E, 75
Now
Now
16 Meg x 8
Quad-bank, 3.3V
MT48LC16M8A22
54
60
7E, 75
Now
Now
8 Meg x 16
Quad-bank, 3.3V
MT48LC8M16A22, 3
54
54
6A, 7E, 75
Now
Now
4 Meg x 32
Quad-bank, pipelined, 3.3V
MT48LC4M32B24
86
90
6, 7
Now
Now
64 Meg x 4
Quad-bank, 3.3V, 8K Refresh
MT48LC64M4A2
54
60
7E, 75
Now
Now
32 Meg x 8
Quad-bank, 3.3V, 8K Refresh
MT48LC32M8A22
54
60
6, 7E, 75
Now
Now
16 Meg x 16
Quad-bank, 3.3V, 8K Refresh
MT48LC16M16A22, 3
54
54
6, 7E, 75
Now
Now
128 Meg x 4
Quad-bank, 3.3V, 8K Refresh
MT48LC128M4A2
54
-
7E, 75
Now
Now
64 Meg x 8
Quad-bank, 3.3V, 8K Refresh
MT48LC64M8A2
54
-
7E, 75
Now
Now
32 Meg x 16
Quad-bank, 3.3V, 8K Refresh
MT48LC32M16A2
54
-
75
Now
Now
*SDR SDRAM is available in leaded or lead-free packages. 1-7E = PC133, CL = 2; -7.5 = PC133, CL = 3.
Available in industrial temperature, -7E IT. 4Available in industrial temperature, -7 IT.
2
Available in industrial temperature, -75 IT or low-power self refresh -75L.
3
Mobile DDR SDRAM (Low Power)
Memory
Configuration
Density
128Mb
256Mb
512Mb
1Gb
Notes:
8 Meg x 16
16 Meg x 16
8 Meg x 32
32 Meg x 16
16 Meg x 32
64 Meg x 16
32 Meg x 32
Speed
Part Number2
Features1
PASR, TCSR, DPD, DS, 1.8V
PASR, TCSR, DPD, DS, 1.8V
PASR, TCSR, DPD, DS, 1.8V
PASR, TCSR, DPD, DS, 1.8V
PASR, TCSR, DPD, DS, 1.8V
PASR, TCSR, DPD, DS, 1.8V
PASR, TCSR, DPD, DS, 1.8V
vFBGA Balls
Mark
Samples
Production
60
60
90
60
90
60
90
75
6, 75
6, 75
6, 75
6, 75
6, 75
6, 75
Now
Now
Now
Now
Now
Now
Now
Now
Now
Now
Now
Now
3Q'07
3Q'07
MT46H8M16LF
MT46H16M16LF
MT46H8M32LF
MT46H32M16LF
MT46H16M32LF
MT46H64M16LF
MT46H32M32LF
*Mobile DDR SDRAM is available in only lead-free packages. 1All parts have special low-power features and low V DDQ is available for added power savings.
Available in industrial temperature (IT) range.
2
Mobile SDR SDRAM (Low Power)
Memory
Configuration
Density
64Mb
128Mb
256Mb
512Mb
Notes:
4 Meg x 16
8 Meg x 16
8 Meg x 16
8 Meg x 16
4 Meg x 32
4 Meg x 32
16 Meg x 16
8 Meg x 32
32 Meg x 16
16 Meg x 32
Part Number2
1
Features
PASR, TCSR, DPD, 1.8V
PASR, TCSR, 3.3V
PASR, TCSR, 2.5V
PASR, TCSR, DPD, DS, 1.8V
PASR, TCSR, 2.5V
PASR, TCSR, 3.3V
PASR, TCSR, DPD, DS, 1.8V
PASR, TCSR, DPD, DS, 1.8V
PASR, TCSR, DPD, DS, 1.8V
PASR, TCSR, DPD, DS, 1.8V
MT48H4M16LF
MT48LC8M16LF
MT48V8M16LF
MT48H8M16LF
MT48V4M32LF
MT48LC4M32LF
MT48H16M16LF
MT48H8M32LF
MT48H32M16LF
MT48H16M32LF
*Mobile SDR SDRAM is available in only lead-free packages.
Available in industrial temperature (IT) range.
1
Speed
Mark
vFBGA Balls
54
54
54
54
90
90
54
90
54
90
75, 8
75, 8
8
75, 8
8
8
75, 8
75, 8
75, 8
75, 8
Samples
Production
Now
Now
Now
Now
Now
Now
Now
Now
Now
Now
Now
Now
Now
Now
Now
Now
Now
Now
Now
Now
All parts have special low-power features and low V DDQ is available for added power savings.
2
RLDRAM II1, Common I/O
Memory
Speed
Density
Configuration
288Mb
32 Meg x 9
16 Meg x 18
8 Meg x 36
64 Meg x 9
32 Meg x 18
Eight-bank, 1.8V VDD, HSTL
Eight-bank, 1.8V VDD, HSTL
Eight-bank, 1.8V VDD, HSTL
Eight-bank, 1.8V VDD, HSTL
Eight-bank, 1.8V VDD, HSTL
16 Meg x 36
Eight-bank, 1.8V VDD, HSTL
576Mb
Note:
1
RLDRAM is available in leaded or lead-free packages.
I/O Voltage
Package
Balls
Mark
Samples
Production
MT49H32M9HU
MT49H16M18HU
MT49H8M36HU
MT49H64M9HU
MT49H32M18HU
1.5V/1.8V
1.5V/1.8V
1.5V/1.8V
1.5V/1.8V
1.5V/1.8V
FBGA
FBGA
FBGA
FBGA
FBGA
144
144
144
144
144
25, 33, 5
25, 33, 5
25, 33, 5
18, 25, 33, 5
18, 25, 33, 5
Now
Now
Now
Now
Now
Now
Now
Now
2Q07
2Q07
MT49H16M36HU
1.5V/1.8V
FBGA
144
18, 25, 33, 5
Now
2Q07
Part Number
Description
2
Industrial temperature supported - please contact Marketing for availability.
RLDRAM II1, Separate I/O
Memory
Configuration
Density
288Mb
576Mb
Note:
16 Meg x 18
64 Meg x 9
32 Meg x 18
1
Part Number
Description
Eight-bank, 1.8V VDD, HSTL
Eight-bank, 1.8V VDD, HSTL
Eight-bank, 1.8V VDD, HSTL
RLDRAM is available in leaded or lead-free packages.
MT49H16M18CHU
MT49H64M9CHU
MT49H32M18CHU
2
I/O Voltage
Package
Balls
Speed
Mark
Samples
Production
1.5V/1.8V
1.5V/1.8V
1.5V/1.8V
FBGA
FBGA
FBGA
144
144
144
25, 33, 5
18, 25, 33, 5
18, 25, 33, 5
Now
Now
Now
Now
2Q07
2Q07
Industrial temperature supported - please contact Marketing for availability.
RLDRAM®
Memory
Speed
Density
Configuration
256Mb
16 Meg x 16
Eight-bank, 1.8V VDD, HSTL
8 Meg x 32
Eight-bank, 1.8V VDD, HSTL
Description
Rev. 5/14/2007
© 2007 Micron Technology, Inc.
Micron and the Micron logo are trademarks of Micron Technology, Inc.
Products and specifications are subject to change without notice.
Dates are estimates only.
I/O Voltage
Package
Balls
Mark
Samples
Production
MT49H16M16HU
1.8V
FBGA
144
33, 4, 5
Now
Now
MT49H8M32HU
1.8V
FBGA
144
33, 4, 5
Now
Now
Part Number
2Q07
Pb-Free DRAM Component Part Numbering System
The part numbering system is available at www.micron.com/support/designsupport/documents/png
Pb-Free = RoHS compliant
DDR3/DDR2/DDR/SDR, Mobile DDR/SDR, and RLDRAM®
MT
48
LC
32M8 A2
P
- 7E
L
ES
:D
Micron Technology
Die Revision Designator
Product Family
41 = DDR3
46 = DDR/Mobile DDR
47 = DDR2
48 = SDRAM/Mobile SDR
49 = RLDRAM
Special Processing
ES = Engineering Sample
MS = Mechanical Sample
K = Interim Offering
H = Interim Offering
DM = Custom
DM = Custom
Process Technology
C = 5V VCC CMOS
G = 3.0V VDD CMOS
LC = 3.3V V DD CMOS
V = 2.5V V DD CMOS
H = 1.8V V DD CMOS
J = 1.5V V DD CMOS
N = 1.0V V DD CMOS
HC = 1.8V VDD CMOS 1.2V I/O
Operating Temperatures
DDR2, DDR, SDR
DDR3, RLDRAM
Blank = 0°C to +70°C
Blank = 0°C to +95°C
WT = –25°C to +85°C
IT3 = –40°C to +95°C
IT = –40°C to +85°C3
XT = –25°C to +75°C
YT = –40°C to
AT = –40 to 105°C
Device Number
Depth, Width
No Letter = Bits
K = Kilobits
M = Megabits
G = Gigabits
Special Options
(Multiple processing codes are separated by a space
and are listed in hierarchical order)
L = Low Power
Device Versions
Alphanumeric character(s) specified by individual data sheet
"LF" Designates Mobile Standard Addressing
"LG" Designates Mobile Non-Standard Addressing, (DS Defined)
"L2" and "S2" devices are made with dual die in package
RLDRAM only
Blank = Common I/O
C = Separate I/O
Access/Cycle Time
Package Codes1
Pb-Free/RoHS Compliant
Plating
DDR3 SDRAM
BY
LA
DDR2 SDRAM
BT
BP
BG
B6
BN
CB
CC
THJ
THK
DDR SDRAM
BG
BN
P
SP
SDRAM
BB
BG
B4
B5
P
SP
Mobile DDR
SDRAM
BF
B5
CF
CG
CK
CM
Mobile SDRAM
B4
B5
BF
CJ
CM
RLDRAM
HT
DRAM
Technology
All DRAM
Speed Grade tRAC Access
Mark
Time
-0
Untested
-A
Untested
DRAM
Technology
DDR3 SDRAM
Speed Grade
Mark
-25
-25E
-187
-187E
-187F
-15
-15E
-15F
-125
-125E
-125F
-5
-5E
-37E
-3
-3E
-25
-25E
-75
-75Z
-75E
-65
-6T
-6
-55
-5T
-5B
-5A
-5
-4
-33
-75
-7E
-7
-6
-6A
-55
-5
-10
-75
-6
-10
-8
-75
-5
-4
-33
-25
-25E
-18
Package Description2
FBGA (86-ball, 9 x 15.5)
FBGA (96-ball, 9 x 15.5)
FBGA (92-ball, 11 x 19)
FBGA (60-ball, 8 x 12)
FBGA (84-ball, 60-ball, 8 x 14)
FBGA (60-ball, 10 x 10)
FBGA (84-ball, 10 x 12.5)
FBGA (60-ball, 12 x 10)
FBGA (84-ball, 12 x 12.5)
FBGA 2COB (TwinDie 95-ball 12 x 19)
FBGA 2COB (TwinDie 63-ball 12 x 10)
DDR2
FBGA (84-ball, 60-ball, 8 x 14)
FBGA (54-ball, 60-ball, 84-ball, 10 x 12.5)
TSOP (Type II)
Stacked TSOP, "S" = internal stacking code
DDR SDRAM
FBGA (60-ball, 8 x 16)
VFBGA (54-ball); FBGA (84-ball, 60-ball, 8 x 14)
VFBGA (54-ball, 8 x 8)
VFBGA (90-ball, 8 x 13)
TSOP (Type II)
Stacked TSOP, "S" = internal stacking code
VFBGA (60-ball, 8 x 9)
VFBGA (90-ball, 8 x 13)
VFBGA (60-ball, 8 x 10)
PoP (152-ball, 14 x 14)
VFBGA (60-ball, 10 x 11.5)
VFBGA (90-ball, 10 x 13)
SDRAM
VFBGA (54-ball, 8 x 8)
VFBGA (90-ball, 8 x 13)
VFBGA (54-ball, 8 x 9)
VFBGA (54-ball, 10 x 11.5)
VFBGA (90-ball, 10 x 13)
Mobile DDR
SDRAM
Mobile SDRAM
FBGA (144-ball, 11 x 18.5)
RLDRAM
1
Due to space limitations, FBGA- and µBGA-packaged components and flip chips in
packages have an abbreviated part mark that is different from the part number.
See our Web site for more information on abbreviated component marks.
2
Dimensions in millimeters
Some device offerings are available in a VFBGA rather than an FBGA package; this is noted on the data sheet.
3
The number one (1) and the capital letter “I” utilize the same laser mark—“I”
4t
RC = 20ns
5t
RC = 15ns
© 2007 Micron Technology, Inc.
Micron and the Micron logo are trademarks of Micron Technology, Inc. RLDRAM is a
trademark of Infineon Technologies AG and is used under license by Micron Technology,
Inc. Products and specifications are subject to change without notice. Dates are
estimates only.
Rev. 02/08/07
MAX Clock
Frequency
400 MHz
400 MHz
533 MHz
533 MHz
533 MHz
667 MHz
667 MHz
667 MHz
800 MHz
800 MHz
800 MHz
200 MHz
200 MHz
267 MHz
333 MHz
333 MHz
400 MHz
400 MHz
133 MHz
133 MHz
133 MHz
150 MHz
167 MHz
167 MHz
183 MHz
200 MHz
200 MHz
200 MHz
200 MHz
250 MHz
300 MHz
133 MHz
133 MHz
143 MHz
167 MHz
167 MHz
183 MHz
200 MHz
100 MHz
133 MHz
166 MHz
100 MHz
125 MHz
133 MHz
200 MHz
250 MHz
300 MHz
400 MHz4
400 MHz5
533 MHz
PC Targets
CL-tRCD-tRP
6-6-6
5-5-5
8-8-8
7-7-7
6-6-6
10-10-10
9-9-9
8-8-8
10-10-10
9-9-9
8-8-8
4-4-4
3-3-3
4-4-4
5-5-5
4-4-4
6-6-6
5-5-5
2.5-3-3
2-3-3
2-2-2
2.5-3-3
2.5-3-3
3-4-4
3-3-3
2.5-3-3
3-3-3
2-2-2
2Q07
DRAM Component Part Numbering System
The part numbering system is available at www.micron.com/support/designsupport/documents/png
DDR2/DDR/SDR, Mobile DDR/SDR, and RLDRAM®
MT
48
LC
32M8 A2
TG - 7E
L
ES
:D
Micron Technology
Die Revision Designator
Product Family
46 = DDR SDRAM/Mobile DDR
47 = DDR2
48 = SDRAM/Mobile SDR
49 = RLDRAM
Special Processing
ES = Engineering Sample
MS = Mechanical Sample
K = Interim Offering
H = Interim Offering
DM = Custom
Process Technology
C = 5V V CC CMOS
G = 3.0V V DD CMOS
LC = 3.3V V DD CMOS
V = 2.5V V DD CMOS
H = 1.8V V DD CMOS
J = 1.5V V DD CMOS
HC = 1.8V VDD CMOS 1.2V I/O
N = 1.0V V DD CMOS
Operating Temperatures
Blank = 0°C to +70°C
WT = –25°C to +85°C
IT 3 = –40°C to +85°C
XT = –25°C to +75°C
YT = –40°C to +110°C
AT = –40°C to +105°C
Device Number
Special Options
(Multiple processing codes are separated by a space and are listed in
hierarchical order)
L = Low Power
Depth, Width
No Letter = Bits
K = Kilobits
M = Megabits
G = Gigabits
Access/Cycle Time
Device Versions
Alphanumeric character(s) specified by individual data sheet
Mobile devices
LF = Designates Mobile Standard Addressing
LG = Designates Mobile Non-Standard Addressing, (DS Defined)
L2 = 2-Die Stack, Standard Addressing
LA = 2-Die Stack, Non-standard Addressing, Option 1 (DS Defined)
RLDRAM only
Blank = Common I/O; C = Separate I/O
DRAM
Technology
All DRAM
DRAM
Technology
DDR2 SDRAM
Package Codes1
Lead Plating
DDR2 SDRAM
DDR SDRAM
FG
FN
TG
STG
SDRAM
FB
FG
F4
F5
TG
STG
Mobile DDR
SDRAM
Mobile SDRAM
F4
F5
RLDRAM
HU
Pb-free/RoHS
Compliant Plating
Package Description2
BP
BG
BT
B6
BN
CB
CC
B7
HQ
HR
HG
THJ
THK
THN
THM
SHK
FBGA (60-ball, 8 x 12)
FBGA (84-ball 8 x 14)
FBGA (92-ball, 11 x 19)
FBGA (60-ball, 10 x 10)
FBGA (84-ball, 10 x 12.5)
FBGA (60-ball, 12 x 10)
FBGA (84-ball, 12 x 12.5)
FBGA (68-ball, 84-ball, 10 x 16.5)
FBGA (60-ball, 8 x 11.5)
FBGA (84-ball, 8 x 12.5)
FBGA (60-ball, 84-ball, 11.5 x 14)
FBGA 2COB (TwinDie 95-ball 12 x 19)
FBGA 2COB (TwinDie 63-ball 12 x 10)
FBGA 2COB (TwinDie 63-ball, 9 x 11.5)
FBGA 2COB (TwinDie 63-ball, 12 x 14)
FBGA 4COB (QuadDie 65-ball, 12 x 10)
BG
BN
P
SP
FBGA (84-ball, 60-ball, 8 x 14)
FBGA (54-ball, 60-ball, 84-ball, 10 x 12.5)
TSOP (Type II)
Stacked TSOP, "S" = internal stacking code
BB
BG
B4
B5
P
SP
FBGA (60-ball, 8 x 16)
VFBGA (54-ball); FBGA (84-ball, 60-ball, 8 x 14)
VFBGA (54-ball, 8 x 8)
VFBGA (90-ball, 8 x 13)
TSOP (Type II)
Stacked TSOP, "S" = internal stacking code
BF
B5
CF
CG
CK
CM
VFBGA (60-ball, 8 x 9)
VFBGA (90-ball, 8 x 13)
VFBGA (60-ball, 8 x 10)
PoP (152-ball, 14 x 14)
VFBGA (60-ball, 10 x 11.5)
VFBGA (90-ball, 10 x 13)
B4
B5
BF
CJ
CM
VFBGA (54-ball, 8 x 8)
VFBGA (90-ball, 8 x 13)
VFBGA (54-ball, 8 x 9)
VFBGA (54-ball, 10 x 11.5)
VFBGA (90-ball, 10 x 13)
HT
FBGA (144-ball; 11 x 18.5)
1
2
3
4
© 2007 Micron Technology, Inc.
Micron and the Micron logo are trademarks of Micron Technology, Inc. RLDRAM is a trademark of of
Infineon Technologies AG and is used under license by Micron Technology, Inc. Products and specifications
are subject to change without notice. Dates are estimates only.
5
Rev. 02/08/07
Speed Grade
Mark
-0
-A
t
RAC Access
Time
Untested
Untested
Speed Grade MAX Clock
PC Targets
CL-tRCD-tRP
Mark
Frequency
-5
200 MHz
4-4-4
-5E
200 MHz
3-3-3
-37E
267 MHz
4-4-4
-3
333 MHz
5-5-5
-3E
333 MHz
4-4-4
-25
400 MHz
6-6-6
-25E
400 MHz
5-5-5
-75
133 MHz
2.5-3-3
DDR SDRAM
-75Z
133 MHz
2-3-3
-75E
133 MHz
2-2-2
-65
150 MHz
-6G
167 MHz
-6T
167 MHz
2.5-3-3
-6R
167 MHz
2.5-3-3
-6
167 MHz
2.5-3-3
-55
183 MHz
-5T
200 MHz
3-4-4
-5B
200 MHz
3-3-3
-5A
200 MHz
2.5-3-3
-5
200 MHz
-4
250 MHz
-33
300 MHz
-75
133 MHz
3-3-3
SDRAM
-7E
133 MHz
2-2-2
-7
143 MHz
-6
167 MHz
-6A
167 MHz
-55
183 MHz
-5
200 MHz
-10
100 MHz
Mobile DDR
-75
133 MHz
SDRAM
-6
166 MHz
-10
100 MHz
Mobile SDRAM
-8
125 MHz
-75
133 MHz
-5
200 MHz
RLDRAM
-33
300 MHz
-25
400 MHz4
-25E
400 MHz5
-18
533 MHz
Due to space limitations, FBGA- and µBGA-packaged components and
flip chips in packages have an abbreviated part mark that is
different from the part number. See our Web site for more
information on abbreviated component marks.
Dimensions in millimeters. Some device offerings are available in a
VFBGA rather than an FBGA package; this is noted on the data sheet.
The number one (1) and the capital letter “I” utilize the same laser
mark—“I”
t
RC = 20ns
t
RC = 15ns