US 20120032133A1
(19) United States
(12) Patent Application Publication (10) Pub. No.: US 2012/0032133 A1
Miller et al.
(54)
(75)
(43) Pub. Date:
SURFACE TREATMENT TO IMPROVE
RESISTIVE-SWITCHING
CHARACTERISTICS
Inventors:
Michael Miller, San Jose, CA
(Us); Prashant Phatak, San Jose’
Feb. 9, 2012
(51)
Publication Classi?cation
Int Cl
H01L 45/00
(2006.01)
(52)
_
US. Cl. ................................... .. 257/4, 257/E45.003
CA (US); Tony Chiang, Campbell,
CA (US); April Schricker,
Chen, SanPalo
Jose,
Alto, CA (US); Tanmay Kumar,
Milpitas, CA (Us)
(73)
Assignee:
(21) APP1- NOJ
_
INTERMOLECULAR, INC ., San
Jose, CA (US)
13/252,360
ing a deliberate depth pro?le, one may create multistable
memory cells having more consistent electrical parameters.
obtain a tighter distribution of set and reset voltages and loWer
Oct‘ 4’ 2011
.
(62)
performing a surface treatment process (such as ion bombard
ment) of a semiconductor device layer to create defects hav
For example, in a resistive-switching memory cell, one may
_
(22) Flled'
This disclosure provides a method of fabricating a semicon
ductor device layer and associated memory cell structures. By
forming voltage, leading to improved device yield and reli
.
ability. In at least one embodiment, the depth pro?le is
Related U's' Apphcatlon Data
Division of application No, 1 2/34 5, 57 6, ?led on Dec,
29, 2008, noW Pat. No. 8,062,918.
selected to modulate the type of defects and their in?uence on
electrical properties of a bombarded metal oxide layer and to
enhance uniform defect distribution.
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