Index
A/D converter
accuracy of, 327
advantages, 316
analog to digital conversion
types, 313–322
conversion time, 327
counter type ADC, 316–319
disadvantages, 315
dual slope A/D Converter,
319–322
format of, 327
input impedance, 327
input voltage range, 327
parallel/simultaneous type,
313–314
specification of, 327–328
stability/temperature
sensitivity, 328
types, 313
Addend bit, 69
Analog electronics, 2
Analog signal, 2
Analog to digital converter,
309–312
acquisition time, 312
aperture time, 312
drop rate, 312
sample and hold circuit,
310
sampling pulse, 310–312
AND gate, 17
electrical analogue, 17
from NAND gate, 38
from NOR gates, 40
truth table, 17
AND-OR logic gate, 42–43
Arithmetic and logic unit (74181),
302–305
Astable multivibrators, 206
Augend bit, 69
Augend register, 74–75
Automatic parking control system,
331–332
Average supply current,
249–250
Backup memory, 180–181
floppy disks, 180–181
magnetic tapes, 181
Bi CMOS series, 278–279
Bidirectional shift register,
224–225
Binary code, 44
Binary counter (BC), 142–143,
153, 163, 164. See also
Counters
Binary division algorithm,
347–350
Binary encoder. See Encoder
Binary multiplication algorithm,
347–350
Binary number system, 12
Binary priority encoder. See
Priority encoder
Binary to gray code
conversion, 45
356 Index
Bipolar static R/W memory, 184
advantages of, 185
disadvantages of, 185
Bit and byte organized memory,
188–189
n Bit binary numbers, 74–76
n Bit parallel full adder, 76–77
Bits, 11
Block parity error detection and
correction code (BPED
and CC), 235–236
Boolean algebra, 28–29
axioms or postulates of, 29–30
Boolean expressions
simplification, 31–32
definition of, 29
Boole, George, 28
Booth’s multiplication algorithm,
350–353
Cache memory, 181
Carry bit, 69
Carry look ahead adder (CLA
adder), 306–309
CCD. See Charge coupled device
CD-R (CD-recordable), 181
CDROM. See Compact disc-read
only memory
CD-RW (erasable-CD), 181
Charge coupled device (CCD),
346–347
Checksum scheme, 239–240
Chips, memory.
See Memory chips
CMOS, gates of, 286–287
Combinational circuits, 1, 2, 77–78.
See also Digital circuits;
Encoder; Multiplexer
definition of, 3
input–output relationship,
121–122
vs. sequential circuit, 120
Compact disc-read only memory
(CDROM), 181, 194–195
advantages of, 195
disadvantages of, 195
Complementary MOS logic (CMOS),
276–279
Completely specified logical
functions, 60–61
Computer memory, 175
Constant linear velocity (CLV), 195
Counters, 141–143
applications of, 328–332
automatic parking control
system, 331–332
binary counter (BC), 142–143
cascading of, 168–171
comparison of, 160
decoding error in, 153–166
design of, 144–153
lock out condition, 145–149
modulus of, 143–144
nonbinary counter, 143
square wave generation, ZCD, 329
synchronous counter, 149–153
truth table for, 161
types, 142
velocity of, 330–331
Count sequence, 161–162
Cyclic redundancy code (CRC), 240
D/A converter
accuracy, 325–326
linearity of, 325
resolution, 324
settling time, 326
specifications of, 324–326
temperature sensitivity, 326
D/A counter IC DAC 0808/DAC
1408, 301–302
Decimal number system, 12
Decoder
for active high output, 106–107
Index 357
for active low output, 106
applications of, 98–100
block diagram of, 96, 97
cascading of, 100–101
definition, 95–98
truth table, 97, 98, 101
Decoder driver IC, 107–108
Decoding circuit, 154
Demorgan’s theorem
dual form, 30–31
pictorial form of, 31
product into sum, 30–31
sum into product, 30
Demultiplexers
application of, 95
block diagram of, 93–94
internal circuit of, 95
truth table of, 94
D-flip-flop, 130–131. See also Flipflop, memory element
Digital arithmetic half adder,
64–66
Digital circuits, 2
characteristics of, 3–7
classification, 77, 120
fan-in and fan-out, 7
flip-flop, 122–123
Digital electronics, 2
Digital ICs, 339–340
Digital signal, 2
Digital system
advantages of, 3
block diagram of, 4
Digital to analog converter, 289–295
advantages, 300
disadvantages of, 295
R-2R ladder type, 295–300
Diode resistor logic, 26–27
Diode transistor logic (DTL),
252–258
minimum forward current ratio
(hfemin), 253–254
modified, 256–258
noise voltage, 254–255
propagation delay, 255–256
Display devices, 240
laser (light wave amplification
by stimulated emission of
radiation), 242
light emitting diode (LED),
240–242
liquid crystal display (LCD),
242–245
Dual slope A/D Converter, 319–322
Dynamic MOS RAM (DRAM), 184,
186
advantages of, 186
disadvantages of, 187
Electrical analogue
AND gate, 17
NAND gate, 19
NOR gate, 18
NOT gate, 18
OR Gate, 16
X-OR gate (exclusive OR gate), 22
Electrically Alterable PROM
(EAPROM). See Electrically
erasable programmable
read only memory
(EEPROM)
Electrically erasable
programmable read only
memory (EEPROM),
176–177, 192–193
Emitter coupled logic (ECL),
269–270
advantages of, 271
characteristics of, 271
disadvantages of, 271
gates of, 284–285
truth table for, 270
wired-OR connection of,
271–272
358 Index
Enable input operation, 26
Encoder, 109–114. See also
Combinational circuits
block diagram of, 109, 111, 113
logic circuit for, 111
realization, 112
truth table for, 111
Erasable programmable read
only memory (EPROM),
176, 192
advantages of, 192
disadvantages of, 192
Fan-in, definition of, 250
Fan-out, definition of, 250, 283
Ferrite core memories, 194
Five bit parity checker circuit, 23
Flip-flop, memory element, 122–123
D-flip-flop, 130–131
as divider circuit, 134–135
flip-flop conversion, 127–129
Jack–Kibby (J–K) flip-flop,
127–130
S–R flip-flop, 123–126
synchronous vs.
asynchronous, 124
T–flip-flop, 131–134
Full adder, 69–74
block diagram of, 69
logic circuit of, 71
realization of, 72
truth table of, 70
Full subtractor, 69–74
block diagram of, 72
realization of, 74
truth table of, 73
Gray code, 44
Half subtractor, 66–69
Hamming codes, 236–239
Hard disk, secondary storage
device, 179–180
Hexadecimal number system, 12
High level DC noise margin,
281
High threshold logic (HTL),
258
IC7490, operation of, 160
74194 IC, universal shift register,
225–227
Ideal digital circuit
characteristics, 7–8
IIL, gates of, 286
Incompletely specified logical
functions, 60–64
Integrated injection logic (IIL),
267–269
Inverter circuit, 28
Jack–Kibby (J–K) flip-flop,
127–130, 135, 136.
See also Flip-flop,
memory element
clocked, 129–130
master–slave J–K flip-flop,
138–139
racing problem in, 136–138
truth table of, 127
J–K master–slave flip-flop,
138–139
operation of, 140–141
positive edge triggered, input
circuit of, 140
Johnson counter, 228–229.
See also Registers
Karnaugh map, 45, 62–64, 234
five variable, 53–54
limitation, 45–53
logical expression, 51–53
plotting zeros (max term
representation), 53
six variable, 54–60
K map. See Karnaugh map
Index 359
Large scale integration (LSI)
devices, 79
Laser (Light wave amplification
by stimulated emission of
radiation), 242
LCD. See Liquid crystal display
Least significant digit (LSD), 11
LED. See Light emitting diode
Light emitting diode (LED),
240–242
advantages of, 241
disadvantages of, 242
Liquid crystal display (LCD),
242–245
advantages of, 245
disadvantages of, 245
dynamic scattering type, 243
field effect type, 243–245
Logical convention, 9
negative logical system, 10
positive logic system, 9–10
Logical expression, 32–33
max term representation, 35–37
min term representation, 34, 36
standard product of sum
(SPOS) form, 34–35
standard sum of products
(SSOP) form, 33–34
Logical functions, 4
completely specified, 60–61
incompletely specified,
60–64
Logic circuits, 8, 20–25, 38, 39, 40,
41, 66
Logic gates, 3, 16
definition of, 8
AND gate, 17
NAND gate, 19
NOR gate, 18–19
NOT gate, 17–18
OR gate, 16, 26–27
XNOR gate (equality detector),
24–25
X-OR gate (exclusive OR gate),
20–24
Logic levels, schematic of, 5
Logic parameters, 248–251
average supply current,
249–250
fan-in and fan-out, 250
noise margin, 250–251
power dissipation (Pd), 249
propagation delay, 248–249
speed power product (SPP), 250
Magnetic based memories, 177
Main/primary memory
classification of, 178
definition of, 177
random access memory (RAM),
178–179
read only memory (ROM), 179
Medium scale integration (MSI)
devices, 79
Memory
bit and byte organized, 188–189
classifications of, 175–182
compact disc-read only
memory (CDROM), 194–195
computer memory, 175
definition of, 175
ferrite core memories, 194
interfacing, decoded
addressing, 201–202
memory chips, 189–191
organization, 187–188
74189 RAM and 74288 PROM
chip, 197–199
RAM testing, 199–200
ROM, 191–193, 195–197
semiconductor memories,
184–187
system and standard memory
devices, 182–183
Memory chips, 189–191
Memory devices, 182
360 Index
Memory interfacing, 200–202
Memory organization, 187–188
Metal oxide semiconductor FET
(MOSFET), 272
Microprocessor compatible A/D
converter 0809, 322–324
Mod 87 counter, designing,
171–173
Mod 5 counter output
sequence, 162
Modified totem pole circuit,
264–265
Mod 3 nonbinary counter, 144
Mod 4 up down counter,
designing of, 167–168
Monostable multivibrators, 207,
215–216
MOS logic, characteristics of, 275
Most significant digit (MSD), 11
Multiple digit decimal display,
108–109
Multiplexer, 79–80
advantage, 86–88
application of, 88–92
AND gate realization, 92
general block diagram, 80–86
logic circuit of, 82
NOT gate realization, 92
OR gate realization, 93
PISO register, 229–230
truth table of, 80
as universal logic gate, 92–93
Multivibrators, 205–207
application, 207
astable, 206
monostable, 207
NAND gate, 19, 37–42, 67, 249
electrical analogue, 19
AND gate from, 38
half adder with, 66
NOR gate from, 39
NOT gate from, 37–38
OR gate from, 38
truth table, 19
as universal gates, 37–42
XNOR gate from, 40
XOR gate from, 39
NMOS, gates of, 285–286
NMOS inverter, 272–273
NMOS NAND gate, 274–275
NMOS NOR gate, 274–275
Nonbinary counter, 143
Noninverting characteristics, 6–7
NOR gate, 18–19
electrical analogue, 18
AND gate from, 40
from NAND gate, 39
NAND gate from, 41
NOT gate from, 40
OR gate from, 41
truth table, 18
as universal gates, 40–42
XOR gate from, 41–42
NOT gate, 17–18
electrical analogue, 18
from NOR gates, 40
truth table, 18
Number system
definition of, 10
generalized approach of, 11–13
integer conversion, 14–15
positional, 10–11
radix conversion, 13
Octal encoder. See Encoder
Octal number system, 12
Octal priority encoder.
See Priority encoder
Open collector output, 262–263
Optical medium based
memories, 177
Optical Windows, 190–191
OR gate, 16, 26–27
Index 361
electrical analogue, 16
from NAND gate, 38
from NOR gates, 41
truth table, 16
Output vs. transfer
characteristics, 5
Parallel in parallel out shift
register (PIPO), 222–223
Parallel in serial out shift register
(PISO), 223–224
Parity, 22–24
Parity check error detection
scheme, 235
Positional number system, 10–11
Power dissipation (Pd), 249
Priority encoder, 114–117
block diagram of, 117
truth table for, 117
Programmable logic array (PLA),
340–342
architecture of, 342–346
truth table of, 341
Programmable read only
memory (PROM), 176, 192
74288 PROM chip, 197–199
read operation, 198
write operation, 198
Propagation delay, 248–249,
255–256
QUAD D-type F/F with tristated
output (74LS373), 266–267
Quaternary number system, 12
Racing problem, J-K flip-flop,
136–138
74189 RAM, 197–199
Random access memory (RAM),
178–179, 199–200
Read only memory (ROM), 179,
191–193, 195–197
applications of, 193
circuit diagram of, using
decoder and gates, 195–197
electrically erasable
programmable read only
memory (EEPROM),
176–177, 192–193
erasable programmable read
only memory (EPROM),
176, 192
programmable read only
memory (PROM), 176, 192
types of, 191
Registers, 220–227, 230–232
application of, 230–232
bidirectional shift register,
224–225
parallel in parallel out shift
register (PIPO), 222–223
parallel in serial out shift
register (PISO), 223–224
rotate left shift register,
220, 225
rotate right shift register,
220, 225
serial in parallel out shift
register (SIPO), 222
serial in serial out shift register
(SISO), 221–222
types of, 220
Resistor transistor logic (RTL),
251–252
Ring counter, 227–228. See also
Registers
advantages of, 228
disadvantages of, 228
Rotate left shift register, 220, 225
Rotate right shift register, 220, 225
Schmitt trigger circuit
applications, 332
characteristics, 336–339
characteristics of, 334–335
OP-AMP, 336–339
362 Index
transistorized, 332–334
truth table of, 333
Secondary/auxiliary memory,
definition of, 179
Secondary storage devices,
179–180
Semiconductor memories,
176–177, 184–187
Sequence generator design,
232–234
Sequential circuit, 78–79,
119–120. See also
Digital circuits
vs. combinational circuit, 120
input-output relationship,
121–122
Serial addition/adder, 74
advantages of, 76
disadvantages of, 76
Serial in parallel out shift register
(SIPO), 222
Serial in serial out shift register
(SISO), 221–222
Seven segment LED display,
101–105
common anode display circuit,
102–103
common cathode display,
103–105
Small scale integration (SSI)
devices, 79
Speed power product (SPP), 250
S-R flip-flop, 123–126
advantages of, 126
characteristics table of, 124
synchronous or clocked, 126
truth table of, 126
unclocked/asynchronous,
125–126
Standard memory devices,
182–183. See also Main/
primary memory
advantages of, 183
disadvantages of, 183
Static MOS RAM, 184, 185
Synchronous counter, 149–153,
157–158, 166. See also
Counters
System memory device, 182–183.
See also Main/primary
memory
advantages of, 183
disadvantages of, 183
T–flip-flop, 131–134
555 Timer IC, 207–215. See also
Timing circuit
astable mode operation,
209–213
block diagram of, 208
internal circuit diagram of, 208
monostable mode operation,
213–215
symmetrical waveform
generation, J–K flip-flop, 213
Timing circuit, 205
display devices, 240–245
error detection and correction
codes, 234–240
monostable multivibrator, logic
gate, 215–216
multiplexer, 229–230
multivibrators, 205–207
registers, 220–227, 230–232
ring and Johnson Counter,
227–229
sequence generator design,
232–234
555 Timer IC, 207–215
timing waveform, OP-AMP,
216–220
Timing waveform, OP-AMP, 216–220
asymmetric, 219–220
symmetric, 217–219
Index 363
Totem pole (TTL), 260–261,
262–263
gates of, 284
open collector output, 262–263
output of, 283
wire and logic for, 263
Transistor transistor logic (TTL),
259–260
Trinary (ternary) number
system, 12
Tristate buffer, 323
Tristate inverter, 265–266
Truth table, 68
of augend register, 75
definition of, 8–9
of D–flip-flop, 131
of full adder, 70
AND gate, 17
NAND gate, 19
for NMOS inverter, 273
NOR gate, 18
NOT gate, 18
OR gate, 16
of T–flip-flop, 132
of tristate buffer, 324
X-OR gate (exclusive OR gate),
21
Universal gates, 37
NAND as, 37–42
NOR as, 40–42
Universal synchronism
asynchronous receiver
transmitters
(USART), 231
Very large scale integration (VLSI)
technology, 2, 79
Virtual memory, 181–182
Wired-OR MOS logic family,
272–275
XNOR gate (equality detector),
24–25, 40
X-OR gate (exclusive OR gate),
20–24
electrical analogue, 22
from NAND gate, 39
from NOR gates, 41–42
truth table, 21